From nobody Mon Feb 9 20:34:48 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1532009175047222.54983792822884; Thu, 19 Jul 2018 07:06:15 -0700 (PDT) Received: from localhost ([::1]:43231 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fg9ZO-0000xm-0I for importer@patchew.org; Thu, 19 Jul 2018 10:06:14 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55254) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fg8Z7-0004Mx-0U for qemu-devel@nongnu.org; Thu, 19 Jul 2018 09:03:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fg8Vq-0006bW-Q6 for qemu-devel@nongnu.org; Thu, 19 Jul 2018 09:01:53 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:57598 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fg8Vq-0006ak-60 for qemu-devel@nongnu.org; Thu, 19 Jul 2018 08:58:30 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id A948A1A4156; Thu, 19 Jul 2018 14:58:28 +0200 (CEST) Received: from smarkovic.mipstec.com (smarkovic.domain.local [10.10.14.46]) by mail.rt-rk.com (Postfix) with ESMTPSA id 8C9411A22AF; Thu, 19 Jul 2018 14:58:28 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com From: Stefan Markovic To: qemu-devel@nongnu.org Date: Thu, 19 Jul 2018 14:54:56 +0200 Message-Id: <1532004912-13899-25-git-send-email-stefan.markovic@rt-rk.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1532004912-13899-1-git-send-email-stefan.markovic@rt-rk.com> References: <1532004912-13899-1-git-send-email-stefan.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 89.216.37.149 X-Mailman-Approved-At: Thu, 19 Jul 2018 09:35:10 -0400 Subject: [Qemu-devel] [PATCH v3 24/40] target/mips: Add updating BadInstr and BadInstrP registers for nanoMIPS X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pburton@wavecomp.com, smarkovic@wavecomp.com, riku.voipio@iki.fi, richard.henderson@linaro.org, laurent@vivier.eu, philippe.mathieu.daude@gmail.com, amarkovic@wavecomp.com, pjovanovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Yongbok Kim Updating BadInstr and BadInstrP registers was addded for nanoMIPS. BadInstr and BadInstrP support for pre-nanoMIPS remains unimplemented. Signed-off-by: Yongbok Kim Signed-off-by: Aleksandar Markovic Signed-off-by: Stefan Markovic --- target/mips/helper.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/target/mips/helper.c b/target/mips/helper.c index e215af9..5299f21 100644 --- a/target/mips/helper.c +++ b/target/mips/helper.c @@ -683,7 +683,28 @@ static void set_hflags_for_handler (CPUMIPSState *env) static inline void set_badinstr_registers(CPUMIPSState *env) { if (env->hflags & MIPS_HFLAG_M16) { - /* TODO: add BadInstr support for microMIPS */ + uint32_t instr; + if (!(env->insn_flags & ISA_NANOMIPS32)) { + /* TODO: add BadInstr support for pre-nanoMIPS */ + return; + } + if (env->CP0_Config3 & (1 << CP0C3_BI)) { + instr =3D (cpu_lduw_code(env, env->active_tc.PC)) << 16; + if ((env->insn_flags & ISA_NANOMIPS32) && + ((instr & 0x10000000) =3D=3D 0)) { + instr |=3D cpu_lduw_code(env, env->active_tc.PC + 2); + } + env->CP0_BadInstr =3D instr; + } + if ((env->CP0_Config3 & (1 << CP0C3_BP)) && + (env->hflags & MIPS_HFLAG_BMASK)) { + if (!(env->hflags & MIPS_HFLAG_B16)) { + env->CP0_BadInstrP =3D cpu_ldl_code(env, env->active_tc.PC= - 4); + } else { + env->CP0_BadInstrP =3D + (cpu_lduw_code(env, env->active_tc.PC - 2)) << 16; + } + } return; } if (env->CP0_Config3 & (1 << CP0C3_BI)) { --=20 2.7.4