From nobody Wed Nov 5 00:12:25 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1531839872400429.0347241301281; Tue, 17 Jul 2018 08:04:32 -0700 (PDT) Received: from localhost ([::1]:59841 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ffRWd-00033I-Dl for importer@patchew.org; Tue, 17 Jul 2018 11:04:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47259) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ffRV3-0002I6-BO for qemu-devel@nongnu.org; Tue, 17 Jul 2018 11:02:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ffRUx-0003t1-4l for qemu-devel@nongnu.org; Tue, 17 Jul 2018 11:02:49 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:54912 helo=mx1.redhat.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ffRUw-0003sF-UN for qemu-devel@nongnu.org; Tue, 17 Jul 2018 11:02:43 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.rdu2.redhat.com [10.11.54.6]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id B49EA402332F; Tue, 17 Jul 2018 15:02:41 +0000 (UTC) Received: from thh440s.str.redhat.com (dhcp-200-180.str.redhat.com [10.33.200.180]) by smtp.corp.redhat.com (Postfix) with ESMTP id 67F412156893; Tue, 17 Jul 2018 15:02:40 +0000 (UTC) From: Thomas Huth To: qemu-devel@nongnu.org, Michael Clark , Palmer Dabbelt , Sagar Karandikar , Bastian Koppelmann Date: Tue, 17 Jul 2018 17:02:39 +0200 Message-Id: <1531839759-14090-1-git-send-email-thuth@redhat.com> X-Scanned-By: MIMEDefang 2.78 on 10.11.54.6 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.6]); Tue, 17 Jul 2018 15:02:41 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.6]); Tue, 17 Jul 2018 15:02:41 +0000 (UTC) for IP:'10.11.54.6' DOMAIN:'int-mx06.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'thuth@redhat.com' RCPT:'' X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.187.233.73 Subject: [Qemu-devel] [PATCH] hw/riscv/sifive_u: Fix introspection problem in the "riscv.sifive.u.soc" device X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Valgrind complains: echo "{'execute':'qmp_capabilities'} {'execute':'device-list-properties'," \ "'arguments':{'typename':'riscv.sifive.u.soc'}}" \ "{'execute': 'human-monitor-command', " \ "'arguments': {'command-line': 'info qtree'}}" | \ valgrind -q riscv32-softmmu/qemu-system-riscv32 -M none,accel=3Dqtest -qmp= stdio [...] =3D=3D28083=3D=3D Invalid read of size 8 =3D=3D28083=3D=3D at 0x2E036A: qdev_print (qdev-monitor.c:686) =3D=3D28083=3D=3D by 0x2E036A: qbus_print (qdev-monitor.c:719) =3D=3D28083=3D=3D by 0x268938: handle_hmp_command (monitor.c:3446) [...] Use the new object_initialize_child() and sysbus_init_child_obj() functions to fix the problem. Signed-off-by: Thomas Huth Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/riscv/sifive_u.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 3a6ffeb..459ec90 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -303,16 +303,15 @@ static void riscv_sifive_u_soc_init(Object *obj) { SiFiveUSoCState *s =3D RISCV_U_SOC(obj); =20 - object_initialize(&s->cpus, sizeof(s->cpus), TYPE_RISCV_HART_ARRAY); - object_property_add_child(obj, "cpus", OBJECT(&s->cpus), - &error_abort); + object_initialize_child(obj, "cpus", &s->cpus, sizeof(s->cpus), + TYPE_RISCV_HART_ARRAY, &error_abort, NULL); object_property_set_str(OBJECT(&s->cpus), SIFIVE_U_CPU, "cpu-type", &error_abort); object_property_set_int(OBJECT(&s->cpus), smp_cpus, "num-harts", &error_abort); =20 - object_initialize(&s->gem, sizeof(s->gem), TYPE_CADENCE_GEM); - qdev_set_parent_bus(DEVICE(&s->gem), sysbus_get_default()); + sysbus_init_child_obj(obj, "gem", &s->gem, sizeof(s->gem), + TYPE_CADENCE_GEM); } =20 static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp) --=20 1.8.3.1