From nobody Tue Nov 4 23:58:03 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 153147109928055.8898765802295; Fri, 13 Jul 2018 01:38:19 -0700 (PDT) Received: from localhost ([::1]:35931 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fdtab-0001jg-4n for importer@patchew.org; Fri, 13 Jul 2018 04:38:09 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40626) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fdtRF-0002iW-Dx for qemu-devel@nongnu.org; Fri, 13 Jul 2018 04:28:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fdtRA-0004vZ-SH for qemu-devel@nongnu.org; Fri, 13 Jul 2018 04:28:29 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:56488 helo=mx1.redhat.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fdtR7-0004qI-C0; Fri, 13 Jul 2018 04:28:21 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.rdu2.redhat.com [10.11.54.4]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id EDB3F402382F; Fri, 13 Jul 2018 08:28:20 +0000 (UTC) Received: from thh440s.redhat.com (ovpn-116-70.ams2.redhat.com [10.36.116.70]) by smtp.corp.redhat.com (Postfix) with ESMTP id 46CAB2026D6B; Fri, 13 Jul 2018 08:28:18 +0000 (UTC) From: Thomas Huth To: qemu-devel@nongnu.org, Peter Maydell , Paolo Bonzini Date: Fri, 13 Jul 2018 10:27:39 +0200 Message-Id: <1531470464-21522-12-git-send-email-thuth@redhat.com> In-Reply-To: <1531470464-21522-1-git-send-email-thuth@redhat.com> References: <1531470464-21522-1-git-send-email-thuth@redhat.com> X-Scanned-By: MIMEDefang 2.78 on 10.11.54.4 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.6]); Fri, 13 Jul 2018 08:28:21 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.6]); Fri, 13 Jul 2018 08:28:21 +0000 (UTC) for IP:'10.11.54.4' DOMAIN:'int-mx04.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'thuth@redhat.com' RCPT:'' X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.187.233.73 Subject: [Qemu-devel] [PATCH v2 11/16] hw/arm/fsl-imx7: Fix introspection problems with the "fsl, imx7" device X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Alistair Francis , Markus Armbruster , Subbaraya Sundeep , Beniamino Galvani , qemu-arm@nongnu.org, "Edgar E. Iglesias" , =?UTF-8?q?Andreas=20F=C3=A4rber?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Running QEMU with valgrind indicates a problem here: echo "{'execute':'qmp_capabilities'} {'execute':'device-list-properties'," \ "'arguments':{'typename':'fsl,imx7'}}" \ "{'execute': 'human-monitor-command', " \ "'arguments': {'command-line': 'info qtree'}}" | \ valgrind -q aarch64-softmmu/qemu-system-aarch64 -M none,accel=3Dqtest -qmp= stdio [...] =3D=3D27284=3D=3D Invalid read of size 8 =3D=3D27284=3D=3D at 0x618F7A: qdev_print (qdev-monitor.c:686) =3D=3D27284=3D=3D by 0x618F7A: qbus_print (qdev-monitor.c:719) =3D=3D27284=3D=3D by 0x452B38: handle_hmp_command (monitor.c:3446) [...] Use the new sysbus_init_child_obj() and object_initialize_child() to make sure that the objects are removed correctly when the parent gets destroyed. Signed-off-by: Thomas Huth --- hw/arm/fsl-imx7.c | 96 +++++++++++++++++++--------------------------------= ---- 1 file changed, 32 insertions(+), 64 deletions(-) diff --git a/hw/arm/fsl-imx7.c b/hw/arm/fsl-imx7.c index 44fde03..4aad720 100644 --- a/hw/arm/fsl-imx7.c +++ b/hw/arm/fsl-imx7.c @@ -30,157 +30,125 @@ =20 static void fsl_imx7_init(Object *obj) { - BusState *sysbus =3D sysbus_get_default(); FslIMX7State *s =3D FSL_IMX7(obj); char name[NAME_SIZE]; int i; =20 =20 for (i =3D 0; i < MIN(smp_cpus, FSL_IMX7_NUM_CPUS); i++) { - object_initialize(&s->cpu[i], sizeof(s->cpu[i]), - ARM_CPU_TYPE_NAME("cortex-a7")); snprintf(name, NAME_SIZE, "cpu%d", i); - object_property_add_child(obj, name, OBJECT(&s->cpu[i]), - &error_fatal); + object_initialize_child(obj, name, &s->cpu[i], sizeof(s->cpu[i]), + ARM_CPU_TYPE_NAME("cortex-a7"), &error_fat= al); } =20 /* * A7MPCORE */ - object_initialize(&s->a7mpcore, sizeof(s->a7mpcore), TYPE_A15MPCORE_PR= IV); - qdev_set_parent_bus(DEVICE(&s->a7mpcore), sysbus); - object_property_add_child(obj, "a7mpcore", - OBJECT(&s->a7mpcore), &error_fatal); + sysbus_init_child_obj(obj, "a7mpcore", &s->a7mpcore, sizeof(s->a7mpcor= e), + TYPE_A15MPCORE_PRIV); =20 /* * GPIOs 1 to 7 */ for (i =3D 0; i < FSL_IMX7_NUM_GPIOS; i++) { - object_initialize(&s->gpio[i], sizeof(s->gpio[i]), - TYPE_IMX_GPIO); - qdev_set_parent_bus(DEVICE(&s->gpio[i]), sysbus); snprintf(name, NAME_SIZE, "gpio%d", i); - object_property_add_child(obj, name, - OBJECT(&s->gpio[i]), &error_fatal); + sysbus_init_child_obj(obj, name, &s->gpio[i], sizeof(s->gpio[i]), + TYPE_IMX_GPIO); } =20 /* * GPT1, 2, 3, 4 */ for (i =3D 0; i < FSL_IMX7_NUM_GPTS; i++) { - object_initialize(&s->gpt[i], sizeof(s->gpt[i]), TYPE_IMX7_GPT); - qdev_set_parent_bus(DEVICE(&s->gpt[i]), sysbus); snprintf(name, NAME_SIZE, "gpt%d", i); - object_property_add_child(obj, name, OBJECT(&s->gpt[i]), - &error_fatal); + sysbus_init_child_obj(obj, name, &s->gpt[i], sizeof(s->gpt[i]), + TYPE_IMX7_GPT); } =20 /* * CCM */ - object_initialize(&s->ccm, sizeof(s->ccm), TYPE_IMX7_CCM); - qdev_set_parent_bus(DEVICE(&s->ccm), sysbus); - object_property_add_child(obj, "ccm", OBJECT(&s->ccm), &error_fatal); + sysbus_init_child_obj(obj, "ccm", &s->ccm, sizeof(s->ccm), TYPE_IMX7_C= CM); =20 /* * Analog */ - object_initialize(&s->analog, sizeof(s->analog), TYPE_IMX7_ANALOG); - qdev_set_parent_bus(DEVICE(&s->analog), sysbus); - object_property_add_child(obj, "analog", OBJECT(&s->analog), &error_fa= tal); + sysbus_init_child_obj(obj, "analog", &s->analog, sizeof(s->analog), + TYPE_IMX7_ANALOG); =20 /* * GPCv2 */ - object_initialize(&s->gpcv2, sizeof(s->gpcv2), TYPE_IMX_GPCV2); - qdev_set_parent_bus(DEVICE(&s->gpcv2), sysbus); - object_property_add_child(obj, "gpcv2", OBJECT(&s->gpcv2), &error_fata= l); + sysbus_init_child_obj(obj, "gpcv2", &s->gpcv2, sizeof(s->gpcv2), + TYPE_IMX_GPCV2); =20 for (i =3D 0; i < FSL_IMX7_NUM_ECSPIS; i++) { - object_initialize(&s->spi[i], sizeof(s->spi[i]), TYPE_IMX_SPI); - qdev_set_parent_bus(DEVICE(&s->spi[i]), sysbus_get_default()); snprintf(name, NAME_SIZE, "spi%d", i + 1); - object_property_add_child(obj, name, OBJECT(&s->spi[i]), NULL); + sysbus_init_child_obj(obj, name, &s->spi[i], sizeof(s->spi[i]), + TYPE_IMX_SPI); } =20 =20 for (i =3D 0; i < FSL_IMX7_NUM_I2CS; i++) { - object_initialize(&s->i2c[i], sizeof(s->i2c[i]), TYPE_IMX_I2C); - qdev_set_parent_bus(DEVICE(&s->i2c[i]), sysbus_get_default()); snprintf(name, NAME_SIZE, "i2c%d", i + 1); - object_property_add_child(obj, name, OBJECT(&s->i2c[i]), NULL); + sysbus_init_child_obj(obj, name, &s->i2c[i], sizeof(s->i2c[i]), + TYPE_IMX_I2C); } =20 /* * UART */ for (i =3D 0; i < FSL_IMX7_NUM_UARTS; i++) { - object_initialize(&s->uart[i], sizeof(s->uart[i]), TYPE_IMX_SE= RIAL); - qdev_set_parent_bus(DEVICE(&s->uart[i]), sysbus); snprintf(name, NAME_SIZE, "uart%d", i); - object_property_add_child(obj, name, OBJECT(&s->uart[i]), - &error_fatal); + sysbus_init_child_obj(obj, name, &s->uart[i], sizeof(s->uart[i= ]), + TYPE_IMX_SERIAL); } =20 /* * Ethernet */ for (i =3D 0; i < FSL_IMX7_NUM_ETHS; i++) { - object_initialize(&s->eth[i], sizeof(s->eth[i]), TYPE_IMX_ENET= ); - qdev_set_parent_bus(DEVICE(&s->eth[i]), sysbus); snprintf(name, NAME_SIZE, "eth%d", i); - object_property_add_child(obj, name, OBJECT(&s->eth[i]), - &error_fatal); + sysbus_init_child_obj(obj, name, &s->eth[i], sizeof(s->eth[i]), + TYPE_IMX_ENET); } =20 /* * SDHCI */ for (i =3D 0; i < FSL_IMX7_NUM_USDHCS; i++) { - object_initialize(&s->usdhc[i], sizeof(s->usdhc[i]), - TYPE_IMX_USDHC); - qdev_set_parent_bus(DEVICE(&s->usdhc[i]), sysbus); snprintf(name, NAME_SIZE, "usdhc%d", i); - object_property_add_child(obj, name, OBJECT(&s->usdhc[i]), - &error_fatal); + sysbus_init_child_obj(obj, name, &s->usdhc[i], sizeof(s->usdhc= [i]), + TYPE_IMX_USDHC); } =20 /* * SNVS */ - object_initialize(&s->snvs, sizeof(s->snvs), TYPE_IMX7_SNVS); - qdev_set_parent_bus(DEVICE(&s->snvs), sysbus); - object_property_add_child(obj, "snvs", OBJECT(&s->snvs), &error_fatal); + sysbus_init_child_obj(obj, "snvs", &s->snvs, sizeof(s->snvs), + TYPE_IMX7_SNVS); =20 /* * Watchdog */ for (i =3D 0; i < FSL_IMX7_NUM_WDTS; i++) { - object_initialize(&s->wdt[i], sizeof(s->wdt[i]), TYPE_IMX2_WDT= ); - qdev_set_parent_bus(DEVICE(&s->wdt[i]), sysbus); snprintf(name, NAME_SIZE, "wdt%d", i); - object_property_add_child(obj, name, OBJECT(&s->wdt[i]), - &error_fatal); + sysbus_init_child_obj(obj, name, &s->wdt[i], sizeof(s->wdt[i]), + TYPE_IMX2_WDT); } =20 /* * GPR */ - object_initialize(&s->gpr, sizeof(s->gpr), TYPE_IMX7_GPR); - qdev_set_parent_bus(DEVICE(&s->gpr), sysbus); - object_property_add_child(obj, "gpr", OBJECT(&s->gpr), &error_fatal); + sysbus_init_child_obj(obj, "gpr", &s->gpr, sizeof(s->gpr), TYPE_IMX7_G= PR); =20 - object_initialize(&s->pcie, sizeof(s->pcie), TYPE_DESIGNWARE_PCIE_HOST= ); - qdev_set_parent_bus(DEVICE(&s->pcie), sysbus); - object_property_add_child(obj, "pcie", OBJECT(&s->pcie), &error_fatal); + sysbus_init_child_obj(obj, "pcie", &s->pcie, sizeof(s->pcie), + TYPE_DESIGNWARE_PCIE_HOST); =20 for (i =3D 0; i < FSL_IMX7_NUM_USBS; i++) { - object_initialize(&s->usb[i], - sizeof(s->usb[i]), TYPE_CHIPIDEA); - qdev_set_parent_bus(DEVICE(&s->usb[i]), sysbus); snprintf(name, NAME_SIZE, "usb%d", i); - object_property_add_child(obj, name, - OBJECT(&s->usb[i]), &error_fatal); + sysbus_init_child_obj(obj, name, &s->usb[i], sizeof(s->usb[i]), + TYPE_CHIPIDEA); } } =20 --=20 1.8.3.1