From nobody Sun Feb 8 15:51:59 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linux.intel.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1530781941301641.3438537999563; Thu, 5 Jul 2018 02:12:21 -0700 (PDT) Received: from localhost ([::1]:51199 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fb0JF-00028T-0D for importer@patchew.org; Thu, 05 Jul 2018 05:12:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42449) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fb0HA-0000rh-Hk for qemu-devel@nongnu.org; Thu, 05 Jul 2018 05:10:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fb0H9-0007Bf-Kj for qemu-devel@nongnu.org; Thu, 05 Jul 2018 05:10:08 -0400 Received: from mga02.intel.com ([134.134.136.20]:23698) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fb0H9-0006vV-BE for qemu-devel@nongnu.org; Thu, 05 Jul 2018 05:10:07 -0400 Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by orsmga101.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 05 Jul 2018 02:10:07 -0700 Received: from sqa-gate.sh.intel.com (HELO robert-ivt.tsp.org) ([10.239.48.212]) by fmsmga001.fm.intel.com with ESMTP; 05 Jul 2018 02:10:05 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,311,1526367600"; d="scan'208";a="69807680" From: Robert Hoo To: qemu-devel@nongnu.org, pbonzini@redhat.com, rth@twiddle.net, ehabkost@redhat.com Date: Thu, 5 Jul 2018 17:09:57 +0800 Message-Id: <1530781798-183214-5-git-send-email-robert.hu@linux.intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1530781798-183214-1-git-send-email-robert.hu@linux.intel.com> References: <1530781798-183214-1-git-send-email-robert.hu@linux.intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.20 Subject: [Qemu-devel] [PATCH v4 4/5] i386: Add CPUID bit for WBNOINVD X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: robert.hu@intel.com, wei.w.wang@intel.com, Robert Hoo , jingqi.liu@intel.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" WBNOINVD: Write back and do not invalidate cache, enumerated by CPUID.(EAX=3D80000008H, ECX=3D0):EBX[bit 9]. Signed-off-by: Robert Hoo --- target/i386/cpu.c | 2 +- target/i386/cpu.h | 2 ++ 2 files changed, 3 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index b83d0a9..8de15cb 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1028,7 +1028,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORD= S] =3D { .feat_names =3D { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL, + NULL, "wbnoinvd", NULL, NULL, "ibpb", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 12a7e6c..265f428 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -694,6 +694,8 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS]; #define CPUID_7_0_EDX_ARCH_CAPABILITIES (1U << 29) /*Arch Capabilities*/ #define CPUID_7_0_EDX_SPEC_CTRL_SSBD (1U << 31) /* Speculative Store Bypa= ss Disable */ =20 +#define CPUID_8000_0008_EBX_WBNOINVD (1U << 9) /* Write back and + = do not invalidate cache */ #define CPUID_8000_0008_EBX_IBPB (1U << 12) /* Indirect Branch Predicti= on Barrier */ =20 #define CPUID_XSAVE_XSAVEOPT (1U << 0) --=20 1.8.3.1