From nobody Tue Nov 4 19:01:34 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1530546628299186.61927148254426; Mon, 2 Jul 2018 08:50:28 -0700 (PDT) Received: from localhost ([::1]:33740 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fa15v-00025s-GT for importer@patchew.org; Mon, 02 Jul 2018 11:50:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60729) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fa11S-0007kS-Vx for qemu-devel@nongnu.org; Mon, 02 Jul 2018 11:45:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fa11R-0000Dl-EH for qemu-devel@nongnu.org; Mon, 02 Jul 2018 11:45:51 -0400 Received: from mail-wm0-x242.google.com ([2a00:1450:400c:c09::242]:39913) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fa11R-0000DL-3U for qemu-devel@nongnu.org; Mon, 02 Jul 2018 11:45:49 -0400 Received: by mail-wm0-x242.google.com with SMTP id p11-v6so9186800wmc.4 for ; Mon, 02 Jul 2018 08:45:48 -0700 (PDT) Received: from 640k.lan ([82.84.124.111]) by smtp.gmail.com with ESMTPSA id q17-v6sm19087521wrr.7.2018.07.02.08.45.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 02 Jul 2018 08:45:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=OlsZ/mo7SaJ3dyHjDxoJouHdpuTVbKRS8hkHLHchz+g=; b=uVikqgCCrvxpflA1sD0tl2l2HGRblhWvNkxrEfjc2toqRyCGRt2Pjq2tf+OO+8Cme6 mAelKy0l9EM1+fQUEQYocfF63s7qisClClhbjgB+wOF+fKbpUH5m8gHiLv9nRS+P/AyA E0fnAtONJ+nJhxijnUXhHTRc002Frqj+E7odse7xo9i6ltigYw3NORXqfzoPH/OVuEnc +CUaie+153+AgELWcJMNOSQAbpuYkXBbgywv49C7vRiZGaIdKNtd9hbyzoCqAoRfoiXO S4E1PqOD8cha/J0BALY11y0E6CmslXDnZBioaXDZTR9+azl4AACh5jEZF12BX9EWv21d MNKw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=OlsZ/mo7SaJ3dyHjDxoJouHdpuTVbKRS8hkHLHchz+g=; b=ZAE66xedda/nAQI2TxNSuEhKBdYYcbll0hUeLikq9HyCPfLTDBog+sY9nnaKZwV7vh 9YyjMEz5+qayt9XwB2WZZ1atjieeAITIDAH6JNU2ebpx7Rb7QECefZLX5ayMTTWvvsiI pzrjGQ6GFl8a6jJNBjDl/wV3vui8VWNxKKTe5Cy7jNQ2mOuh+pUhfje7fB2G3kYGc5+c 9P+In71JlSXpdxOsty2sG7CYDV6ra5nhBBgwBi6yUdyL7pXn2uM5rkBketJj13djxg+j 1oYfbf0PzCtO18fjdzYFItvHW64LY19ztCj/ztm1htb+qF5VXgJaXTZXn/tqdYof9qXW 81Ow== X-Gm-Message-State: APt69E3w6YekllXgpR/qkyR+S/6ry9yu88XzXuM6lN3t9iH9N1K7oQLA w86b70xodWJOsddv3hh4SiqbvBFc X-Google-Smtp-Source: AAOMgpdlMIFrlYjdildtYhOBMqde7+vQ3R3LLvP12j7Y9+TlWoUTfNSXNnQQyMl4E9LBjt89y5HtBw== X-Received: by 2002:a1c:6fdd:: with SMTP id c90-v6mr5769282wmi.16.1530546347681; Mon, 02 Jul 2018 08:45:47 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Date: Mon, 2 Jul 2018 17:45:39 +0200 Message-Id: <1530546340-4366-4-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1530546340-4366-1-git-send-email-pbonzini@redhat.com> References: <1530546340-4366-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c09::242 Subject: [Qemu-devel] [PULL 49/50] i386/monitor.c: make addresses canonical for "info mem" and "info tlb" X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Doug Gale Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Doug Gale Correct the output of the "info mem" and "info tlb" monitor commands to correctly show canonical addresses. In 48-bit addressing mode, the upper 16 bits of linear addresses are equal to bit 47. In 57-bit addressing mode (LA57), the upper 7 bits of linear addresses are equal to bit 56. Signed-off-by: Doug Gale Message-Id: <20180617084025.29198-1-doug16k@gmail.com> Signed-off-by: Paolo Bonzini --- target/i386/monitor.c | 76 +++++++++++++++++++++++++++++------------------= ---- 1 file changed, 44 insertions(+), 32 deletions(-) diff --git a/target/i386/monitor.c b/target/i386/monitor.c index 6bbb3a9..74a13c5 100644 --- a/target/i386/monitor.c +++ b/target/i386/monitor.c @@ -35,21 +35,28 @@ #include "sev_i386.h" #include "qapi/qapi-commands-misc.h" =20 - -static void print_pte(Monitor *mon, CPUArchState *env, hwaddr addr, - hwaddr pte, hwaddr mask) +/* Perform linear address sign extension */ +static hwaddr addr_canonical(CPUArchState *env, hwaddr addr) { #ifdef TARGET_X86_64 if (env->cr[4] & CR4_LA57_MASK) { if (addr & (1ULL << 56)) { - addr |=3D -1LL << 57; + addr |=3D (hwaddr)-(1LL << 57); } } else { if (addr & (1ULL << 47)) { - addr |=3D -1LL << 48; + addr |=3D (hwaddr)-(1LL << 48); } } #endif + return addr; +} + +static void print_pte(Monitor *mon, CPUArchState *env, hwaddr addr, + hwaddr pte, hwaddr mask) +{ + addr =3D addr_canonical(env, addr); + monitor_printf(mon, TARGET_FMT_plx ": " TARGET_FMT_plx " %c%c%c%c%c%c%c%c%c\n", addr, @@ -243,8 +250,8 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict) } } =20 -static void mem_print(Monitor *mon, hwaddr *pstart, - int *plast_prot, +static void mem_print(Monitor *mon, CPUArchState *env, + hwaddr *pstart, int *plast_prot, hwaddr end, int prot) { int prot1; @@ -253,7 +260,9 @@ static void mem_print(Monitor *mon, hwaddr *pstart, if (*pstart !=3D -1) { monitor_printf(mon, TARGET_FMT_plx "-" TARGET_FMT_plx " " TARGET_FMT_plx " %c%c%c\n", - *pstart, end, end - *pstart, + addr_canonical(env, *pstart), + addr_canonical(env, end), + addr_canonical(env, end - *pstart), prot1 & PG_USER_MASK ? 'u' : '-', 'r', prot1 & PG_RW_MASK ? 'w' : '-'); @@ -283,7 +292,7 @@ static void mem_info_32(Monitor *mon, CPUArchState *env) if (pde & PG_PRESENT_MASK) { if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) { prot =3D pde & (PG_USER_MASK | PG_RW_MASK | PG_PRESENT_MAS= K); - mem_print(mon, &start, &last_prot, end, prot); + mem_print(mon, env, &start, &last_prot, end, prot); } else { for(l2 =3D 0; l2 < 1024; l2++) { cpu_physical_memory_read((pde & ~0xfff) + l2 * 4, &pte= , 4); @@ -295,16 +304,16 @@ static void mem_info_32(Monitor *mon, CPUArchState *e= nv) } else { prot =3D 0; } - mem_print(mon, &start, &last_prot, end, prot); + mem_print(mon, env, &start, &last_prot, end, prot); } } } else { prot =3D 0; - mem_print(mon, &start, &last_prot, end, prot); + mem_print(mon, env, &start, &last_prot, end, prot); } } /* Flush last range */ - mem_print(mon, &start, &last_prot, (hwaddr)1 << 32, 0); + mem_print(mon, env, &start, &last_prot, (hwaddr)1 << 32, 0); } =20 static void mem_info_pae32(Monitor *mon, CPUArchState *env) @@ -332,7 +341,7 @@ static void mem_info_pae32(Monitor *mon, CPUArchState *= env) if (pde & PG_PSE_MASK) { prot =3D pde & (PG_USER_MASK | PG_RW_MASK | PG_PRESENT_MASK); - mem_print(mon, &start, &last_prot, end, prot); + mem_print(mon, env, &start, &last_prot, end, prot); } else { pt_addr =3D pde & 0x3fffffffff000ULL; for (l3 =3D 0; l3 < 512; l3++) { @@ -345,21 +354,21 @@ static void mem_info_pae32(Monitor *mon, CPUArchState= *env) } else { prot =3D 0; } - mem_print(mon, &start, &last_prot, end, prot); + mem_print(mon, env, &start, &last_prot, end, p= rot); } } } else { prot =3D 0; - mem_print(mon, &start, &last_prot, end, prot); + mem_print(mon, env, &start, &last_prot, end, prot); } } } else { prot =3D 0; - mem_print(mon, &start, &last_prot, end, prot); + mem_print(mon, env, &start, &last_prot, end, prot); } } /* Flush last range */ - mem_print(mon, &start, &last_prot, (hwaddr)1 << 32, 0); + mem_print(mon, env, &start, &last_prot, (hwaddr)1 << 32, 0); } =20 =20 @@ -389,7 +398,7 @@ static void mem_info_la48(Monitor *mon, CPUArchState *e= nv) prot =3D pdpe & (PG_USER_MASK | PG_RW_MASK | PG_PRESENT_MASK); prot &=3D pml4e; - mem_print(mon, &start, &last_prot, end, prot); + mem_print(mon, env, &start, &last_prot, end, prot); } else { pd_addr =3D pdpe & 0x3fffffffff000ULL; for (l3 =3D 0; l3 < 512; l3++) { @@ -401,7 +410,8 @@ static void mem_info_la48(Monitor *mon, CPUArchState *e= nv) prot =3D pde & (PG_USER_MASK | PG_RW_M= ASK | PG_PRESENT_MASK); prot &=3D pml4e & pdpe; - mem_print(mon, &start, &last_prot, end= , prot); + mem_print(mon, env, &start, + &last_prot, end, prot); } else { pt_addr =3D pde & 0x3fffffffff000ULL; for (l4 =3D 0; l4 < 512; l4++) { @@ -418,27 +428,29 @@ static void mem_info_la48(Monitor *mon, CPUArchState = *env) } else { prot =3D 0; } - mem_print(mon, &start, &last_prot,= end, prot); + mem_print(mon, env, &start, + &last_prot, end, prot); } } } else { prot =3D 0; - mem_print(mon, &start, &last_prot, end, pr= ot); + mem_print(mon, env, &start, + &last_prot, end, prot); } } } } else { prot =3D 0; - mem_print(mon, &start, &last_prot, end, prot); + mem_print(mon, env, &start, &last_prot, end, prot); } } } else { prot =3D 0; - mem_print(mon, &start, &last_prot, end, prot); + mem_print(mon, env, &start, &last_prot, end, prot); } } /* Flush last range */ - mem_print(mon, &start, &last_prot, (hwaddr)1 << 48, 0); + mem_print(mon, env, &start, &last_prot, (hwaddr)1 << 48, 0); } =20 static void mem_info_la57(Monitor *mon, CPUArchState *env) @@ -457,7 +469,7 @@ static void mem_info_la57(Monitor *mon, CPUArchState *e= nv) end =3D l0 << 48; if (!(pml5e & PG_PRESENT_MASK)) { prot =3D 0; - mem_print(mon, &start, &last_prot, end, prot); + mem_print(mon, env, &start, &last_prot, end, prot); continue; } =20 @@ -468,7 +480,7 @@ static void mem_info_la57(Monitor *mon, CPUArchState *e= nv) end =3D (l0 << 48) + (l1 << 39); if (!(pml4e & PG_PRESENT_MASK)) { prot =3D 0; - mem_print(mon, &start, &last_prot, end, prot); + mem_print(mon, env, &start, &last_prot, end, prot); continue; } =20 @@ -479,7 +491,7 @@ static void mem_info_la57(Monitor *mon, CPUArchState *e= nv) end =3D (l0 << 48) + (l1 << 39) + (l2 << 30); if (pdpe & PG_PRESENT_MASK) { prot =3D 0; - mem_print(mon, &start, &last_prot, end, prot); + mem_print(mon, env, &start, &last_prot, end, prot); continue; } =20 @@ -487,7 +499,7 @@ static void mem_info_la57(Monitor *mon, CPUArchState *e= nv) prot =3D pdpe & (PG_USER_MASK | PG_RW_MASK | PG_PRESENT_MASK); prot &=3D pml5e & pml4e; - mem_print(mon, &start, &last_prot, end, prot); + mem_print(mon, env, &start, &last_prot, end, prot); continue; } =20 @@ -498,7 +510,7 @@ static void mem_info_la57(Monitor *mon, CPUArchState *e= nv) end =3D (l0 << 48) + (l1 << 39) + (l2 << 30) + (l3 << = 21); if (pde & PG_PRESENT_MASK) { prot =3D 0; - mem_print(mon, &start, &last_prot, end, prot); + mem_print(mon, env, &start, &last_prot, end, prot); continue; } =20 @@ -506,7 +518,7 @@ static void mem_info_la57(Monitor *mon, CPUArchState *e= nv) prot =3D pde & (PG_USER_MASK | PG_RW_MASK | PG_PRESENT_MASK); prot &=3D pml5e & pml4e & pdpe; - mem_print(mon, &start, &last_prot, end, prot); + mem_print(mon, env, &start, &last_prot, end, prot); continue; } =20 @@ -523,14 +535,14 @@ static void mem_info_la57(Monitor *mon, CPUArchState = *env) } else { prot =3D 0; } - mem_print(mon, &start, &last_prot, end, prot); + mem_print(mon, env, &start, &last_prot, end, prot); } } } } } /* Flush last range */ - mem_print(mon, &start, &last_prot, (hwaddr)1 << 57, 0); + mem_print(mon, env, &start, &last_prot, (hwaddr)1 << 57, 0); } #endif /* TARGET_X86_64 */ =20 --=20 1.8.3.1