From nobody Tue Feb 10 19:14:27 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=kernel.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1527793924007596.4657626163091; Thu, 31 May 2018 12:12:04 -0700 (PDT) Received: from localhost ([::1]:45750 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fOSzT-0001KU-55 for importer@patchew.org; Thu, 31 May 2018 15:12:03 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57243) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fOSw1-0007UU-Qg for qemu-devel@nongnu.org; Thu, 31 May 2018 15:08:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fOSw0-0006Q0-0P for qemu-devel@nongnu.org; Thu, 31 May 2018 15:08:29 -0400 Received: from mail.kernel.org ([198.145.29.99]:39700) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fOSvz-0006Os-NO for qemu-devel@nongnu.org; Thu, 31 May 2018 15:08:27 -0400 Received: from sstabellini-ThinkPad-X260.xilinx.com (unknown [149.199.62.132]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 86500208B0; Thu, 31 May 2018 19:08:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=default; t=1527793706; bh=T+VpnFqWnvbox0fKHGlYXZveDpAuY8nHggctaMOQHh8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=q6mWoR+EFzmlGnt/3LFeS4YBsC7IXrFVG4/CPdXFFkMgHG+3cpIYJXs47lnBIfCEs WfxpBJhgyvovG0HRHeOTCBkFIX6LTHT5EMhgB41vxL4tEPOZIKHl4h+rm977perX4i b/qjr2752iAoulTdRbE8oDPrsCBUBXT5N2nQJYSI= From: Stefano Stabellini To: peter.maydell@linaro.org, stefanha@gmail.com Date: Thu, 31 May 2018 12:08:23 -0700 Message-Id: <1527793703-13095-3-git-send-email-sstabellini@kernel.org> X-Mailer: git-send-email 1.9.1 In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 198.145.29.99 Subject: [Qemu-devel] [PULL 3/3] xen-hvm: stop faking I/O to access PCI config space X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sstabellini@kernel.org, qemu-devel@nongnu.org, Paul Durrant , stefanha@redhat.com, anthony.perard@citrix.com, xen-devel@lists.xenproject.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Paul Durrant This patch removes the current hackery where IOREQ_TYPE_PCI_CONFIG requests are handled by faking PIO to 0xcf8 and 0xcfc and replaces it with direct calls to pci_host_config_read/write_common(). Doing so necessitates mapping BDFs to PCIDevices but maintaining a simple QLIST in xen_device_realize/unrealize() will suffice. NOTE: whilst config space accesses are currently limited to PCI_CONFIG_SPACE_SIZE, this patch paves the way to increasing the limit to PCIE_CONFIG_SPACE_SIZE when Xen gains the ability to emulate MCFG table accesses. Signed-off-by: Paul Durrant Reviewed-by: Anthony PERARD Signed-off-by: Stefano Stabellini --- hw/i386/xen/trace-events | 2 + hw/i386/xen/xen-hvm.c | 102 +++++++++++++++++++++++++++++++++++++------= ---- 2 files changed, 84 insertions(+), 20 deletions(-) diff --git a/hw/i386/xen/trace-events b/hw/i386/xen/trace-events index 38616b6..8a9077c 100644 --- a/hw/i386/xen/trace-events +++ b/hw/i386/xen/trace-events @@ -16,6 +16,8 @@ cpu_ioreq_pio_read_reg(void *req, uint64_t data, uint64_t= addr, uint32_t size) " cpu_ioreq_pio_write_reg(void *req, uint64_t data, uint64_t addr, uint32_t = size) "I/O=3D%p pio write reg data=3D0x%"PRIx64" port=3D0x%"PRIx64" size=3D= %d" cpu_ioreq_move(void *req, uint32_t dir, uint32_t df, uint32_t data_is_ptr,= uint64_t addr, uint64_t data, uint32_t count, uint32_t size) "I/O=3D%p cop= y dir=3D%d df=3D%d ptr=3D%d port=3D0x%"PRIx64" data=3D0x%"PRIx64" count=3D%= d size=3D%d" xen_map_resource_ioreq(uint32_t id, void *addr) "id: %u addr: %p" +cpu_ioreq_config_read(void *req, uint32_t sbdf, uint32_t reg, uint32_t siz= e, uint32_t data) "I/O=3D%p sbdf=3D0x%x reg=3D%u size=3D%u data=3D0x%x" +cpu_ioreq_config_write(void *req, uint32_t sbdf, uint32_t reg, uint32_t si= ze, uint32_t data) "I/O=3D%p sbdf=3D0x%x reg=3D%u size=3D%u data=3D0x%x" =20 # xen-mapcache.c xen_map_cache(uint64_t phys_addr) "want 0x%"PRIx64 diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c index 54f99ab..935a367 100644 --- a/hw/i386/xen/xen-hvm.c +++ b/hw/i386/xen/xen-hvm.c @@ -12,6 +12,7 @@ =20 #include "cpu.h" #include "hw/pci/pci.h" +#include "hw/pci/pci_host.h" #include "hw/i386/pc.h" #include "hw/i386/apic-msidef.h" #include "hw/xen/xen_common.h" @@ -88,6 +89,12 @@ typedef struct XenPhysmap { =20 static QLIST_HEAD(, XenPhysmap) xen_physmap; =20 +typedef struct XenPciDevice { + PCIDevice *pci_dev; + uint32_t sbdf; + QLIST_ENTRY(XenPciDevice) entry; +} XenPciDevice; + typedef struct XenIOState { ioservid_t ioservid; shared_iopage_t *shared_page; @@ -108,6 +115,7 @@ typedef struct XenIOState { struct xs_handle *xenstore; MemoryListener memory_listener; MemoryListener io_listener; + QLIST_HEAD(, XenPciDevice) dev_list; DeviceListener device_listener; hwaddr free_phys_offset; const XenPhysmap *log_for_dirtybit; @@ -568,6 +576,12 @@ static void xen_device_realize(DeviceListener *listene= r, =20 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { PCIDevice *pci_dev =3D PCI_DEVICE(dev); + XenPciDevice *xendev =3D g_new(XenPciDevice, 1); + + xendev->pci_dev =3D pci_dev; + xendev->sbdf =3D PCI_BUILD_BDF(pci_dev_bus_num(pci_dev), + pci_dev->devfn); + QLIST_INSERT_HEAD(&state->dev_list, xendev, entry); =20 xen_map_pcidev(xen_domid, state->ioservid, pci_dev); } @@ -580,8 +594,17 @@ static void xen_device_unrealize(DeviceListener *liste= ner, =20 if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { PCIDevice *pci_dev =3D PCI_DEVICE(dev); + XenPciDevice *xendev, *next; =20 xen_unmap_pcidev(xen_domid, state->ioservid, pci_dev); + + QLIST_FOREACH_SAFE(xendev, &state->dev_list, entry, next) { + if (xendev->pci_dev =3D=3D pci_dev) { + QLIST_REMOVE(xendev, entry); + g_free(xendev); + break; + } + } } } =20 @@ -902,6 +925,62 @@ static void cpu_ioreq_move(ioreq_t *req) } } =20 +static void cpu_ioreq_config(XenIOState *state, ioreq_t *req) +{ + uint32_t sbdf =3D req->addr >> 32; + uint32_t reg =3D req->addr; + XenPciDevice *xendev; + + if (req->size !=3D sizeof(uint8_t) && req->size !=3D sizeof(uint16_t) = && + req->size !=3D sizeof(uint32_t)) { + hw_error("PCI config access: bad size (%u)", req->size); + } + + if (req->count !=3D 1) { + hw_error("PCI config access: bad count (%u)", req->count); + } + + QLIST_FOREACH(xendev, &state->dev_list, entry) { + if (xendev->sbdf !=3D sbdf) { + continue; + } + + if (!req->data_is_ptr) { + if (req->dir =3D=3D IOREQ_READ) { + req->data =3D pci_host_config_read_common( + xendev->pci_dev, reg, PCI_CONFIG_SPACE_SIZE, + req->size); + trace_cpu_ioreq_config_read(req, xendev->sbdf, reg, + req->size, req->data); + } else if (req->dir =3D=3D IOREQ_WRITE) { + trace_cpu_ioreq_config_write(req, xendev->sbdf, reg, + req->size, req->data); + pci_host_config_write_common( + xendev->pci_dev, reg, PCI_CONFIG_SPACE_SIZE, + req->data, req->size); + } + } else { + uint32_t tmp; + + if (req->dir =3D=3D IOREQ_READ) { + tmp =3D pci_host_config_read_common( + xendev->pci_dev, reg, PCI_CONFIG_SPACE_SIZE, + req->size); + trace_cpu_ioreq_config_read(req, xendev->sbdf, reg, + req->size, tmp); + write_phys_req_item(req->data, req, 0, &tmp); + } else if (req->dir =3D=3D IOREQ_WRITE) { + read_phys_req_item(req->data, req, 0, &tmp); + trace_cpu_ioreq_config_write(req, xendev->sbdf, reg, + req->size, tmp); + pci_host_config_write_common( + xendev->pci_dev, reg, PCI_CONFIG_SPACE_SIZE, + tmp, req->size); + } + } + } +} + static void regs_to_cpu(vmware_regs_t *vmport_regs, ioreq_t *req) { X86CPU *cpu; @@ -974,27 +1053,9 @@ static void handle_ioreq(XenIOState *state, ioreq_t *= req) case IOREQ_TYPE_INVALIDATE: xen_invalidate_map_cache(); break; - case IOREQ_TYPE_PCI_CONFIG: { - uint32_t sbdf =3D req->addr >> 32; - uint32_t val; - - /* Fake a write to port 0xCF8 so that - * the config space access will target the - * correct device model. - */ - val =3D (1u << 31) | - ((req->addr & 0x0f00) << 16) | - ((sbdf & 0xffff) << 8) | - (req->addr & 0xfc); - do_outp(0xcf8, 4, val); - - /* Now issue the config space access via - * port 0xCFC - */ - req->addr =3D 0xcfc | (req->addr & 0x03); - cpu_ioreq_pio(req); + case IOREQ_TYPE_PCI_CONFIG: + cpu_ioreq_config(state, req); break; - } default: hw_error("Invalid ioreq type 0x%x\n", req->type); } @@ -1415,6 +1476,7 @@ void xen_hvm_init(PCMachineState *pcms, MemoryRegion = **ram_memory) memory_listener_register(&state->io_listener, &address_space_io); =20 state->device_listener =3D xen_device_listener; + QLIST_INIT(&state->dev_list); device_listener_register(&state->device_listener); =20 /* Initialize backend core & drivers */ --=20 1.9.1