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[122.58.167.38]) by smtp.gmail.com with ESMTPSA id q62sm50086498pfd.172.2018.05.09.03.22.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 09 May 2018 03:22:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=A6e+Oc96R/yne0h81eqyS2dKTfKs0vOv/Aj+HUAk7AM=; b=HttGwsnZdH8ALP5hCsMnZccx2Gy9gdsKIl03X25oA/EKseIjzQWmzy3ExUqvgpLIQT eXy6ibDvINn4Jqyde0oaFnyrDkO8+L56hZHoxhuTICNNAHqxQRqtllF6rN8LVh9qFZUZ 0/q5Tfr9FlxlWLmblOrh0essTNod7cEqxayK+bb5Sc3AIaAb4hPiNly/UiE15aRCvvmQ +DSzTLP8s+ugpWnV8DGfYERgywUdm9rXmKhKa2mvxq6b/Cpeao71VSU7ymwTc3H21dn2 UPr6U/xxVuPQpQQI2yKfDXvHKuZeD96Iy+Kx/WgkK7ROScpmyiWBorJzzdqW893Td6BK slew== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=A6e+Oc96R/yne0h81eqyS2dKTfKs0vOv/Aj+HUAk7AM=; b=NhTXoXQfp7D15/MpbwPPgBjLz56xdpKowhR5Eh5wcO01GbeIg+tHe3ICIsEN2OhEeA UeD1TEGV/1hj3bF3eC9HdFz+deHHRBVbpvAvLMik+gxkTRzVqxcEj36d9LOTvQGDAc2l RxZ61CXGaTbMn9gY38GfXkkf7aqRo81tOxm815h3UQxr/VXkHoqOZizgOTQV6srFeBpR TEXygFBWqgdAPDOEidrj4tKqZTwzZQ5lX5QDaL3NWoOrE3WjfKPdKmzcscF2qfTh7xSL DEFc+716P3ShqiN/jKm5RZRSB42Ca5HDM5ZuotsTcq618rSfbN2Zpt1uTT9w2XTMV/iz nt/g== X-Gm-Message-State: ALQs6tANb2jte4POAV2TsNIr7MthMDNuZNFZdxJYTAq07QAI4c6CWAiU y+y2L2dkKSAT7DJ6rxpwrrJFCHI5huk= X-Google-Smtp-Source: AB8JxZqFwxMiRkFoXTmaEIAD0Sg9SxNTK75jT+1WP7Cv5ZOvOtzHRPf6Xq9SULmTm0/ZWOnaAQN5zw== X-Received: by 10.98.16.131 with SMTP id 3mr20410877pfq.229.1525861333562; Wed, 09 May 2018 03:22:13 -0700 (PDT) From: Michael Clark To: qemu-devel@nongnu.org Date: Wed, 9 May 2018 22:20:39 +1200 Message-Id: <1525861240-4130-3-git-send-email-mjc@sifive.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1525861240-4130-1-git-send-email-mjc@sifive.com> References: <1525861240-4130-1-git-send-email-mjc@sifive.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::244 Subject: [Qemu-devel] [PULL 2/3] riscv: htif: increase the priority of the htif subregion X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: patches@groups.riscv.org, KONRAD Frederic , Michael Clark Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: KONRAD Frederic The htif device is supposed to be mapped over an other subregion. So increa= se its priority to one to avoid any conflict. Here is the output of info mtree: Before: (qemu) info mtree address-space: memory 0000000000000000-ffffffffffffffff (prio 0, i/o): system 0000000000000000-000000000000000f (prio 0, i/o): riscv.htif.uart 0000000000000000-0000000000011fff (prio 0, ram): riscv.spike.bootrom 0000000002000000-000000000200ffff (prio 0, i/o): riscv.sifive.clint 0000000080000000-0000000087ffffff (prio 0, ram): riscv.spike.ram address-space: I/O 0000000000000000-000000000000ffff (prio 0, i/o): io address-space: cpu-memory-0 0000000000000000-ffffffffffffffff (prio 0, i/o): system 0000000000000000-000000000000000f (prio 0, i/o): riscv.htif.uart 0000000000000000-0000000000011fff (prio 0, ram): riscv.spike.bootrom 0000000002000000-000000000200ffff (prio 0, i/o): riscv.sifive.clint 0000000080000000-0000000087ffffff (prio 0, ram): riscv.spike.ram After: (qemu) info mtree address-space: memory 0000000000000000-ffffffffffffffff (prio 0, i/o): system 0000000000000000-000000000000000f (prio 1, i/o): riscv.htif.uart 0000000000000000-0000000000011fff (prio 0, ram): riscv.spike.bootrom 0000000002000000-000000000200ffff (prio 0, i/o): riscv.sifive.clint 0000000080000000-0000000087ffffff (prio 0, ram): riscv.spike.ram address-space: I/O 0000000000000000-000000000000ffff (prio 0, i/o): io address-space: cpu-memory-0 0000000000000000-ffffffffffffffff (prio 0, i/o): system 0000000000000000-000000000000000f (prio 1, i/o): riscv.htif.uart 0000000000000000-0000000000011fff (prio 0, ram): riscv.spike.bootrom 0000000002000000-000000000200ffff (prio 0, i/o): riscv.sifive.clint 0000000080000000-0000000087ffffff (prio 0, ram): riscv.spike.ram Reviewed-by: Michael Clark Signed-off-by: KONRAD Frederic Signed-off-by: Michael Clark Message-Id: <1525360636-18229-3-git-send-email-frederic.konrad@adacore.com> --- hw/riscv/riscv_htif.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/riscv/riscv_htif.c b/hw/riscv/riscv_htif.c index be252ec8cce9..f73512941fb6 100644 --- a/hw/riscv/riscv_htif.c +++ b/hw/riscv/riscv_htif.c @@ -253,8 +253,9 @@ HTIFState *htif_mm_init(MemoryRegion *address_space, Me= moryRegion *main_mem, htif_be_change, s, NULL, true); if (address_symbol_set =3D=3D 3) { memory_region_init_io(&s->mmio, NULL, &htif_mm_ops, s, - TYPE_HTIF_UART, size); - memory_region_add_subregion(address_space, base, &s->mmio); + TYPE_HTIF_UART, size); + memory_region_add_subregion_overlap(address_space, base, + &s->mmio, 1); } =20 return s; --=20 2.7.0