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X-Received-From: 2a00:1450:400c:c09::244 Subject: [Qemu-devel] [PULL 09/30] exec: extract address_space_translate_iommu, fix page_mask corner case X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This will be used to process IOMMUs in a MemoryRegionCache. This includes a small bugfix, in that the returned page_mask is now correctly -1 if the IOMMU memory region maps the entire address space directly. Previously, address_space_get_iotlb_entry would return ~TARGET_PAGE_MASK. Reviewed-by: Peter Xu Signed-off-by: Paolo Bonzini --- exec.c | 110 ++++++++++++++++++++++++++++++++++++++++++++-----------------= ---- 1 file changed, 75 insertions(+), 35 deletions(-) diff --git a/exec.c b/exec.c index 8354cdc..5f98106 100644 --- a/exec.c +++ b/exec.c @@ -462,6 +462,70 @@ address_space_translate_internal(AddressSpaceDispatch = *d, hwaddr addr, hwaddr *x } =20 /** + * address_space_translate_iommu - translate an address through an IOMMU + * memory region and then through the target address space. + * + * @iommu_mr: the IOMMU memory region that we start the translation from + * @addr: the address to be translated through the MMU + * @xlat: the translated address offset within the destination memory regi= on. + * It cannot be %NULL. + * @plen_out: valid read/write length of the translated address. It + * cannot be %NULL. + * @page_mask_out: page mask for the translated address. This + * should only be meaningful for IOMMU translated + * addresses, since there may be huge pages that this bit + * would tell. It can be %NULL if we don't care about it. + * @is_write: whether the translation operation is for write + * @is_mmio: whether this can be MMIO, set true if it can + * @target_as: the address space targeted by the IOMMU + * + * This function is called from RCU critical section. It is the common + * part of flatview_do_translate and address_space_translate_cached. + */ +static MemoryRegionSection address_space_translate_iommu(IOMMUMemoryRegion= *iommu_mr, + hwaddr *xlat, + hwaddr *plen_out, + hwaddr *page_mask= _out, + bool is_write, + bool is_mmio, + AddressSpace **ta= rget_as) +{ + MemoryRegionSection *section; + hwaddr page_mask =3D (hwaddr)-1; + + do { + hwaddr addr =3D *xlat; + IOMMUMemoryRegionClass *imrc =3D memory_region_get_iommu_class_noc= heck(iommu_mr); + IOMMUTLBEntry iotlb =3D imrc->translate(iommu_mr, addr, is_write ? + IOMMU_WO : IOMMU_RO); + + if (!(iotlb.perm & (1 << is_write))) { + goto unassigned; + } + + addr =3D ((iotlb.translated_addr & ~iotlb.addr_mask) + | (addr & iotlb.addr_mask)); + page_mask &=3D iotlb.addr_mask; + *plen_out =3D MIN(*plen_out, (addr | iotlb.addr_mask) - addr + 1); + *target_as =3D iotlb.target_as; + + section =3D address_space_translate_internal( + address_space_to_dispatch(iotlb.target_as), addr, xlat, + plen_out, is_mmio); + + iommu_mr =3D memory_region_get_iommu(section->mr); + } while (unlikely(iommu_mr)); + + if (page_mask_out) { + *page_mask_out =3D page_mask; + } + return *section; + +unassigned: + return (MemoryRegionSection) { .mr =3D &io_mem_unassigned }; +} + +/** * flatview_do_translate - translate an address in FlatView * * @fv: the flat view that we want to translate on @@ -489,55 +553,31 @@ static MemoryRegionSection flatview_do_translate(Flat= View *fv, bool is_mmio, AddressSpace **target_as) { - IOMMUTLBEntry iotlb; MemoryRegionSection *section; IOMMUMemoryRegion *iommu_mr; - IOMMUMemoryRegionClass *imrc; - hwaddr page_mask =3D (hwaddr)(-1); hwaddr plen =3D (hwaddr)(-1); =20 if (!plen_out) { plen_out =3D &plen; } =20 - for (;;) { - section =3D address_space_translate_internal( - flatview_to_dispatch(fv), addr, xlat, - plen_out, is_mmio); - - iommu_mr =3D memory_region_get_iommu(section->mr); - if (!iommu_mr) { - break; - } - imrc =3D memory_region_get_iommu_class_nocheck(iommu_mr); - - addr =3D *xlat; - iotlb =3D imrc->translate(iommu_mr, addr, is_write ? - IOMMU_WO : IOMMU_RO); - if (!(iotlb.perm & (1 << is_write))) { - goto translate_fail; - } + section =3D address_space_translate_internal( + flatview_to_dispatch(fv), addr, xlat, + plen_out, is_mmio); =20 - addr =3D ((iotlb.translated_addr & ~iotlb.addr_mask) - | (addr & iotlb.addr_mask)); - page_mask &=3D iotlb.addr_mask; - *plen_out =3D MIN(*plen_out, (addr | iotlb.addr_mask) - addr + 1); - fv =3D address_space_to_flatview(iotlb.target_as); - *target_as =3D iotlb.target_as; + iommu_mr =3D memory_region_get_iommu(section->mr); + if (unlikely(iommu_mr)) { + return address_space_translate_iommu(iommu_mr, xlat, + plen_out, page_mask_out, + is_write, is_mmio, + target_as); } - if (page_mask_out) { - if (page_mask =3D=3D (hwaddr)(-1)) { - /* Not behind an IOMMU, use default page size. */ - page_mask =3D ~TARGET_PAGE_MASK; - } - *page_mask_out =3D page_mask; + /* Not behind an IOMMU, use default page size. */ + *page_mask_out =3D ~TARGET_PAGE_MASK; } =20 return *section; - -translate_fail: - return (MemoryRegionSection) { .mr =3D &io_mem_unassigned }; } =20 /* Called from RCU critical section */ --=20 1.8.3.1