From nobody Tue Feb 10 08:27:47 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 152191601300839.72216421984092; Sat, 24 Mar 2018 11:26:53 -0700 (PDT) Received: from localhost ([::1]:46807 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eznsS-0004c3-7T for importer@patchew.org; Sat, 24 Mar 2018 14:26:52 -0400 Received: from eggs.gnu.org ([208.118.235.92]:42505) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eznpa-0001K6-QO for qemu-devel@nongnu.org; Sat, 24 Mar 2018 14:25:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ezngS-0003ja-Pc for qemu-devel@nongnu.org; Sat, 24 Mar 2018 14:18:06 -0400 Received: from mail-pl0-x242.google.com ([2607:f8b0:400e:c01::242]:38128) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ezngS-0003iz-Hm for qemu-devel@nongnu.org; Sat, 24 Mar 2018 14:14:28 -0400 Received: by mail-pl0-x242.google.com with SMTP id m22-v6so9388685pls.5 for ; Sat, 24 Mar 2018 11:14:28 -0700 (PDT) Received: from monty.com (h98.112.139.40.ip.windstream.net. [40.139.112.98]) by smtp.gmail.com with ESMTPSA id k24sm22314646pff.77.2018.03.24.11.14.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 24 Mar 2018 11:14:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=bbdXKx0Bkg09vKJlcR/YRsgOaZf7pNdNjutahpADpwE=; b=Wa/cc/vv96YXKQ54ejIwwyim0xXoPbWWZq3YOntLluJvlsMueftQaJ3IZGVBvpzh7c TSxnwpYujqz+Dt9pJHCQvV6iP9YkckptdDj0bFYVxyY4gQMOvpU0ApcihXsGd2ogsTpT YLYxoY2NqXqrHvNS4Bf3ZOks3ndkcTZMHeB+rFExQchdRRg6QmTVT7YcgVYvPYUTnYqU AWJh9V2WqcDIN1r/DUsDw5ywLeDFy4xqgwjEBiuUzFDz11K0Yuej5Jut1FJyPg0stuea /IJ3/7GLe0c9h43EPdRHmGEq7TL0OEkM3VTtY0SZGcVnl9GjMaRDTIxmTK3Ki/PUtQjA j/cw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bbdXKx0Bkg09vKJlcR/YRsgOaZf7pNdNjutahpADpwE=; b=siH+peZy3ixUsE04oaz7buttHRjhkCdF5kKaih4GtgGgqrzFl4ry7etGj3CgpjlDmR Kg3ft7ml50hur2VfR9s3hOzurFMq5Ut26uZT78P6l/8vKWrnp2X10ysEntG2a1qs5NtE bRTuGgxh7MT7DJ3Tby3pab4Zl0/cpm6mpeT3h7EL19VHusTBGu6wmQ6OKY4sgpaxbefK ijZgU9x/fxxJbqYl1ZoPceM+wqb1RnTHNetXtsHsQkYDHAf7Hd0gwk3ZLoIG65e/ws+a doDHcC8dIfiLjMh03UC+Zuk/eKy97JwGs5ai6ANZ8PfoVGoYIdlU8DkbP7ep98HLbLI6 w8TA== X-Gm-Message-State: AElRT7EE4VlpE/TsLGgv/Qd3Fbh6/34xwHtrG8bZD56+kBBpnuzAEjhr iFBhqy8W6W4+wAe4IRZxsitPxLT3Gi0= X-Google-Smtp-Source: AG47ELvqk4zHDF8hX2KlkGpSM+mb/6+h7T+FsN0Q/O/9HGQfqvOtdvemmI+ofAyDAGiFrujaAISdvA== X-Received: by 2002:a17:902:b946:: with SMTP id h6-v6mr28267206pls.35.1521915267503; Sat, 24 Mar 2018 11:14:27 -0700 (PDT) From: Michael Clark To: qemu-devel@nongnu.org Date: Sat, 24 Mar 2018 11:13:29 -0700 Message-Id: <1521915220-65389-4-git-send-email-mjc@sifive.com> X-Mailer: git-send-email 2.7.0 In-Reply-To: <1521915220-65389-1-git-send-email-mjc@sifive.com> References: <1521915220-65389-1-git-send-email-mjc@sifive.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c01::242 Subject: [Qemu-devel] [PATCH v6 10/26] RISC-V: Improve page table walker spec compliance X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: patches@groups.riscv.org, Michael Clark , Palmer Dabbelt , Sagar Karandikar , Bastian Koppelmann Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" - Inline PTE_TABLE check for better readability - Improve readibility of User page U mode and SUM test - Disallow non U mode from fetching from User pages - Add reserved PTE flag check: W or W|X - Add misaligned PPN check - Set READ flag for PTE X flag if mstatus.mxr is in effect - Change access checks from ternary operator to if statements - Improves page walker comments - No measurable performance impact on dd test Cc: Sagar Karandikar Cc: Bastian Koppelmann Signed-off-by: Michael Clark Signed-off-by: Palmer Dabbelt --- target/riscv/cpu_bits.h | 2 -- target/riscv/helper.c | 59 ++++++++++++++++++++++++++++++++++-----------= ---- 2 files changed, 41 insertions(+), 20 deletions(-) diff --git a/target/riscv/cpu_bits.h b/target/riscv/cpu_bits.h index 64aa097..12b4757 100644 --- a/target/riscv/cpu_bits.h +++ b/target/riscv/cpu_bits.h @@ -407,5 +407,3 @@ #define PTE_SOFT 0x300 /* Reserved for Software */ =20 #define PTE_PPN_SHIFT 10 - -#define PTE_TABLE(PTE) (((PTE) & (PTE_V | PTE_R | PTE_W | PTE_X)) =3D=3D P= TE_V) diff --git a/target/riscv/helper.c b/target/riscv/helper.c index 02cbcea..9010620 100644 --- a/target/riscv/helper.c +++ b/target/riscv/helper.c @@ -185,16 +185,36 @@ restart: #endif target_ulong ppn =3D pte >> PTE_PPN_SHIFT; =20 - if (PTE_TABLE(pte)) { /* next level of page table */ + if (!(pte & PTE_V)) { + /* Invalid PTE */ + return TRANSLATE_FAIL; + } else if (!(pte & (PTE_R | PTE_W | PTE_X))) { + /* Inner PTE, continue walking */ base =3D ppn << PGSHIFT; - } else if ((pte & PTE_U) ? (mode =3D=3D PRV_S) && !sum : !(mode = =3D=3D PRV_S)) { - break; - } else if (!(pte & PTE_V) || (!(pte & PTE_R) && (pte & PTE_W))) { - break; - } else if (access_type =3D=3D MMU_INST_FETCH ? !(pte & PTE_X) : - access_type =3D=3D MMU_DATA_LOAD ? !(pte & PTE_R) && - !(mxr && (pte & PTE_X)) : !((pte & PTE_R) && (pte & PTE_= W))) { - break; + } else if ((pte & (PTE_R | PTE_W | PTE_X)) =3D=3D PTE_W) { + /* Reserved leaf PTE flags: PTE_W */ + return TRANSLATE_FAIL; + } else if ((pte & (PTE_R | PTE_W | PTE_X)) =3D=3D (PTE_W | PTE_X))= { + /* Reserved leaf PTE flags: PTE_W + PTE_X */ + return TRANSLATE_FAIL; + } else if ((pte & PTE_U) && ((mode !=3D PRV_U) && + (!sum || access_type =3D=3D MMU_INST_FETCH))) { + /* User PTE flags when not U mode and mstatus.SUM is not set, + or the access type is an instruction fetch */ + return TRANSLATE_FAIL; + } else if (ppn & ((1ULL << ptshift) - 1)) { + /* Misasligned PPN */ + return TRANSLATE_FAIL; + } else if (access_type =3D=3D MMU_DATA_LOAD && !((pte & PTE_R) || + ((pte & PTE_X) && mxr))) { + /* Read access check failed */ + return TRANSLATE_FAIL; + } else if (access_type =3D=3D MMU_DATA_STORE && !(pte & PTE_W)) { + /* Write access check failed */ + return TRANSLATE_FAIL; + } else if (access_type =3D=3D MMU_INST_FETCH && !(pte & PTE_X)) { + /* Fetch access check failed */ + return TRANSLATE_FAIL; } else { /* if necessary, set accessed and dirty bits. */ target_ulong updated_pte =3D pte | PTE_A | @@ -202,11 +222,14 @@ restart: =20 /* Page table updates need to be atomic with MTTCG enabled */ if (updated_pte !=3D pte) { - /* if accessed or dirty bits need updating, and the PTE is - * in RAM, then we do so atomically with a compare and swa= p. - * if the PTE is in IO space, then it can't be updated. - * if the PTE changed, then we must re-walk the page table - as the PTE is no longer valid */ + /* + * - if accessed or dirty bits need updating, and the PTE = is + * in RAM, then we do so atomically with a compare and s= wap. + * - if the PTE is in IO space or ROM, then it can't be up= dated + * and we return TRANSLATE_FAIL. + * - if the PTE changed by the time we went to update it, = then + * it is no longer valid and we must re-walk the page ta= ble. + */ MemoryRegion *mr; hwaddr l =3D sizeof(target_ulong), addr1; mr =3D address_space_translate(cs->as, pte_addr, @@ -239,15 +262,15 @@ restart: target_ulong vpn =3D addr >> PGSHIFT; *physical =3D (ppn | (vpn & ((1L << ptshift) - 1))) << PGSHIFT; =20 - if ((pte & PTE_R)) { + /* set permissions on the TLB entry */ + if ((pte & PTE_R) || (mode !=3D PRV_U && (pte & PTE_X) && mxr)= ) { *prot |=3D PAGE_READ; } if ((pte & PTE_X)) { *prot |=3D PAGE_EXEC; } - /* only add write permission on stores or if the page - is already dirty, so that we don't miss further - page table walks to update the dirty bit */ + /* add write permission on stores or if the page is already di= rty, + so that we TLB miss on later writes to update the dirty bit= */ if ((pte & PTE_W) && (access_type =3D=3D MMU_DATA_STORE || (pte & PTE_D))) { *prot |=3D PAGE_WRITE; --=20 2.7.0