From nobody Sat Oct 25 09:04:19 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1521019048399309.1182865490556; Wed, 14 Mar 2018 02:17:28 -0700 (PDT) Received: from localhost ([::1]:45045 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ew2XD-0005S9-V1 for importer@patchew.org; Wed, 14 Mar 2018 05:17:23 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:54717) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ew2VU-0004Kf-1f for qemu-devel@nongnu.org; Wed, 14 Mar 2018 05:15:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ew2VP-0002nX-7v for qemu-devel@nongnu.org; Wed, 14 Mar 2018 05:15:36 -0400 Received: from mga04.intel.com ([192.55.52.120]:1138) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ew2VO-0002mx-K6 for qemu-devel@nongnu.org; Wed, 14 Mar 2018 05:15:30 -0400 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 Mar 2018 02:15:29 -0700 Received: from vmm.bj.intel.com ([10.238.135.172]) by orsmga003.jf.intel.com with ESMTP; 14 Mar 2018 02:15:27 -0700 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.47,469,1515484800"; d="scan'208";a="34900675" From: Luwei Kang To: qemu-devel@nongnu.org Date: Wed, 14 Mar 2018 03:26:31 +0800 Message-Id: <1520969191-18162-1-git-send-email-luwei.kang@intel.com> X-Mailer: git-send-email 2.7.4 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.120 Subject: [Qemu-devel] [PATCH] i386: Disable Intel PT if packets IP payloads have LIP values X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: pbonzini@redhat.com, Luwei Kang , ehabkost@redhat.com, rth@twiddle.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Intel processor trace should be disabled when CPUID.(EAX=3D14H,ECX=3D0H).ECX.[bit31] is set. Generated packets which contain IP payloads will have LIP values when this bit is set, or IP payloads will have RIP values. Currently, The information of CPUID 14H is constant to make live migration safty and this bit is always 0 in guest even if host support LIP values. Guest sees the bit is 0 will expect IP payloads with RIP values, but the host CPU will generate IP payloads with LIP values if this bit is set in HW. To make sure the value of IP payloads correctly, Intel PT should be disabled when bit[31] is set. Signed-off-by: Luwei Kang --- target/i386/cpu.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index ec1efd3a3c..3c0eda113e 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -194,6 +194,8 @@ * bit[02]: Support Single-Range Output scheme; */ #define INTEL_PT_MINIMAL_ECX 0x7 +/* generated packets which contain IP payloads have LIP values */ +#define INTEL_PT_IP_LIP (1 << 31) #define INTEL_PT_ADDR_RANGES_NUM 0x2 /* Number of configurable address ran= ges */ #define INTEL_PT_ADDR_RANGES_NUM_MASK 0x3 #define INTEL_PT_MTC_BITMAP (0x0249 << 16) /* Support ART(0,3,6,9) */ @@ -4159,7 +4161,8 @@ static int x86_cpu_filter_features(X86CPU *cpu) ((eax_1 & INTEL_PT_ADDR_RANGES_NUM_MASK) < INTEL_PT_ADDR_RANGES_NUM) || ((ebx_1 & (INTEL_PT_PSB_BITMAP | INTEL_PT_CYCLE_BITMAP)) !=3D - (INTEL_PT_PSB_BITMAP | INTEL_PT_CYCLE_BITMAP))) { + (INTEL_PT_PSB_BITMAP | INTEL_PT_CYCLE_BITMAP)) || + (ecx_0 & INTEL_PT_IP_LIP)) { /* * Processor Trace capabilities aren't configurable, so if the * host can't emulate the capabilities we report on --=20 2.14.3