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Processed in 0.052075 secs); 28 Feb 2018 11:02:01 -0000 From: Abdallah Bouassida To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Wed, 28 Feb 2018 12:01:25 +0100 Message-Id: <1519815685-29200-5-git-send-email-abdallah.bouassida@lauterbach.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1519815685-29200-1-git-send-email-abdallah.bouassida@lauterbach.com> References: <1519815685-29200-1-git-send-email-abdallah.bouassida@lauterbach.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 62.154.241.196 Subject: [Qemu-devel] [PATCH v3 4/4] target/arm: Add arm_gdb_set_sysreg() callback X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: khaled.jmal@lauterbach.com, qemu-arm@nongnu.org, Abdallah Bouassida Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 This is a callback to set the cp-regs registered by the dynamic XML. Signed-off-by: Abdallah Bouassida --- >> Some of our customers need to connect to Qemu using our tool TRACE32=C2= =AE=20 >> via GDB, >> and for some use case they need to have write access to some particular=20 >> cpregs. >> So, it will be nice to have this capability! >> Usually, a user won't modify these registers unless he knows what he is=20 >> doing! > I also still don't really like using write_raw_cp_reg() here -- > it will bypass some behaviour you want and in some cases will > just break the emulation because invariants we assume will > hold no longer hold. It would be a lot lot safer to not > provide write access at all, only read access. Adding to that our customers may need this write access, our tool TRACE32= =C2=AE needs this also in some particular cases. For example: temporary disabling = MMU to do a physical memory access. target/arm/cpu.h | 2 ++ target/arm/gdbstub.c | 21 ++++++++++++++++++++- target/arm/helper.c | 2 +- 3 files changed, 23 insertions(+), 2 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 0e35f64..f4fea98 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2120,6 +2120,8 @@ static inline bool cp_access_ok(int current_el, /* Raw read of a coprocessor register (as needed for migration, etc) */ uint64_t read_raw_cp_reg(CPUARMState *env, const ARMCPRegInfo *ri); =20 +void write_raw_cp_reg(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t v= ); + /** * write_list_to_cpustate * @cpu: ARMCPU diff --git a/target/arm/gdbstub.c b/target/arm/gdbstub.c index e08ad79..57bd418 100644 --- a/target/arm/gdbstub.c +++ b/target/arm/gdbstub.c @@ -183,12 +183,31 @@ static int arm_gdb_get_sysreg(CPUARMState *env, uint8= _t *buf, int reg) return 0; } =20 +static int arm_gdb_set_sysreg(CPUARMState *env, uint8_t *buf, int reg) +{ + ARMCPU *cpu =3D arm_env_get_cpu(env); + const ARMCPRegInfo *ri; + uint32_t key; + uint32_t tmp; + + tmp =3D ldl_p(buf); + key =3D cpu->dyn_xml.cpregs_keys[reg]; + ri =3D get_arm_cp_reginfo(arm_env_get_cpu(env)->cp_regs, key); + if (ri) { + if (!(ri->type & ARM_CP_CONST)) { + write_raw_cp_reg(env, ri, tmp); + return cpreg_field_is_64bit(ri) ? 8 : 4; + } + } + return 0; +} + void arm_register_gdb_regs_for_features(CPUState *cs) { int n; =20 n =3D arm_gen_dynamic_xml(cs); - gdb_register_coprocessor(cs, arm_gdb_get_sysreg, NULL, + gdb_register_coprocessor(cs, arm_gdb_get_sysreg, arm_gdb_set_sysreg, n, "system-registers.xml", 0); =20 } diff --git a/target/arm/helper.c b/target/arm/helper.c index 1594ec45..4a4afbf 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -200,7 +200,7 @@ uint64_t read_raw_cp_reg(CPUARMState *env, const ARMCPR= egInfo *ri) } } =20 -static void write_raw_cp_reg(CPUARMState *env, const ARMCPRegInfo *ri, +void write_raw_cp_reg(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t v) { /* Raw write of a coprocessor register (as needed for migration, etc). --=20 2.7.4