From nobody Mon Feb 9 02:31:02 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1518824669392146.57672528002536; Fri, 16 Feb 2018 15:44:29 -0800 (PST) Received: from localhost ([::1]:45302 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1empg2-0007SH-G0 for importer@patchew.org; Fri, 16 Feb 2018 18:44:26 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60083) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1empcf-0005E2-N3 for qemu-devel@nongnu.org; Fri, 16 Feb 2018 18:40:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1empcd-0000UB-H1 for qemu-devel@nongnu.org; Fri, 16 Feb 2018 18:40:57 -0500 Received: from out5-smtp.messagingengine.com ([66.111.4.29]:45805) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1empcd-0000Tn-B9; Fri, 16 Feb 2018 18:40:55 -0500 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id EF91C20E1C; Fri, 16 Feb 2018 18:40:54 -0500 (EST) Received: from frontend2 ([10.202.2.161]) by compute4.internal (MEProxy); Fri, 16 Feb 2018 18:40:54 -0500 Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id 9B5AD240DB; Fri, 16 Feb 2018 18:40:54 -0500 (EST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=mesmtp; bh=r5oMgvftlaLnny W+tmL8cXdLMHc/jwZltpPwrnf8VEM=; b=W4HbFHZV8GLUp3CSngXxqbOLOexp1Y tUKrvbePDhBhjwiJQ4QnPN8hXYo7XvNMqMr8C08ErgDRmBGgZHX3iRDRVgdHjwSF 99YDTj13Keg4oMn5gBl99GY1NmmJ2c2JOTy3z8943HchDg5uSjdOk3N2qjQvImd2 C5fRhug3yLI/4= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm2; bh=r5oMgvftlaLnnyW+tmL8cXdLMHc/jwZltpPwrnf8VEM=; b=F5f5uYUs ax5vuGsBYHLzKsxGiEXAvWajh3EjZLif5n6UoPZhUxFX5iSF1vk9/L0nn5h423x2 g3OH2frX1Yog/B+Nr9rte9p/yq0By/LwRkyUx6BVZNrhmCMv45oTrYyq/ftlKs4g E83HTYLkDuk9Uve83EkrmOYO6wRJ/X0KqcSQ1kppKeEplg+SM0CRjnqbnSrsdZLE Gj2tDro+vW/KPvM5KhmmaTwHvvVyhQdWELug+4CPutRUFr3qTj+ELbcIvQ39IbP7 RwFcQ7gLhccSECVHAyJVmXC5OUqz8WKDVehVwTuu+GLkXlHGzqOLxBPQn5p66I6N Ul9wX6cPnpZb9g== X-ME-Sender: From: "Emilio G. Cota" To: qemu-devel@nongnu.org Date: Fri, 16 Feb 2018 18:40:46 -0500 Message-Id: <1518824446-20235-4-git-send-email-cota@braap.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1518824446-20235-1-git-send-email-cota@braap.org> References: <1518824446-20235-1-git-send-email-cota@braap.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.111.4.29 Subject: [Qemu-devel] [PATCH 3/3] target/s390x: convert to TranslatorOps X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Cornelia Huck , qemu-s390x@nongnu.org, David Hildenbrand , Alexander Graf , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Emilio G. Cota --- target/s390x/translate.c | 170 ++++++++++++++++++++++++-------------------= ---- 1 file changed, 86 insertions(+), 84 deletions(-) diff --git a/target/s390x/translate.c b/target/s390x/translate.c index dd504a1..2b27a69 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -55,10 +55,12 @@ struct DisasContext { DisasContextBase base; const DisasInsn *insn; DisasFields *fields; + uint64_t next_page_start; uint64_t ex_value; uint64_t pc, next_pc; uint32_t ilen; enum cc_op cc_op; + bool do_debug; }; =20 /* Information carried about a condition to be evaluated. */ @@ -6108,101 +6110,92 @@ static DisasJumpType translate_one(CPUS390XState *= env, DisasContext *s) return ret; } =20 -void gen_intermediate_code(CPUState *cs, struct TranslationBlock *tb) +static int s390x_tr_init_disas_context(DisasContextBase *dcbase, + CPUState *cs, int max_insns) { - CPUS390XState *env =3D cs->env_ptr; - DisasContext dc; - uint64_t next_page_start; - int num_insns, max_insns; - DisasJumpType status; - bool do_debug; + DisasContext *s =3D container_of(dcbase, DisasContext, base); =20 - dc.base.pc_first =3D tb->pc; /* 31-bit mode */ - if (!(tb->flags & FLAG_MASK_64)) { - dc.base.pc_first &=3D 0x7fffffff; + if (!(s->base.tb->flags & FLAG_MASK_64)) { + s->base.pc_first &=3D 0x7fffffff; + s->base.pc_next =3D s->base.pc_first; } - dc.base.pc_next =3D dc.base.pc_first; - dc.base.tb =3D tb; - dc.base.singlestep_enabled =3D cs->singlestep_enabled; =20 - dc.pc =3D dc.base.pc_first; - dc.cc_op =3D CC_OP_DYNAMIC; - dc.ex_value =3D dc.base.tb->cs_base; - do_debug =3D cs->singlestep_enabled; + s->pc =3D s->base.pc_first; + s->cc_op =3D CC_OP_DYNAMIC; + s->ex_value =3D s->base.tb->cs_base; + s->do_debug =3D s->base.singlestep_enabled; + s->next_page_start =3D (s->base.pc_first & TARGET_PAGE_MASK) + + TARGET_PAGE_SIZE; =20 - next_page_start =3D (dc.base.pc_first & TARGET_PAGE_MASK) + TARGET_PAG= E_SIZE; + return max_insns; +} =20 - num_insns =3D 0; - max_insns =3D tb_cflags(tb) & CF_COUNT_MASK; - if (max_insns =3D=3D 0) { - max_insns =3D CF_COUNT_MASK; - } - if (max_insns > TCG_MAX_INSNS) { - max_insns =3D TCG_MAX_INSNS; - } +static void s390x_tr_tb_start(DisasContextBase *db, CPUState *cs) +{ +} =20 - gen_tb_start(tb); +static void s390x_tr_insn_start(DisasContextBase *dcbase, CPUState *cs) +{ + DisasContext *s =3D container_of(dcbase, DisasContext, base); =20 - do { - tcg_gen_insn_start(dc.pc, dc.cc_op); - num_insns++; + tcg_gen_insn_start(s->pc, s->cc_op); +} =20 - if (unlikely(cpu_breakpoint_test(cs, dc.base.pc_next, BP_ANY))) { - status =3D DISAS_PC_STALE; - do_debug =3D true; - /* The address covered by the breakpoint must be included in - [tb->pc, tb->pc + tb->size) in order to for it to be - properly cleared -- thus we increment the PC here so that - the logic setting tb->size below does the right thing. */ - dc.pc +=3D 2; - dc.base.pc_next +=3D 2; - break; - } +static bool s390x_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *= cs, + const CPUBreakpoint *bp) +{ + DisasContext *s =3D container_of(dcbase, DisasContext, base); =20 - if (num_insns =3D=3D max_insns && (tb_cflags(tb) & CF_LAST_IO)) { - gen_io_start(); - } + s->base.is_jmp =3D DISAS_PC_STALE; + s->do_debug =3D true; + /* The address covered by the breakpoint must be included in + [tb->pc, tb->pc + tb->size) in order to for it to be + properly cleared -- thus we increment the PC here so that + the logic setting tb->size below does the right thing. */ + s->pc +=3D 2; + s->base.pc_next +=3D 2; + return true; +} =20 - status =3D translate_one(env, &dc); - dc.base.pc_next =3D dc.pc; - - /* If we reach a page boundary, are single stepping, - or exhaust instruction count, stop generation. */ - if (status =3D=3D DISAS_NEXT - && (dc.pc >=3D next_page_start - || tcg_op_buf_full() - || num_insns >=3D max_insns - || singlestep - || dc.base.singlestep_enabled - || dc.ex_value)) { - status =3D DISAS_TOO_MANY; - } - } while (status =3D=3D DISAS_NEXT); +static void s390x_tr_translate_insn(DisasContextBase *dcbase, CPUState *cs) +{ + CPUS390XState *env =3D cs->env_ptr; + DisasContext *s =3D container_of(dcbase, DisasContext, base); + + s->base.is_jmp =3D translate_one(env, s); + s->base.pc_next =3D s->pc; =20 - if (tb_cflags(tb) & CF_LAST_IO) { - gen_io_end(); + if (s->base.is_jmp =3D=3D DISAS_NEXT + && (s->pc >=3D s->next_page_start + || s->ex_value)) { + s->base.is_jmp =3D DISAS_TOO_MANY; } +} =20 - switch (status) { +static void s390x_tr_tb_stop(DisasContextBase *dcbase, CPUState *cs) +{ + DisasContext *s =3D container_of(dcbase, DisasContext, base); + + switch (s->base.is_jmp) { case DISAS_GOTO_TB: case DISAS_NORETURN: break; case DISAS_TOO_MANY: case DISAS_PC_STALE: case DISAS_PC_STALE_NOCHAIN: - update_psw_addr(&dc); + update_psw_addr(s); /* FALLTHRU */ case DISAS_PC_UPDATED: /* Next TB starts off with CC_OP_DYNAMIC, so make sure the cc op type is in env */ - update_cc_op(&dc); + update_cc_op(s); /* FALLTHRU */ case DISAS_PC_CC_UPDATED: /* Exit the TB, either by raising a debug exception or by return. = */ - if (do_debug) { + if (s->do_debug) { gen_exception(EXCP_DEBUG); - } else if (use_exit_tb(&dc) || status =3D=3D DISAS_PC_STALE_NOCHAI= N) { + } else if (use_exit_tb(s) || s->base.is_jmp =3D=3D DISAS_PC_STALE_= NOCHAIN) { tcg_gen_exit_tb(0); } else { tcg_gen_lookup_and_goto_ptr(); @@ -6211,27 +6204,36 @@ void gen_intermediate_code(CPUState *cs, struct Tra= nslationBlock *tb) default: g_assert_not_reached(); } +} =20 - gen_tb_end(tb, num_insns); - - tb->size =3D dc.pc - dc.base.pc_first; - tb->icount =3D num_insns; +static void s390x_tr_disas_log(const DisasContextBase *dcbase, CPUState *c= s) +{ + DisasContext *s =3D container_of(dcbase, DisasContext, base); =20 -#if defined(S390X_DEBUG_DISAS) - if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM) - && qemu_log_in_addr_range(dc.base.pc_first)) { - qemu_log_lock(); - if (unlikely(dc.ex_value)) { - /* ??? Unfortunately log_target_disas can't use host memory. = */ - qemu_log("IN: EXECUTE %016" PRIx64 "\n", dc.ex_value); - } else { - qemu_log("IN: %s\n", lookup_symbol(dc.base.pc_first)); - log_target_disas(cs, dc.base.pc_first, dc.pc - dc.base.pc_firs= t); - qemu_log("\n"); - } - qemu_log_unlock(); + if (unlikely(s->ex_value)) { + /* ??? Unfortunately log_target_disas can't use host memory. */ + qemu_log("IN: EXECUTE %016" PRIx64, s->ex_value); + } else { + qemu_log("IN: %s\n", lookup_symbol(s->base.pc_first)); + log_target_disas(cs, s->base.pc_first, s->base.tb->size); } -#endif +} + +static const TranslatorOps s390x_tr_ops =3D { + .init_disas_context =3D s390x_tr_init_disas_context, + .tb_start =3D s390x_tr_tb_start, + .insn_start =3D s390x_tr_insn_start, + .breakpoint_check =3D s390x_tr_breakpoint_check, + .translate_insn =3D s390x_tr_translate_insn, + .tb_stop =3D s390x_tr_tb_stop, + .disas_log =3D s390x_tr_disas_log, +}; + +void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) +{ + DisasContext dc; + + translator_loop(&s390x_tr_ops, &dc.base, cs, tb); } =20 void restore_state_to_opc(CPUS390XState *env, TranslationBlock *tb, --=20 2.7.4