From nobody Sat Oct 25 08:28:22 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1518607564998236.09805806226257; Wed, 14 Feb 2018 03:26:04 -0800 (PST) Received: from localhost ([::1]:37549 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1elvCO-0002So-3e for importer@patchew.org; Wed, 14 Feb 2018 06:26:04 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43494) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1elv7N-0006J9-2q for qemu-devel@nongnu.org; Wed, 14 Feb 2018 06:20:54 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1elv7L-0007AQ-H7 for qemu-devel@nongnu.org; Wed, 14 Feb 2018 06:20:53 -0500 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:41982 helo=mx1.redhat.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1elv7L-0007AE-CB for qemu-devel@nongnu.org; Wed, 14 Feb 2018 06:20:51 -0500 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.rdu2.redhat.com [10.11.54.4]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0377A8182D32; Wed, 14 Feb 2018 11:20:51 +0000 (UTC) Received: from thh440s.redhat.com (ovpn-116-136.ams2.redhat.com [10.36.116.136]) by smtp.corp.redhat.com (Postfix) with ESMTP id EC3CD2024CA4; Wed, 14 Feb 2018 11:20:49 +0000 (UTC) From: Thomas Huth To: Peter Maydell , qemu-devel@nongnu.org Date: Wed, 14 Feb 2018 12:20:23 +0100 Message-Id: <1518607234-17739-8-git-send-email-thuth@redhat.com> In-Reply-To: <1518607234-17739-1-git-send-email-thuth@redhat.com> References: <1518607234-17739-1-git-send-email-thuth@redhat.com> X-Scanned-By: MIMEDefang 2.78 on 10.11.54.4 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Wed, 14 Feb 2018 11:20:51 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Wed, 14 Feb 2018 11:20:51 +0000 (UTC) for IP:'10.11.54.4' DOMAIN:'int-mx04.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'thuth@redhat.com' RCPT:'' X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.187.233.73 Subject: [Qemu-devel] [PULL 07/18] libqos: Use explicit QTestState for ahci operations X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Eric Blake Drop one more client of global_qtest by teaching all ahci test functionality to pass in an explicit QTestState. The state was already available, so no callers had to be adjusted. Signed-off-by: Eric Blake Reviewed-by: John Snow Reviewed-by: Thomas Huth Signed-off-by: Thomas Huth --- tests/libqos/ahci.c | 45 +++++++++++++++++++++++---------------------- 1 file changed, 23 insertions(+), 22 deletions(-) diff --git a/tests/libqos/ahci.c b/tests/libqos/ahci.c index 40c532e..bc201d7 100644 --- a/tests/libqos/ahci.c +++ b/tests/libqos/ahci.c @@ -283,7 +283,8 @@ void ahci_hba_enable(AHCIQState *ahci) /* Allocate Memory for the Command List Buffer & FIS Buffer */ /* PxCLB space ... 0x20 per command, as in 4.2.2 p 36 */ ahci->port[i].clb =3D ahci_alloc(ahci, num_cmd_slots * 0x20); - qmemset(ahci->port[i].clb, 0x00, num_cmd_slots * 0x20); + qtest_memset(ahci->parent->qts, ahci->port[i].clb, 0x00, + num_cmd_slots * 0x20); g_test_message("CLB: 0x%08" PRIx64, ahci->port[i].clb); ahci_px_wreg(ahci, i, AHCI_PX_CLB, ahci->port[i].clb); g_assert_cmphex(ahci->port[i].clb, =3D=3D, @@ -291,7 +292,7 @@ void ahci_hba_enable(AHCIQState *ahci) =20 /* PxFB space ... 0x100, as in 4.2.1 p 35 */ ahci->port[i].fb =3D ahci_alloc(ahci, 0x100); - qmemset(ahci->port[i].fb, 0x00, 0x100); + qtest_memset(ahci->parent->qts, ahci->port[i].fb, 0x00, 0x100); g_test_message("FB: 0x%08" PRIx64, ahci->port[i].fb); ahci_px_wreg(ahci, i, AHCI_PX_FB, ahci->port[i].fb); g_assert_cmphex(ahci->port[i].fb, =3D=3D, @@ -397,7 +398,7 @@ void ahci_port_clear(AHCIQState *ahci, uint8_t port) g_assert_cmphex(ahci_px_rreg(ahci, port, AHCI_PX_IS), =3D=3D, 0); =20 /* Wipe the FIS-Receive Buffer */ - qmemset(ahci->port[port].fb, 0x00, 0x100); + qtest_memset(ahci->parent->qts, ahci->port[port].fb, 0x00, 0x100); } =20 /** @@ -466,7 +467,7 @@ void ahci_port_check_d2h_sanity(AHCIQState *ahci, uint8= _t port, uint8_t slot) RegD2HFIS *d2h =3D g_malloc0(0x20); uint32_t reg; =20 - memread(ahci->port[port].fb + 0x40, d2h, 0x20); + qtest_memread(ahci->parent->qts, ahci->port[port].fb + 0x40, d2h, 0x20= ); g_assert_cmphex(d2h->fis_type, =3D=3D, 0x34); =20 reg =3D ahci_px_rreg(ahci, port, AHCI_PX_TFD); @@ -484,7 +485,7 @@ void ahci_port_check_pio_sanity(AHCIQState *ahci, uint8= _t port, /* We cannot check the Status or E_Status registers, because * the status may have again changed between the PIO Setup FIS * and the conclusion of the command with the D2H Register FIS. */ - memread(ahci->port[port].fb + 0x20, pio, 0x20); + qtest_memread(ahci->parent->qts, ahci->port[port].fb + 0x20, pio, 0x20= ); g_assert_cmphex(pio->fis_type, =3D=3D, 0x5f); =20 /* BUG: PIO Setup FIS as utilized by QEMU tries to fit the entire @@ -516,7 +517,7 @@ void ahci_get_command_header(AHCIQState *ahci, uint8_t = port, { uint64_t ba =3D ahci->port[port].clb; ba +=3D slot * sizeof(AHCICommandHeader); - memread(ba, cmd, sizeof(AHCICommandHeader)); + qtest_memread(ahci->parent->qts, ba, cmd, sizeof(AHCICommandHeader)); =20 cmd->flags =3D le16_to_cpu(cmd->flags); cmd->prdtl =3D le16_to_cpu(cmd->prdtl); @@ -537,7 +538,7 @@ void ahci_set_command_header(AHCIQState *ahci, uint8_t = port, tmp.prdbc =3D cpu_to_le32(cmd->prdbc); tmp.ctba =3D cpu_to_le64(cmd->ctba); =20 - memwrite(ba, &tmp, sizeof(AHCICommandHeader)); + qtest_memwrite(ahci->parent->qts, ba, &tmp, sizeof(AHCICommandHeader)); } =20 void ahci_destroy_command(AHCIQState *ahci, uint8_t port, uint8_t slot) @@ -575,7 +576,7 @@ void ahci_write_fis(AHCIQState *ahci, AHCICommand *cmd) tmp.count =3D cpu_to_le16(tmp.count); } =20 - memwrite(addr, &tmp, sizeof(tmp)); + qtest_memwrite(ahci->parent->qts, addr, &tmp, sizeof(tmp)); } =20 unsigned ahci_pick_cmd(AHCIQState *ahci, uint8_t port) @@ -636,7 +637,7 @@ void ahci_exec(AHCIQState *ahci, uint8_t port, if (opts->size && !opts->buffer) { opts->buffer =3D ahci_alloc(ahci, opts->size); g_assert(opts->buffer); - qmemset(opts->buffer, 0x00, opts->size); + qtest_memset(ahci->parent->qts, opts->buffer, 0x00, opts->size); } =20 /* Command creation */ @@ -661,15 +662,15 @@ void ahci_exec(AHCIQState *ahci, uint8_t port, ahci_command_commit(ahci, cmd, port); ahci_command_issue_async(ahci, cmd); if (opts->error) { - qmp_eventwait("STOP"); + qtest_qmp_eventwait(ahci->parent->qts, "STOP"); } if (opts->mid_cb) { rc =3D opts->mid_cb(ahci, cmd, opts); g_assert_cmpint(rc, =3D=3D, 0); } if (opts->error) { - qmp_async("{'execute':'cont' }"); - qmp_eventwait("RESUME"); + qtest_async_qmp(ahci->parent->qts, "{'execute':'cont' }"); + qtest_qmp_eventwait(ahci->parent->qts, "RESUME"); } =20 /* Wait for command to complete and verify sanity */ @@ -697,7 +698,7 @@ AHCICommand *ahci_guest_io_halt(AHCIQState *ahci, uint8= _t port, ahci_command_adjust(cmd, sector, buffer, bufsize, 0); ahci_command_commit(ahci, cmd, port); ahci_command_issue_async(ahci, cmd); - qmp_eventwait("STOP"); + qtest_qmp_eventwait(ahci->parent->qts, "STOP"); =20 return cmd; } @@ -706,8 +707,8 @@ AHCICommand *ahci_guest_io_halt(AHCIQState *ahci, uint8= _t port, void ahci_guest_io_resume(AHCIQState *ahci, AHCICommand *cmd) { /* Complete the command */ - qmp_async("{'execute':'cont' }"); - qmp_eventwait("RESUME"); + qtest_async_qmp(ahci->parent->qts, "{'execute':'cont' }"); + qtest_qmp_eventwait(ahci->parent->qts, "RESUME"); ahci_command_wait(ahci, cmd); ahci_command_verify(ahci, cmd); ahci_command_free(cmd); @@ -754,16 +755,16 @@ void ahci_io(AHCIQState *ahci, uint8_t port, uint8_t = ide_cmd, g_assert(props); ptr =3D ahci_alloc(ahci, bufsize); g_assert(!bufsize || ptr); - qmemset(ptr, 0x00, bufsize); + qtest_memset(ahci->parent->qts, ptr, 0x00, bufsize); =20 if (bufsize && props->write) { - bufwrite(ptr, buffer, bufsize); + qtest_bufwrite(ahci->parent->qts, ptr, buffer, bufsize); } =20 ahci_guest_io(ahci, port, ide_cmd, ptr, bufsize, sector); =20 if (bufsize && props->read) { - bufread(ptr, buffer, bufsize); + qtest_bufread(ahci->parent->qts, ptr, buffer, bufsize); } =20 ahci_free(ahci, ptr); @@ -901,7 +902,7 @@ static int copy_buffer(AHCIQState *ahci, AHCICommand *c= md, const AHCIOpts *opts) { unsigned char *rx =3D opts->opaque; - bufread(opts->buffer, rx, opts->size); + qtest_bufread(ahci->parent->qts, opts->buffer, rx, opts->size); return 0; } =20 @@ -1141,7 +1142,7 @@ void ahci_command_commit(AHCIQState *ahci, AHCIComman= d *cmd, uint8_t port) ahci_write_fis(ahci, cmd); /* Then ATAPI CMD, if needed */ if (cmd->props->atapi) { - memwrite(table_ptr + 0x40, cmd->atapi_cmd, 16); + qtest_memwrite(ahci->parent->qts, table_ptr + 0x40, cmd->atapi_cmd= , 16); } =20 /* Construct and write the PRDs to the command table */ @@ -1162,8 +1163,8 @@ void ahci_command_commit(AHCIQState *ahci, AHCIComman= d *cmd, uint8_t port) prd.dbc |=3D cpu_to_le32(0x80000000); /* Request DPS Interrupt */ =20 /* Commit the PRD entry to the Command Table */ - memwrite(table_ptr + 0x80 + (i * sizeof(PRD)), - &prd, sizeof(PRD)); + qtest_memwrite(ahci->parent->qts, table_ptr + 0x80 + (i * sizeof(P= RD)), + &prd, sizeof(PRD)); } =20 /* Bookmark the PRDTL and CTBA values */ --=20 1.8.3.1