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Iglesias" To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Fri, 26 Jan 2018 11:22:36 +0100 Message-Id: <1516962162-25680-4-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516962162-25680-1-git-send-email-edgar.iglesias@gmail.com> References: <1516962162-25680-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4010:c07::243 Subject: [Qemu-devel] [PULL v2 3/9] xlnx-zynqmp-pmu: Add the CPU and memory X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sai.pavan.boddu@xilinx.com, edgar.iglesias@xilinx.com, alistai@xilinx.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Alistair Francis Connect the MicroBlaze CPU and the ROM and RAM memory regions. Signed-off-by: Alistair Francis Reviewed-by: Edgar E. Iglesias Signed-off-by: Edgar E. Iglesias --- hw/microblaze/xlnx-zynqmp-pmu.c | 70 +++++++++++++++++++++++++++++++++++++= ++-- 1 file changed, 68 insertions(+), 2 deletions(-) diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pm= u.c index ac0f789..145837b 100644 --- a/hw/microblaze/xlnx-zynqmp-pmu.c +++ b/hw/microblaze/xlnx-zynqmp-pmu.c @@ -18,8 +18,11 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qemu-common.h" +#include "exec/address-spaces.h" #include "hw/boards.h" +#include "hw/qdev-properties.h" #include "cpu.h" +#include "boot.h" =20 /* Define the PMU device */ =20 @@ -27,21 +30,56 @@ #define XLNX_ZYNQMP_PMU_SOC(obj) OBJECT_CHECK(XlnxZynqMPPMUSoCState, (obj)= , \ TYPE_XLNX_ZYNQMP_PMU_SOC) =20 +#define XLNX_ZYNQMP_PMU_ROM_SIZE 0x8000 +#define XLNX_ZYNQMP_PMU_ROM_ADDR 0xFFD00000 +#define XLNX_ZYNQMP_PMU_RAM_ADDR 0xFFDC0000 + typedef struct XlnxZynqMPPMUSoCState { /*< private >*/ DeviceState parent_obj; =20 /*< public >*/ + MicroBlazeCPU cpu; } XlnxZynqMPPMUSoCState; =20 static void xlnx_zynqmp_pmu_soc_init(Object *obj) { + XlnxZynqMPPMUSoCState *s =3D XLNX_ZYNQMP_PMU_SOC(obj); =20 + object_initialize(&s->cpu, sizeof(s->cpu), + TYPE_MICROBLAZE_CPU); + object_property_add_child(obj, "pmu-cpu", OBJECT(&s->cpu), + &error_abort); } =20 static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp) { - + XlnxZynqMPPMUSoCState *s =3D XLNX_ZYNQMP_PMU_SOC(dev); + Error *err =3D NULL; + + object_property_set_uint(OBJECT(&s->cpu), XLNX_ZYNQMP_PMU_ROM_ADDR, + "base-vectors", &error_abort); + object_property_set_bool(OBJECT(&s->cpu), true, "use-stack-protection", + &error_abort); + object_property_set_uint(OBJECT(&s->cpu), 0, "use-fpu", &error_abort); + object_property_set_uint(OBJECT(&s->cpu), 0, "use-hw-mul", &error_abor= t); + object_property_set_bool(OBJECT(&s->cpu), true, "use-barrel", + &error_abort); + object_property_set_bool(OBJECT(&s->cpu), true, "use-msr-instr", + &error_abort); + object_property_set_bool(OBJECT(&s->cpu), true, "use-pcmp-instr", + &error_abort); + object_property_set_bool(OBJECT(&s->cpu), false, "use-mmu", &error_abo= rt); + object_property_set_bool(OBJECT(&s->cpu), true, "endianness", + &error_abort); + object_property_set_str(OBJECT(&s->cpu), "8.40.b", "version", + &error_abort); + object_property_set_uint(OBJECT(&s->cpu), 0, "pvr", &error_abort); + object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } } =20 static void xlnx_zynqmp_pmu_soc_class_init(ObjectClass *oc, void *data) @@ -70,7 +108,35 @@ type_init(xlnx_zynqmp_pmu_soc_register_types) =20 static void xlnx_zynqmp_pmu_init(MachineState *machine) { - + XlnxZynqMPPMUSoCState *pmu =3D g_new0(XlnxZynqMPPMUSoCState, 1); + MemoryRegion *address_space_mem =3D get_system_memory(); + MemoryRegion *pmu_rom =3D g_new(MemoryRegion, 1); + MemoryRegion *pmu_ram =3D g_new(MemoryRegion, 1); + + /* Create the ROM */ + memory_region_init_rom(pmu_rom, NULL, "xlnx-zynqmp-pmu.rom", + XLNX_ZYNQMP_PMU_ROM_SIZE, &error_fatal); + memory_region_add_subregion(address_space_mem, XLNX_ZYNQMP_PMU_ROM_ADD= R, + pmu_rom); + + /* Create the RAM */ + memory_region_init_ram(pmu_ram, NULL, "xlnx-zynqmp-pmu.ram", + machine->ram_size, &error_fatal); + memory_region_add_subregion(address_space_mem, XLNX_ZYNQMP_PMU_RAM_ADD= R, + pmu_ram); + + /* Create the PMU device */ + object_initialize(pmu, sizeof(XlnxZynqMPPMUSoCState), TYPE_XLNX_ZYNQMP= _PMU_SOC); + object_property_add_child(OBJECT(machine), "pmu", OBJECT(pmu), + &error_abort); + object_property_set_bool(OBJECT(pmu), true, "realized", &error_fatal); + + /* Load the kernel */ + microblaze_load_kernel(&pmu->cpu, XLNX_ZYNQMP_PMU_RAM_ADDR, + machine->ram_size, + machine->initrd_filename, + machine->dtb, + NULL); } =20 static void xlnx_zynqmp_pmu_machine_init(MachineClass *mc) --=20 2.7.4