From nobody Mon Apr 14 22:48:04 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516887953842882.8673933301353; Thu, 25 Jan 2018 05:45:53 -0800 (PST) Received: from localhost ([::1]:41382 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eehqe-0004T5-8A for importer@patchew.org; Thu, 25 Jan 2018 08:45:48 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33592) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eehoc-0003BL-9D for qemu-devel@nongnu.org; Thu, 25 Jan 2018 08:43:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eehob-00035Q-As for qemu-devel@nongnu.org; Thu, 25 Jan 2018 08:43:42 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45984) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eehob-00033y-1s for qemu-devel@nongnu.org; Thu, 25 Jan 2018 08:43:41 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1eehoV-0006ro-Tu for qemu-devel@nongnu.org; Thu, 25 Jan 2018 13:43:35 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Thu, 25 Jan 2018 13:43:14 +0000 Message-Id: <1516887809-6265-7-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516887809-6265-1-git-send-email-peter.maydell@linaro.org> References: <1516887809-6265-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 06/21] target/arm: Use pointers in neon tbl helper X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Richard Henderson Rather than passing a regno to the helper, pass pointers to the vector register directly. This eliminates the need to pass in the environment pointer and reduces the number of places that directly access env->vfp.regs[]. Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Message-id: 20180119045438.28582-5-richard.henderson@linaro.org Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Peter Maydell --- target/arm/helper.h | 2 +- target/arm/op_helper.c | 17 +++++++---------- target/arm/translate.c | 8 ++++---- 3 files changed, 12 insertions(+), 15 deletions(-) diff --git a/target/arm/helper.h b/target/arm/helper.h index dbdc38f..5dec2e6 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -188,7 +188,7 @@ DEF_HELPER_FLAGS_2(rsqrte_f32, TCG_CALL_NO_RWG, f32, f3= 2, ptr) DEF_HELPER_FLAGS_2(rsqrte_f64, TCG_CALL_NO_RWG, f64, f64, ptr) DEF_HELPER_2(recpe_u32, i32, i32, ptr) DEF_HELPER_FLAGS_2(rsqrte_u32, TCG_CALL_NO_RWG, i32, i32, ptr) -DEF_HELPER_5(neon_tbl, i32, env, i32, i32, i32, i32) +DEF_HELPER_FLAGS_4(neon_tbl, TCG_CALL_NO_RWG, i32, i32, i32, ptr, i32) =20 DEF_HELPER_3(shl_cc, i32, env, i32, i32) DEF_HELPER_3(shr_cc, i32, env, i32, i32) diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c index 712c5c5..a937e76 100644 --- a/target/arm/op_helper.c +++ b/target/arm/op_helper.c @@ -54,20 +54,17 @@ static int exception_target_el(CPUARMState *env) return target_el; } =20 -uint32_t HELPER(neon_tbl)(CPUARMState *env, uint32_t ireg, uint32_t def, - uint32_t rn, uint32_t maxindex) +uint32_t HELPER(neon_tbl)(uint32_t ireg, uint32_t def, void *vn, + uint32_t maxindex) { - uint32_t val; - uint32_t tmp; - int index; - int shift; - uint64_t *table; - table =3D (uint64_t *)&env->vfp.regs[rn]; + uint32_t val, shift; + uint64_t *table =3D vn; + val =3D 0; for (shift =3D 0; shift < 32; shift +=3D 8) { - index =3D (ireg >> shift) & 0xff; + uint32_t index =3D (ireg >> shift) & 0xff; if (index < maxindex) { - tmp =3D (table[index >> 3] >> ((index & 7) << 3)) & 0xff; + uint32_t tmp =3D (table[index >> 3] >> ((index & 7) << 3)) & 0= xff; val |=3D tmp << shift; } else { val |=3D def & (0xff << shift); diff --git a/target/arm/translate.c b/target/arm/translate.c index 6f02c56..852d2a7 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -7544,9 +7544,9 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) tcg_gen_movi_i32(tmp, 0); } tmp2 =3D neon_load_reg(rm, 0); - tmp4 =3D tcg_const_i32(rn); + ptr1 =3D vfp_reg_ptr(true, rn); tmp5 =3D tcg_const_i32(n); - gen_helper_neon_tbl(tmp2, cpu_env, tmp2, tmp, tmp4, tmp5); + gen_helper_neon_tbl(tmp2, tmp2, tmp, ptr1, tmp5); tcg_temp_free_i32(tmp); if (insn & (1 << 6)) { tmp =3D neon_load_reg(rd, 1); @@ -7555,9 +7555,9 @@ static int disas_neon_data_insn(DisasContext *s, uint= 32_t insn) tcg_gen_movi_i32(tmp, 0); } tmp3 =3D neon_load_reg(rm, 1); - gen_helper_neon_tbl(tmp3, cpu_env, tmp3, tmp, tmp4, tmp5); + gen_helper_neon_tbl(tmp3, tmp3, tmp, ptr1, tmp5); tcg_temp_free_i32(tmp5); - tcg_temp_free_i32(tmp4); + tcg_temp_free_ptr(ptr1); neon_store_reg(rd, 0, tmp2); neon_store_reg(rd, 1, tmp3); tcg_temp_free_i32(tmp); --=20 2.7.4