From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516110536688295.9951106158129; Tue, 16 Jan 2018 05:48:56 -0800 (PST) Received: from localhost ([::1]:36808 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRbg-00031C-L8 for importer@patchew.org; Tue, 16 Jan 2018 08:48:52 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37479) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRO0-0008HT-HJ for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:48 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebRNu-0002qm-Jo for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:44 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45892) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebRNu-0002oE-Co for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:38 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNi-0002pF-Mq for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:26 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:33:56 +0000 Message-Id: <1516109659-1557-2-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 01/24] hw/intc/armv7m: Support byte and halfword accesses to CFSR X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 The Configurable Fault Status Register for ARMv7M and v8M is supposed to be byte and halfword accessible, but we were only implementing word accesses. Add support for the other access sizes, which are used by the Zephyr RTOS. Signed-off-by: Peter Maydell Reported-by: Andy Gross Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-id: 1512742372-31517-1-git-send-email-peter.maydell@linaro.org --- hw/intc/armv7m_nvic.c | 38 ++++++++++++++++++++++---------------- 1 file changed, 22 insertions(+), 16 deletions(-) diff --git a/hw/intc/armv7m_nvic.c b/hw/intc/armv7m_nvic.c index dd49b6c..8ca6cee 100644 --- a/hw/intc/armv7m_nvic.c +++ b/hw/intc/armv7m_nvic.c @@ -896,13 +896,6 @@ static uint32_t nvic_readl(NVICState *s, uint32_t offs= et, MemTxAttrs attrs) val |=3D (1 << 8); } return val; - case 0xd28: /* Configurable Fault Status. */ - /* The BFSR bits [15:8] are shared between security states - * and we store them in the NS copy - */ - val =3D cpu->env.v7m.cfsr[attrs.secure]; - val |=3D cpu->env.v7m.cfsr[M_REG_NS] & R_V7M_CFSR_BFSR_MASK; - return val; case 0xd2c: /* Hard Fault Status. */ return cpu->env.v7m.hfsr; case 0xd30: /* Debug Fault Status. */ @@ -1280,15 +1273,6 @@ static void nvic_writel(NVICState *s, uint32_t offse= t, uint32_t value, s->vectors[ARMV7M_EXCP_DEBUG].active =3D (value & (1 << 8)) !=3D 0; nvic_irq_update(s); break; - case 0xd28: /* Configurable Fault Status. */ - cpu->env.v7m.cfsr[attrs.secure] &=3D ~value; /* W1C */ - if (attrs.secure) { - /* The BFSR bits [15:8] are shared between security states - * and we store them in the NS copy. - */ - cpu->env.v7m.cfsr[M_REG_NS] &=3D ~(value & R_V7M_CFSR_BFSR_MAS= K); - } - break; case 0xd2c: /* Hard Fault Status. */ cpu->env.v7m.hfsr &=3D ~value; /* W1C */ break; @@ -1667,6 +1651,14 @@ static MemTxResult nvic_sysreg_read(void *opaque, hw= addr addr, val =3D deposit32(val, i * 8, 8, get_prio(s, hdlidx, sbank)); } break; + case 0xd28 ... 0xd2b: /* Configurable Fault Status (CFSR) */ + /* The BFSR bits [15:8] are shared between security states + * and we store them in the NS copy + */ + val =3D s->cpu->env.v7m.cfsr[attrs.secure]; + val |=3D s->cpu->env.v7m.cfsr[M_REG_NS] & R_V7M_CFSR_BFSR_MASK; + val =3D extract32(val, (offset - 0xd28) * 8, size * 8); + break; case 0xfe0 ... 0xfff: /* ID. */ if (offset & 3) { val =3D 0; @@ -1765,6 +1757,20 @@ static MemTxResult nvic_sysreg_write(void *opaque, h= waddr addr, } nvic_irq_update(s); return MEMTX_OK; + case 0xd28 ... 0xd2b: /* Configurable Fault Status (CFSR) */ + /* All bits are W1C, so construct 32 bit value with 0s in + * the parts not written by the access size + */ + value <<=3D ((offset - 0xd28) * 8); + + s->cpu->env.v7m.cfsr[attrs.secure] &=3D ~value; + if (attrs.secure) { + /* The BFSR bits [15:8] are shared between security states + * and we store them in the NS copy. + */ + s->cpu->env.v7m.cfsr[M_REG_NS] &=3D ~(value & R_V7M_CFSR_BFSR_= MASK); + } + return MEMTX_OK; } if (size =3D=3D 4) { nvic_writel(s, offset, value, attrs); --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516110543087992.7999578053535; Tue, 16 Jan 2018 05:49:03 -0800 (PST) Received: from localhost ([::1]:36809 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRbq-00039G-7p for importer@patchew.org; Tue, 16 Jan 2018 08:49:02 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37460) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRNz-0008Gi-Qp for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebRNt-0002q4-Uf for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:43 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45890) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebRNt-0002my-O8 for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:37 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNj-0002pm-Do for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:27 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:33:57 +0000 Message-Id: <1516109659-1557-3-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 02/24] get_phys_addr_pmsav7: Support AP=0b111 for v7M X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 For PMSAv7, the v7A/R Arm ARM defines that setting AP to 0b111 is an UNPREDICTABLE reserved combination. However, for v7M this value is documented as having the same behaviour as 0b110: read-only for both privileged and unprivileged. Accept this value on an M profile core rather than treating it as a guest error and a no-access page. Reported-by: Andy Gross Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-id: 1512742402-31669-1-git-send-email-peter.maydell@linaro.org --- target/arm/helper.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/target/arm/helper.c b/target/arm/helper.c index d1395f9..eb80f79 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -9272,6 +9272,13 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, u= int32_t address, case 6: *prot |=3D PAGE_READ | PAGE_EXEC; break; + case 7: + /* for v7M, same as 6; for R profile a reserved value = */ + if (arm_feature(env, ARM_FEATURE_M)) { + *prot |=3D PAGE_READ | PAGE_EXEC; + break; + } + /* fall through */ default: qemu_log_mask(LOG_GUEST_ERROR, "DRACR[%d]: Bad value for AP bits: 0x%" @@ -9290,6 +9297,13 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, u= int32_t address, case 6: *prot |=3D PAGE_READ | PAGE_EXEC; break; + case 7: + /* for v7M, same as 6; for R profile a reserved value = */ + if (arm_feature(env, ARM_FEATURE_M)) { + *prot |=3D PAGE_READ | PAGE_EXEC; + break; + } + /* fall through */ default: qemu_log_mask(LOG_GUEST_ERROR, "DRACR[%d]: Bad value for AP bits: 0x%" --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516109982090887.1233879877703; Tue, 16 Jan 2018 05:39:42 -0800 (PST) Received: from localhost ([::1]:36753 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRSh-0003az-UU for importer@patchew.org; Tue, 16 Jan 2018 08:39:36 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37374) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRNu-0008Bi-Sc for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebRNt-0002py-UF for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:38 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45886) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebRNt-0002gG-NS for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:37 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNk-0002qG-3e for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:28 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:33:58 +0000 Message-Id: <1516109659-1557-4-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 03/24] hw/arm/virt: Add virt-2.12 machine type X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add virt-2.12 machine type. Signed-off-by: Peter Maydell --- hw/arm/virt.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 151592b..543f9bd 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -1618,7 +1618,7 @@ static void machvirt_machine_init(void) } type_init(machvirt_machine_init); =20 -static void virt_2_11_instance_init(Object *obj) +static void virt_2_12_instance_init(Object *obj) { VirtMachineState *vms =3D VIRT_MACHINE(obj); VirtMachineClass *vmc =3D VIRT_MACHINE_GET_CLASS(vms); @@ -1678,10 +1678,25 @@ static void virt_2_11_instance_init(Object *obj) vms->irqmap =3D a15irqmap; } =20 +static void virt_machine_2_12_options(MachineClass *mc) +{ +} +DEFINE_VIRT_MACHINE_AS_LATEST(2, 12) + +#define VIRT_COMPAT_2_11 \ + HW_COMPAT_2_11 + +static void virt_2_11_instance_init(Object *obj) +{ + virt_2_12_instance_init(obj); +} + static void virt_machine_2_11_options(MachineClass *mc) { + virt_machine_2_12_options(mc); + SET_MACHINE_COMPAT(mc, VIRT_COMPAT_2_11); } -DEFINE_VIRT_MACHINE_AS_LATEST(2, 11) +DEFINE_VIRT_MACHINE(2, 11) =20 #define VIRT_COMPAT_2_10 \ HW_COMPAT_2_10 --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516109811363705.6078917760416; Tue, 16 Jan 2018 05:36:51 -0800 (PST) Received: from localhost ([::1]:36741 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRQ2-0001G1-H9 for importer@patchew.org; Tue, 16 Jan 2018 08:36:50 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37369) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRNu-0008BT-Jc for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebRNt-0002pM-Ck for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:38 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45888) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebRNt-0002ll-4E for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:37 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNk-0002qh-Sy for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:28 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:33:59 +0000 Message-Id: <1516109659-1557-5-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 04/24] target/arm: Handle page table walk load failures correctly X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Instead of ignoring the response from address_space_ld*() (indicating an attempt to read a page table descriptor from an invalid physical address), use it to report the failure correctly. Since this is another couple of locations where we need to decide the value of the ARMMMUFaultInfo ea bit based on a MemTxResult, we factor out that operation into a helper function. Signed-off-by: Peter Maydell --- target/arm/internals.h | 10 ++++++++++ target/arm/helper.c | 39 ++++++++++++++++++++++++++++++++++----- target/arm/op_helper.c | 7 +------ 3 files changed, 45 insertions(+), 11 deletions(-) diff --git a/target/arm/internals.h b/target/arm/internals.h index 876854d..89f5d2f 100644 --- a/target/arm/internals.h +++ b/target/arm/internals.h @@ -687,6 +687,16 @@ static inline uint32_t arm_fi_to_lfsc(ARMMMUFaultInfo = *fi) return fsc; } =20 +static inline bool arm_extabort_type(MemTxResult result) +{ + /* The EA bit in syndromes and fault status registers is an + * IMPDEF classification of external aborts. ARM implementations + * usually use this to indicate AXI bus Decode error (0) or + * Slave error (1); in QEMU we follow that. + */ + return result !=3D MEMTX_DECODE_ERROR; +} + /* Do a page table walk and add page to TLB if possible */ bool arm_tlb_fill(CPUState *cpu, vaddr address, MMUAccessType access_type, int mmu_idx, diff --git a/target/arm/helper.c b/target/arm/helper.c index eb80f79..c83c901 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -8305,6 +8305,7 @@ static hwaddr S1_ptw_translate(CPUARMState *env, ARMM= MUIdx mmu_idx, ret =3D get_phys_addr_lpae(env, addr, 0, ARMMMUIdx_S2NS, &s2pa, &txattrs, &s2prot, &s2size, fi, NULL); if (ret) { + assert(fi->type !=3D ARMFault_None); fi->s2addr =3D addr; fi->stage2 =3D true; fi->s1ptw =3D true; @@ -8328,7 +8329,9 @@ static uint32_t arm_ldl_ptw(CPUState *cs, hwaddr addr= , bool is_secure, ARMCPU *cpu =3D ARM_CPU(cs); CPUARMState *env =3D &cpu->env; MemTxAttrs attrs =3D {}; + MemTxResult result =3D MEMTX_OK; AddressSpace *as; + uint32_t data; =20 attrs.secure =3D is_secure; as =3D arm_addressspace(cs, attrs); @@ -8337,10 +8340,16 @@ static uint32_t arm_ldl_ptw(CPUState *cs, hwaddr ad= dr, bool is_secure, return 0; } if (regime_translation_big_endian(env, mmu_idx)) { - return address_space_ldl_be(as, addr, attrs, NULL); + data =3D address_space_ldl_be(as, addr, attrs, &result); } else { - return address_space_ldl_le(as, addr, attrs, NULL); + data =3D address_space_ldl_le(as, addr, attrs, &result); } + if (result =3D=3D MEMTX_OK) { + return data; + } + fi->type =3D ARMFault_SyncExternalOnWalk; + fi->ea =3D arm_extabort_type(result); + return 0; } =20 static uint64_t arm_ldq_ptw(CPUState *cs, hwaddr addr, bool is_secure, @@ -8349,7 +8358,9 @@ static uint64_t arm_ldq_ptw(CPUState *cs, hwaddr addr= , bool is_secure, ARMCPU *cpu =3D ARM_CPU(cs); CPUARMState *env =3D &cpu->env; MemTxAttrs attrs =3D {}; + MemTxResult result =3D MEMTX_OK; AddressSpace *as; + uint32_t data; =20 attrs.secure =3D is_secure; as =3D arm_addressspace(cs, attrs); @@ -8358,10 +8369,16 @@ static uint64_t arm_ldq_ptw(CPUState *cs, hwaddr ad= dr, bool is_secure, return 0; } if (regime_translation_big_endian(env, mmu_idx)) { - return address_space_ldq_be(as, addr, attrs, NULL); + data =3D address_space_ldq_be(as, addr, attrs, &result); } else { - return address_space_ldq_le(as, addr, attrs, NULL); + data =3D address_space_ldq_le(as, addr, attrs, &result); + } + if (result =3D=3D MEMTX_OK) { + return data; } + fi->type =3D ARMFault_SyncExternalOnWalk; + fi->ea =3D arm_extabort_type(result); + return 0; } =20 static bool get_phys_addr_v5(CPUARMState *env, uint32_t address, @@ -8390,6 +8407,9 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32= _t address, } desc =3D arm_ldl_ptw(cs, table, regime_is_secure(env, mmu_idx), mmu_idx, fi); + if (fi->type !=3D ARMFault_None) { + goto do_fault; + } type =3D (desc & 3); domain =3D (desc >> 5) & 0x0f; if (regime_el(env, mmu_idx) =3D=3D 1) { @@ -8426,6 +8446,9 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32= _t address, } desc =3D arm_ldl_ptw(cs, table, regime_is_secure(env, mmu_idx), mmu_idx, fi); + if (fi->type !=3D ARMFault_None) { + goto do_fault; + } switch (desc & 3) { case 0: /* Page translation fault. */ fi->type =3D ARMFault_Translation; @@ -8508,6 +8531,9 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32= _t address, } desc =3D arm_ldl_ptw(cs, table, regime_is_secure(env, mmu_idx), mmu_idx, fi); + if (fi->type !=3D ARMFault_None) { + goto do_fault; + } type =3D (desc & 3); if (type =3D=3D 0 || (type =3D=3D 3 && !arm_feature(env, ARM_FEATURE_P= XN))) { /* Section translation fault, or attempt to use the encoding @@ -8559,6 +8585,9 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32= _t address, table =3D (desc & 0xfffffc00) | ((address >> 10) & 0x3fc); desc =3D arm_ldl_ptw(cs, table, regime_is_secure(env, mmu_idx), mmu_idx, fi); + if (fi->type !=3D ARMFault_None) { + goto do_fault; + } ap =3D ((desc >> 4) & 3) | ((desc >> 7) & 4); switch (desc & 3) { case 0: /* Page translation fault. */ @@ -8964,7 +8993,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, targ= et_ulong address, descaddr &=3D ~7ULL; nstable =3D extract32(tableattrs, 4, 1); descriptor =3D arm_ldq_ptw(cs, descaddr, !nstable, mmu_idx, fi); - if (fi->s1ptw) { + if (fi->type !=3D ARMFault_None) { goto do_fault; } =20 diff --git a/target/arm/op_helper.c b/target/arm/op_helper.c index b362063..712c5c5 100644 --- a/target/arm/op_helper.c +++ b/target/arm/op_helper.c @@ -220,12 +220,7 @@ void arm_cpu_do_transaction_failed(CPUState *cs, hwadd= r physaddr, /* now we have a real cpu fault */ cpu_restore_state(cs, retaddr); =20 - /* The EA bit in syndromes and fault status registers is an - * IMPDEF classification of external aborts. ARM implementations - * usually use this to indicate AXI bus Decode error (0) or - * Slave error (1); in QEMU we follow that. - */ - fi.ea =3D (response !=3D MEMTX_DECODE_ERROR); + fi.ea =3D arm_extabort_type(response); fi.type =3D ARMFault_SyncExternal; deliver_fault(cpu, addr, access_type, mmu_idx, &fi); } --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516110348425430.2788072763211; Tue, 16 Jan 2018 05:45:48 -0800 (PST) Received: from localhost ([::1]:36792 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRYh-0000aa-It for importer@patchew.org; Tue, 16 Jan 2018 08:45:47 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37340) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRNt-0008B0-Vg for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebRNs-0002oW-VN for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:38 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45890) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebRNs-0002my-P1 for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:36 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNl-0002r8-LN for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:29 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:34:00 +0000 Message-Id: <1516109659-1557-6-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 05/24] hw/sd/pl181: Reset SD card on controller reset X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Since pl181 is still using the legacy SD card API, the SD card created by sd_init() is not plugged into any bus. This means that the controller has to reset it manually. Failing to do this mostly didn't affect the guest since the guest typically does a programmed SD card reset as part of its SD controller driver initialization, but meant that migration failed because it's only in sd_reset() that we set up the wpgrps_size field. Cc: qemu-stable@nongnu.org Fixes: https://bugs.launchpad.net/qemu/+bug/1739378 Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 Message-id: 1515506513-31961-2-git-send-email-peter.maydell@linaro.org --- hw/sd/pl181.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/sd/pl181.c b/hw/sd/pl181.c index 55c8098..3ba1f7d 100644 --- a/hw/sd/pl181.c +++ b/hw/sd/pl181.c @@ -480,6 +480,10 @@ static void pl181_reset(DeviceState *d) =20 /* We can assume our GPIO outputs have been wired up now */ sd_set_cb(s->card, s->cardstatus[0], s->cardstatus[1]); + /* Since we're still using the legacy SD API the card is not plugged + * into any bus, and we must reset it manually. + */ + device_reset(DEVICE(s->card)); } =20 static void pl181_init(Object *obj) --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516109811628420.4417364499907; Tue, 16 Jan 2018 05:36:51 -0800 (PST) Received: from localhost ([::1]:36742 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRQ2-0001Gb-RG for importer@patchew.org; Tue, 16 Jan 2018 08:36:50 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37322) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRNt-0008AZ-DX for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebRNs-0002o6-EM for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:37 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45888) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebRNs-0002ll-82 for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:36 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNm-0002ra-CI for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:30 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:34:01 +0000 Message-Id: <1516109659-1557-7-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 06/24] hw/sd/milkymist-memcard: Reset SD card on controller reset X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Since milkymist-memcard is still using the legacy SD card API, the SD card created by sd_init() is not plugged into any bus. This means that the controller has to reset it manually. Failing to do this mostly didn't affect the guest since the guest typically does a programmed SD card reset as part of its SD controller driver initialization, but meant that migration failed because it's only in sd_reset() that we set up the wpgrps_size field. Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 Message-id: 1515506513-31961-3-git-send-email-peter.maydell@linaro.org --- hw/sd/milkymist-memcard.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/sd/milkymist-memcard.c b/hw/sd/milkymist-memcard.c index 4008c81..341da88 100644 --- a/hw/sd/milkymist-memcard.c +++ b/hw/sd/milkymist-memcard.c @@ -248,6 +248,10 @@ static void milkymist_memcard_reset(DeviceState *d) for (i =3D 0; i < R_MAX; i++) { s->regs[i] =3D 0; } + /* Since we're still using the legacy SD API the card is not plugged + * into any bus, and we must reset it manually. + */ + device_reset(DEVICE(s->card)); } =20 static int milkymist_memcard_init(SysBusDevice *dev) --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516109986522643.7929363227512; Tue, 16 Jan 2018 05:39:46 -0800 (PST) Received: from localhost ([::1]:36754 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRSr-0003jP-LE for importer@patchew.org; Tue, 16 Jan 2018 08:39:45 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37400) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRNv-0008Ch-Vv for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:41 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebRNs-0002nn-0i for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:40 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45886) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebRNr-0002gG-Pj for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:35 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNn-0002s2-1y for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:31 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:34:02 +0000 Message-Id: <1516109659-1557-8-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 07/24] hw/sd/ssi-sd: Reset SD card on controller reset X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Since ssi-sd is still using the legacy SD card API, the SD card created by sd_init() is not plugged into any bus. This means that the controller has to reset it manually. Failing to do this mostly didn't affect the guest since the guest typically does a programmed SD card reset as part of its SD controller driver initialization, but meant that migration failed because it's only in sd_reset() that we set up the wpgrps_size field. In the case of sd-ssi, we have to implement an entire reset function since there wasn't one previously, and that requires a QOM cast macro that got omitted when this device was QOMified. Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 Message-id: 1515506513-31961-4-git-send-email-peter.maydell@linaro.org --- hw/sd/ssi-sd.c | 25 +++++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/hw/sd/ssi-sd.c b/hw/sd/ssi-sd.c index 24001dc..f88f509 100644 --- a/hw/sd/ssi-sd.c +++ b/hw/sd/ssi-sd.c @@ -50,6 +50,9 @@ typedef struct { SDState *sd; } ssi_sd_state; =20 +#define TYPE_SSI_SD "ssi-sd" +#define SSI_SD(obj) OBJECT_CHECK(ssi_sd_state, (obj), TYPE_SSI_SD) + /* State word bits. */ #define SSI_SDR_LOCKED 0x0001 #define SSI_SDR_WP_ERASE 0x0002 @@ -241,7 +244,6 @@ static void ssi_sd_realize(SSISlave *d, Error **errp) ssi_sd_state *s =3D FROM_SSI_SLAVE(ssi_sd_state, d); DriveInfo *dinfo; =20 - s->mode =3D SSI_SD_CMD; /* FIXME use a qdev drive property instead of drive_get_next() */ dinfo =3D drive_get_next(IF_SD); s->sd =3D sd_init(dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, true); @@ -251,6 +253,24 @@ static void ssi_sd_realize(SSISlave *d, Error **errp) } } =20 +static void ssi_sd_reset(DeviceState *dev) +{ + ssi_sd_state *s =3D SSI_SD(dev); + + s->mode =3D SSI_SD_CMD; + s->cmd =3D 0; + memset(s->cmdarg, 0, sizeof(s->cmdarg)); + memset(s->response, 0, sizeof(s->response)); + s->arglen =3D 0; + s->response_pos =3D 0; + s->stopping =3D 0; + + /* Since we're still using the legacy SD API the card is not plugged + * into any bus, and we must reset it manually. + */ + device_reset(DEVICE(s->sd)); +} + static void ssi_sd_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); @@ -260,10 +280,11 @@ static void ssi_sd_class_init(ObjectClass *klass, voi= d *data) k->transfer =3D ssi_sd_transfer; k->cs_polarity =3D SSI_CS_LOW; dc->vmsd =3D &vmstate_ssi_sd; + dc->reset =3D ssi_sd_reset; } =20 static const TypeInfo ssi_sd_info =3D { - .name =3D "ssi-sd", + .name =3D TYPE_SSI_SD, .parent =3D TYPE_SSI_SLAVE, .instance_size =3D sizeof(ssi_sd_state), .class_init =3D ssi_sd_class_init, --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516110168023259.3363432239594; Tue, 16 Jan 2018 05:42:48 -0800 (PST) Received: from localhost ([::1]:36773 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRVb-0006D9-D8 for importer@patchew.org; Tue, 16 Jan 2018 08:42:35 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37373) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRNu-0008Bh-Sa for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:44 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebRNr-0002mt-3A for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:38 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45886) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebRNq-0002gG-Su for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:35 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNn-0002sT-Ou for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:31 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:34:03 +0000 Message-Id: <1516109659-1557-9-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 08/24] hw/sd/omap_mmc: Reset SD card on controller reset X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Since omap_mmc is still using the legacy SD card API, the SD card created by sd_init() is not plugged into any bus. This means that the controller has to reset it manually. Failing to do this mostly didn't affect the guest since the guest typically does a programmed SD card reset as part of its SD controller driver initialization, but would mean that migration fails because it's only in sd_reset() that we set up the wpgrps_size field. Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 Message-id: 1515506513-31961-5-git-send-email-peter.maydell@linaro.org --- hw/sd/omap_mmc.c | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/hw/sd/omap_mmc.c b/hw/sd/omap_mmc.c index e934cd3..5b47cad 100644 --- a/hw/sd/omap_mmc.c +++ b/hw/sd/omap_mmc.c @@ -305,6 +305,12 @@ void omap_mmc_reset(struct omap_mmc_s *host) host->cdet_enable =3D 0; qemu_set_irq(host->coverswitch, host->cdet_state); host->clkdiv =3D 0; + + /* Since we're still using the legacy SD API the card is not plugged + * into any bus, and we must reset it manually. When omap_mmc is + * QOMified this must move into the QOM reset function. + */ + device_reset(DEVICE(host->card)); } =20 static uint64_t omap_mmc_read(void *opaque, hwaddr offset, @@ -587,8 +593,6 @@ struct omap_mmc_s *omap_mmc_init(hwaddr base, s->lines =3D 1; /* TODO: needs to be settable per-board */ s->rev =3D 1; =20 - omap_mmc_reset(s); - memory_region_init_io(&s->iomem, NULL, &omap_mmc_ops, s, "omap.mmc", 0= x800); memory_region_add_subregion(sysmem, base, &s->iomem); =20 @@ -598,6 +602,8 @@ struct omap_mmc_s *omap_mmc_init(hwaddr base, exit(1); } =20 + omap_mmc_reset(s); + return s; } =20 @@ -613,8 +619,6 @@ struct omap_mmc_s *omap2_mmc_init(struct omap_target_ag= ent_s *ta, s->lines =3D 4; s->rev =3D 2; =20 - omap_mmc_reset(s); - memory_region_init_io(&s->iomem, NULL, &omap_mmc_ops, s, "omap.mmc", omap_l4_region_size(ta, 0)); omap_l4_attach(ta, 0, &s->iomem); @@ -628,6 +632,8 @@ struct omap_mmc_s *omap2_mmc_init(struct omap_target_ag= ent_s *ta, s->cdet =3D qemu_allocate_irq(omap_mmc_cover_cb, s, 0); sd_set_cb(s->card, NULL, s->cdet); =20 + omap_mmc_reset(s); + return s; } =20 --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516110170941484.2997773352964; Tue, 16 Jan 2018 05:42:50 -0800 (PST) Received: from localhost ([::1]:36776 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRVq-0006Qm-51 for importer@patchew.org; Tue, 16 Jan 2018 08:42:50 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37346) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRNu-0008B4-1e for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebRNq-0002m3-5b for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:38 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45886) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebRNp-0002gG-Uw for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:34 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNo-0002sw-M6 for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:32 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:34:04 +0000 Message-Id: <1516109659-1557-10-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 09/24] target/arm: Split out vfp_expand_imm X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-id: 20180110063337.21538-2-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 44 ++++++++++++++++++++++++++++--------------= -- 1 file changed, 28 insertions(+), 16 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index ba94f7d..80ae019 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -4985,6 +4985,33 @@ static void disas_fp_3src(DisasContext *s, uint32_t = insn) } } =20 +/* The imm8 encodes the sign bit, enough bits to represent an exponent in + * the range 01....1xx to 10....0xx, and the most significant 4 bits of + * the mantissa; see VFPExpandImm() in the v8 ARM ARM. + */ +static uint64_t vfp_expand_imm(int size, uint8_t imm8) +{ + uint64_t imm; + + switch (size) { + case MO_64: + imm =3D (extract32(imm8, 7, 1) ? 0x8000 : 0) | + (extract32(imm8, 6, 1) ? 0x3fc0 : 0x4000) | + extract32(imm8, 0, 6); + imm <<=3D 48; + break; + case MO_32: + imm =3D (extract32(imm8, 7, 1) ? 0x8000 : 0) | + (extract32(imm8, 6, 1) ? 0x3e00 : 0x4000) | + (extract32(imm8, 0, 6) << 3); + imm <<=3D 16; + break; + default: + g_assert_not_reached(); + } + return imm; +} + /* Floating point immediate * 31 30 29 28 24 23 22 21 20 13 12 10 9 5 4 0 * +---+---+---+-----------+------+---+------------+-------+------+------+ @@ -5008,22 +5035,7 @@ static void disas_fp_imm(DisasContext *s, uint32_t i= nsn) return; } =20 - /* The imm8 encodes the sign bit, enough bits to represent - * an exponent in the range 01....1xx to 10....0xx, - * and the most significant 4 bits of the mantissa; see - * VFPExpandImm() in the v8 ARM ARM. - */ - if (is_double) { - imm =3D (extract32(imm8, 7, 1) ? 0x8000 : 0) | - (extract32(imm8, 6, 1) ? 0x3fc0 : 0x4000) | - extract32(imm8, 0, 6); - imm <<=3D 48; - } else { - imm =3D (extract32(imm8, 7, 1) ? 0x8000 : 0) | - (extract32(imm8, 6, 1) ? 0x3e00 : 0x4000) | - (extract32(imm8, 0, 6) << 3); - imm <<=3D 16; - } + imm =3D vfp_expand_imm(MO_32 + is_double, imm8); =20 tcg_res =3D tcg_const_i64(imm); write_fp_dreg(s, rd, tcg_res); --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516109808622593.9120128126928; Tue, 16 Jan 2018 05:36:48 -0800 (PST) Received: from localhost ([::1]:36739 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRPp-000148-SR for importer@patchew.org; Tue, 16 Jan 2018 08:36:37 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37282) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRNr-0008AB-Cx for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:36 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebRNq-0002mP-Ku for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:35 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45888) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebRNq-0002ll-Dz for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:34 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNp-0002tN-Db for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:33 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:34:05 +0000 Message-Id: <1516109659-1557-11-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 10/24] target/arm: Add fp16 support to vfp_expand_imm X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Richard Henderson Signed-off-by: Richard Henderson Reviewed-by: Peter Maydell Message-id: 20180110063337.21538-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 80ae019..cf537e9 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5006,6 +5006,11 @@ static uint64_t vfp_expand_imm(int size, uint8_t imm= 8) (extract32(imm8, 0, 6) << 3); imm <<=3D 16; break; + case MO_16: + imm =3D (extract32(imm8, 7, 1) ? 0x8000 : 0) | + (extract32(imm8, 6, 1) ? 0x3000 : 0x4000) | + (extract32(imm8, 0, 6) << 6); + break; default: g_assert_not_reached(); } --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516109995391435.1174393336445; Tue, 16 Jan 2018 05:39:55 -0800 (PST) Received: from localhost ([::1]:36756 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRT0-0003p8-DW for importer@patchew.org; Tue, 16 Jan 2018 08:39:54 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37412) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRNx-0008EA-DT for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebRNr-0002nK-HH for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:41 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45888) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebRNr-0002ll-Ah for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:35 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNq-0002te-4P for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:34 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:34:06 +0000 Message-Id: <1516109659-1557-12-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 11/24] sdhci: clean up includes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Message-id: 20180115182436.2066-2-f4bug@amsat.org Signed-off-by: Peter Maydell --- hw/sd/sdhci-internal.h | 4 ---- include/hw/sd/sdhci.h | 7 ++++++- hw/sd/sdhci.c | 1 + 3 files changed, 7 insertions(+), 5 deletions(-) diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h index 161177c..248fd02 100644 --- a/hw/sd/sdhci-internal.h +++ b/hw/sd/sdhci-internal.h @@ -24,8 +24,6 @@ #ifndef SDHCI_INTERNAL_H #define SDHCI_INTERNAL_H =20 -#include "hw/sd/sdhci.h" - /* R/W SDMA System Address register 0x0 */ #define SDHC_SYSAD 0x00 =20 @@ -227,6 +225,4 @@ enum { sdhc_gap_write =3D 2 /* SDHC stopped at block gap during write oper= ation */ }; =20 -extern const VMStateDescription sdhci_vmstate; - #endif diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index 0f0c3f1..1335373 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -26,17 +26,19 @@ #define SDHCI_H =20 #include "qemu-common.h" -#include "hw/block/block.h" #include "hw/pci/pci.h" #include "hw/sysbus.h" #include "hw/sd/sd.h" =20 /* SD/MMC host controller state */ typedef struct SDHCIState { + /*< private >*/ union { PCIDevice pcidev; SysBusDevice busdev; }; + + /*< public >*/ SDBus sdbus; MemoryRegion iomem; =20 @@ -46,6 +48,7 @@ typedef struct SDHCIState { qemu_irq ro_cb; qemu_irq irq; =20 + /* Registers cleared on reset */ uint32_t sdmasysad; /* SDMA System Address register */ uint16_t blksize; /* Host DMA Buff Boundary and Transfer BlkSize = Reg */ uint16_t blkcnt; /* Blocks count for current transfer */ @@ -70,8 +73,10 @@ typedef struct SDHCIState { uint16_t acmd12errsts; /* Auto CMD12 error status register */ uint64_t admasysaddr; /* ADMA System Address Register */ =20 + /* Read-only registers */ uint32_t capareg; /* Capabilities Register */ uint32_t maxcurr; /* Maximum Current Capabilities Register */ + uint8_t *fifo_buffer; /* SD host i/o FIFO buffer */ uint32_t buf_maxsz; uint16_t data_count; /* current element in FIFO buffer */ diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index b064a08..b7d2a20 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -29,6 +29,7 @@ #include "sysemu/dma.h" #include "qemu/timer.h" #include "qemu/bitops.h" +#include "hw/sd/sdhci.h" #include "sdhci-internal.h" #include "qemu/log.h" =20 --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516109808754574.7675106808693; Tue, 16 Jan 2018 05:36:48 -0800 (PST) Received: from localhost ([::1]:36740 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRPw-00019a-0R for importer@patchew.org; Tue, 16 Jan 2018 08:36:44 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37318) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRNs-0008AL-Sk for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:37 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebRNs-0002nt-2r for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:36 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45890) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebRNr-0002my-Sq for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:36 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNq-0002uA-TQ for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:34 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:34:07 +0000 Message-Id: <1516109659-1557-13-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 12/24] sdhci: remove dead code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Message-id: 20180115182436.2066-3-f4bug@amsat.org Signed-off-by: Peter Maydell --- include/hw/sd/sdhci.h | 2 -- hw/sd/sdhci.c | 2 -- 2 files changed, 4 deletions(-) diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index 1335373..dacd726 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -44,8 +44,6 @@ typedef struct SDHCIState { =20 QEMUTimer *insert_timer; /* timer for 'changing' sd card. */ QEMUTimer *transfer_timer; - qemu_irq eject_cb; - qemu_irq ro_cb; qemu_irq irq; =20 /* Registers cleared on reset */ diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index b7d2a20..365bc80 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1200,8 +1200,6 @@ static void sdhci_uninitfn(SDHCIState *s) timer_free(s->insert_timer); timer_del(s->transfer_timer); timer_free(s->transfer_timer); - qemu_free_irq(s->eject_cb); - qemu_free_irq(s->ro_cb); =20 g_free(s->fifo_buffer); s->fifo_buffer =3D NULL; --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516110328500842.425851703622; Tue, 16 Jan 2018 05:45:28 -0800 (PST) Received: from localhost ([::1]:36787 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRYN-0000Kz-Nx for importer@patchew.org; Tue, 16 Jan 2018 08:45:27 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37416) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRNx-0008Ec-SJ for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:46 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebRNs-0002oR-V8 for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:41 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45886) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebRNs-0002gG-Nd for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:36 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNr-0002uS-K9 for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:35 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:34:08 +0000 Message-Id: <1516109659-1557-14-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 13/24] sdhci: use DEFINE_SDHCI_COMMON_PROPERTIES() for common sysbus/pci properties X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Philippe Mathieu-Daud=C3=A9 Add common/sysbus/pci/sdbus comments to have clearer code blocks separation. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20180115182436.2066-4-f4bug@amsat.org Signed-off-by: Peter Maydell Reviewed-by: Peter Maydell --- include/hw/sd/sdhci.h | 4 +++- hw/sd/sdhci.c | 25 +++++++++++++++++-------- 2 files changed, 20 insertions(+), 9 deletions(-) diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index dacd726..8041c96 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -79,13 +79,15 @@ typedef struct SDHCIState { uint32_t buf_maxsz; uint16_t data_count; /* current element in FIFO buffer */ uint8_t stopped_state;/* Current SDHC state */ - bool pending_insert_quirk;/* Quirk for Raspberry Pi card insert in= t */ bool pending_insert_state; /* Buffer Data Port Register - virtual access point to R and W buffers= */ /* Software Reset Register - always reads as 0 */ /* Force Event Auto CMD12 Error Interrupt Reg - write only */ /* Force Event Error Interrupt Register- write only */ /* RO Host Controller Version Register always reads as 0x2401 */ + + /* Configurable properties */ + bool pending_insert_quirk; /* Quirk for Raspberry Pi card insert int */ } SDHCIState; =20 #define TYPE_PCI_SDHCI "sdhci-pci" diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 365bc80..c0b4b84 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -23,6 +23,7 @@ */ =20 #include "qemu/osdep.h" +#include "qapi/error.h" #include "hw/hw.h" #include "sysemu/block-backend.h" #include "sysemu/blockdev.h" @@ -1185,6 +1186,14 @@ static inline unsigned int sdhci_get_fifolen(SDHCISt= ate *s) } } =20 +/* --- qdev common --- */ + +#define DEFINE_SDHCI_COMMON_PROPERTIES(_state) \ + /* Capabilities registers provide information on supported features + * of this specific host controller implementation */ \ + DEFINE_PROP_UINT32("capareg", _state, capareg, SDHC_CAPAB_REG_DEFAULT)= , \ + DEFINE_PROP_UINT32("maxcurr", _state, maxcurr, 0) + static void sdhci_initfn(SDHCIState *s) { qbus_create_inplace(&s->sdbus, sizeof(s->sdbus), @@ -1264,12 +1273,10 @@ const VMStateDescription sdhci_vmstate =3D { }, }; =20 -/* Capabilities registers provide information on supported features of this - * specific host controller implementation */ +/* --- qdev PCI --- */ + static Property sdhci_pci_properties[] =3D { - DEFINE_PROP_UINT32("capareg", SDHCIState, capareg, - SDHC_CAPAB_REG_DEFAULT), - DEFINE_PROP_UINT32("maxcurr", SDHCIState, maxcurr, 0), + DEFINE_SDHCI_COMMON_PROPERTIES(SDHCIState), DEFINE_PROP_END_OF_LIST(), }; =20 @@ -1320,10 +1327,10 @@ static const TypeInfo sdhci_pci_info =3D { }, }; =20 +/* --- qdev SysBus --- */ + static Property sdhci_sysbus_properties[] =3D { - DEFINE_PROP_UINT32("capareg", SDHCIState, capareg, - SDHC_CAPAB_REG_DEFAULT), - DEFINE_PROP_UINT32("maxcurr", SDHCIState, maxcurr, 0), + DEFINE_SDHCI_COMMON_PROPERTIES(SDHCIState), DEFINE_PROP_BOOL("pending-insert-quirk", SDHCIState, pending_insert_qu= irk, false), DEFINE_PROP_END_OF_LIST(), @@ -1374,6 +1381,8 @@ static const TypeInfo sdhci_sysbus_info =3D { .class_init =3D sdhci_sysbus_class_init, }; =20 +/* --- qdev bus master --- */ + static void sdhci_bus_class_init(ObjectClass *klass, void *data) { SDBusClass *sbc =3D SD_BUS_CLASS(klass); --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; 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X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 14/24] sdhci: refactor common sysbus/pci class_init() into sdhci_common_class_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Philippe Mathieu-Daud=C3=A9 Now both inherited classes appear as DEVICE_CATEGORY_STORAGE. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Message-id: 20180115182436.2066-5-f4bug@amsat.org Signed-off-by: Peter Maydell --- hw/sd/sdhci.c | 18 +++++++++++++----- 1 file changed, 13 insertions(+), 5 deletions(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index c0b4b84..15d0961 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1273,6 +1273,15 @@ const VMStateDescription sdhci_vmstate =3D { }, }; =20 +static void sdhci_common_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); + dc->vmsd =3D &sdhci_vmstate; + dc->reset =3D sdhci_poweron_reset; +} + /* --- qdev PCI --- */ =20 static Property sdhci_pci_properties[] =3D { @@ -1310,10 +1319,9 @@ static void sdhci_pci_class_init(ObjectClass *klass,= void *data) k->vendor_id =3D PCI_VENDOR_ID_REDHAT; k->device_id =3D PCI_DEVICE_ID_REDHAT_SDHCI; k->class_id =3D PCI_CLASS_SYSTEM_SDHCI; - set_bit(DEVICE_CATEGORY_STORAGE, dc->categories); - dc->vmsd =3D &sdhci_vmstate; dc->props =3D sdhci_pci_properties; - dc->reset =3D sdhci_poweron_reset; + + sdhci_common_class_init(klass, data); } =20 static const TypeInfo sdhci_pci_info =3D { @@ -1366,10 +1374,10 @@ static void sdhci_sysbus_class_init(ObjectClass *kl= ass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); =20 - dc->vmsd =3D &sdhci_vmstate; dc->props =3D sdhci_sysbus_properties; dc->realize =3D sdhci_sysbus_realize; - dc->reset =3D sdhci_poweron_reset; + + sdhci_common_class_init(klass, data); } =20 static const TypeInfo sdhci_sysbus_info =3D { --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516110732773562.0322262394297; Tue, 16 Jan 2018 05:52:12 -0800 (PST) Received: from localhost ([::1]:36912 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRet-0005lX-Vv for importer@patchew.org; Tue, 16 Jan 2018 08:52:12 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37468) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRO0-0008H2-3o for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:45 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebRNu-0002qX-7i for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:44 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45888) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebRNu-0002ll-1l for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:38 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNt-0002vJ-2A for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:37 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:34:10 +0000 Message-Id: <1516109659-1557-16-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 15/24] sdhci: refactor common sysbus/pci realize() into sdhci_common_realize() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Message-id: 20180115182436.2066-6-f4bug@amsat.org Signed-off-by: Peter Maydell --- hw/sd/sdhci.c | 30 +++++++++++++++++++++--------- 1 file changed, 21 insertions(+), 9 deletions(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 15d0961..cf0c079 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1214,6 +1214,15 @@ static void sdhci_uninitfn(SDHCIState *s) s->fifo_buffer =3D NULL; } =20 +static void sdhci_common_realize(SDHCIState *s, Error **errp) +{ + s->buf_maxsz =3D sdhci_get_fifolen(s); + s->fifo_buffer =3D g_malloc0(s->buf_maxsz); + + memory_region_init_io(&s->iomem, OBJECT(s), &sdhci_mmio_ops, s, "sdhci= ", + SDHC_REGISTERS_MAP_SIZE); +} + static bool sdhci_pending_insert_vmstate_needed(void *opaque) { SDHCIState *s =3D opaque; @@ -1292,14 +1301,16 @@ static Property sdhci_pci_properties[] =3D { static void sdhci_pci_realize(PCIDevice *dev, Error **errp) { SDHCIState *s =3D PCI_SDHCI(dev); + + sdhci_initfn(s); + sdhci_common_realize(s, errp); + if (errp && *errp) { + return; + } + dev->config[PCI_CLASS_PROG] =3D 0x01; /* Standard Host supported DMA */ dev->config[PCI_INTERRUPT_PIN] =3D 0x01; /* interrupt pin A */ - sdhci_initfn(s); - s->buf_maxsz =3D sdhci_get_fifolen(s); - s->fifo_buffer =3D g_malloc0(s->buf_maxsz); s->irq =3D pci_allocate_irq(dev); - memory_region_init_io(&s->iomem, OBJECT(s), &sdhci_mmio_ops, s, "sdhci= ", - SDHC_REGISTERS_MAP_SIZE); pci_register_bar(dev, 0, 0, &s->iomem); } =20 @@ -1362,11 +1373,12 @@ static void sdhci_sysbus_realize(DeviceState *dev, = Error ** errp) SDHCIState *s =3D SYSBUS_SDHCI(dev); SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev); =20 - s->buf_maxsz =3D sdhci_get_fifolen(s); - s->fifo_buffer =3D g_malloc0(s->buf_maxsz); + sdhci_common_realize(s, errp); + if (errp && *errp) { + return; + } + sysbus_init_irq(sbd, &s->irq); - memory_region_init_io(&s->iomem, OBJECT(s), &sdhci_mmio_ops, s, "sdhci= ", - SDHC_REGISTERS_MAP_SIZE); sysbus_init_mmio(sbd, &s->iomem); } =20 --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516110535696835.5043030103301; Tue, 16 Jan 2018 05:48:55 -0800 (PST) Received: from localhost ([::1]:36807 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRbU-0002tQ-Rg for importer@patchew.org; Tue, 16 Jan 2018 08:48:40 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37440) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRNy-0008Fk-UE for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:49 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebRNv-0002rK-4d for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:42 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45894) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebRNu-0002qb-TD for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:39 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNt-0002vu-Qu for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:37 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:34:11 +0000 Message-Id: <1516109659-1557-17-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 16/24] sdhci: refactor common sysbus/pci unrealize() into sdhci_common_unrealize() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Message-id: 20180115182436.2066-7-f4bug@amsat.org Signed-off-by: Peter Maydell --- hw/sd/sdhci.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index cf0c079..bbe4570 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -32,6 +32,7 @@ #include "qemu/bitops.h" #include "hw/sd/sdhci.h" #include "sdhci-internal.h" +#include "qapi/error.h" #include "qemu/log.h" =20 /* host controller debug messages */ @@ -1223,6 +1224,17 @@ static void sdhci_common_realize(SDHCIState *s, Erro= r **errp) SDHC_REGISTERS_MAP_SIZE); } =20 +static void sdhci_common_unrealize(SDHCIState *s, Error **errp) +{ + /* This function is expected to be called only once for each class: + * - SysBus: via DeviceClass->unrealize(), + * - PCI: via PCIDeviceClass->exit(). + * However to avoid double-free and/or use-after-free we still nullify + * this variable (better safe than sorry!). */ + g_free(s->fifo_buffer); + s->fifo_buffer =3D NULL; +} + static bool sdhci_pending_insert_vmstate_needed(void *opaque) { SDHCIState *s =3D opaque; @@ -1317,6 +1329,8 @@ static void sdhci_pci_realize(PCIDevice *dev, Error *= *errp) static void sdhci_pci_exit(PCIDevice *dev) { SDHCIState *s =3D PCI_SDHCI(dev); + + sdhci_common_unrealize(s, &error_abort); sdhci_uninitfn(s); } =20 @@ -1382,12 +1396,20 @@ static void sdhci_sysbus_realize(DeviceState *dev, = Error ** errp) sysbus_init_mmio(sbd, &s->iomem); } =20 +static void sdhci_sysbus_unrealize(DeviceState *dev, Error **errp) +{ + SDHCIState *s =3D SYSBUS_SDHCI(dev); + + sdhci_common_unrealize(s, &error_abort); +} + static void sdhci_sysbus_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); =20 dc->props =3D sdhci_sysbus_properties; dc->realize =3D sdhci_sysbus_realize; + dc->unrealize =3D sdhci_sysbus_unrealize; =20 sdhci_common_class_init(klass, data); } --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516110341289530.0687799484414; Tue, 16 Jan 2018 05:45:41 -0800 (PST) Received: from localhost ([::1]:36788 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRYW-0000Tt-Pp for importer@patchew.org; Tue, 16 Jan 2018 08:45:36 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37465) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRO0-0008H0-3K for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebRNw-0002ro-1g for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:44 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45894) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebRNv-0002qb-QT for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:39 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNu-0002wj-K2 for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:38 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:34:12 +0000 Message-Id: <1516109659-1557-18-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 17/24] sdhci: use qemu_log_mask(UNIMP) instead of fprintf() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Message-id: 20180115182436.2066-8-f4bug@amsat.org Signed-off-by: Peter Maydell --- hw/sd/sdhci.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index bbe4570..7ffb1db 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -947,7 +947,8 @@ static uint64_t sdhci_read(void *opaque, hwaddr offset,= unsigned size) ret =3D (SD_HOST_SPECv2_VERS << 16) | sdhci_slotint(s); break; default: - ERRPRINT("bad %ub read: addr[0x%04x]\n", size, (int)offset); + qemu_log_mask(LOG_UNIMP, "SDHC rd_%ub @0x%02" HWADDR_PRIx " " + "not implemented\n", size, offset); break; } =20 @@ -1153,8 +1154,8 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val= , unsigned size) sdhci_update_irq(s); break; default: - ERRPRINT("bad %ub write offset: addr[0x%04x] <- %u(0x%x)\n", - size, (int)offset, value >> shift, value >> shift); + qemu_log_mask(LOG_UNIMP, "SDHC wr_%ub @0x%02" HWADDR_PRIx " <- 0x%= 08x " + "not implemented\n", size, offset, value >> shift); break; } DPRINT_L2("write %ub: addr[0x%04x] <- %u(0x%x)\n", --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516110353320950.4464424195509; Tue, 16 Jan 2018 05:45:53 -0800 (PST) Received: from localhost ([::1]:36796 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRYm-0000eq-E9 for importer@patchew.org; Tue, 16 Jan 2018 08:45:52 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37497) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRO1-0008J9-KJ for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:52 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebRNw-0002sN-Mg for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:45 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45896) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebRNw-0002rd-9i for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:40 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNv-0002xN-Af for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:39 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:34:13 +0000 Message-Id: <1516109659-1557-19-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 18/24] sdhci: convert the DPRINT() calls into trace events X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Philippe Mathieu-Daud=C3=A9 zero-initialize ADMADescr 'dscr' in sdhci_do_adma() to avoid: hw/sd/sdhci.c: In function =E2=80=98sdhci_do_adma=E2=80=99: hw/sd/sdhci.c:714:29: error: =E2=80=98dscr.addr=E2=80=99 may be used unin= itialized in this function [-Werror=3Dmaybe-uninitialized] trace_sdhci_adma("link", s->admasysaddr); ^ Signed-off-by: Philippe Mathieu-Daud=C3=A9 Acked-by: Alistair Francis Message-id: 20180115182436.2066-9-f4bug@amsat.org Signed-off-by: Peter Maydell --- hw/sd/sdhci.c | 89 ++++++++++++++++++--------------------------------= ---- hw/sd/trace-events | 14 +++++++++ 2 files changed, 44 insertions(+), 59 deletions(-) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 7ffb1db..68f1aee 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -34,30 +34,7 @@ #include "sdhci-internal.h" #include "qapi/error.h" #include "qemu/log.h" - -/* host controller debug messages */ -#ifndef SDHC_DEBUG -#define SDHC_DEBUG 0 -#endif - -#define DPRINT_L1(fmt, args...) \ - do { \ - if (SDHC_DEBUG) { \ - fprintf(stderr, "QEMU SDHC: " fmt, ## args); \ - } \ - } while (0) -#define DPRINT_L2(fmt, args...) \ - do { \ - if (SDHC_DEBUG > 1) { \ - fprintf(stderr, "QEMU SDHC: " fmt, ## args); \ - } \ - } while (0) -#define ERRPRINT(fmt, args...) \ - do { \ - if (SDHC_DEBUG) { \ - fprintf(stderr, "QEMU SDHC ERROR: " fmt, ## args); \ - } \ - } while (0) +#include "trace.h" =20 #define TYPE_SDHCI_BUS "sdhci-bus" #define SDHCI_BUS(obj) OBJECT_CHECK(SDBus, (obj), TYPE_SDHCI_BUS) @@ -156,8 +133,8 @@ static void sdhci_raise_insertion_irq(void *opaque) static void sdhci_set_inserted(DeviceState *dev, bool level) { SDHCIState *s =3D (SDHCIState *)dev; - DPRINT_L1("Card state changed: %s!\n", level ? "insert" : "eject"); =20 + trace_sdhci_set_inserted(level ? "insert" : "eject"); if ((s->norintsts & SDHC_NIS_REMOVE) && level) { /* Give target some time to notice card ejection */ timer_mod(s->insert_timer, @@ -239,7 +216,8 @@ static void sdhci_send_command(SDHCIState *s) s->acmd12errsts =3D 0; request.cmd =3D s->cmdreg >> 8; request.arg =3D s->argument; - DPRINT_L1("sending CMD%u ARG[0x%08x]\n", request.cmd, request.arg); + + trace_sdhci_send_command(request.cmd, request.arg); rlen =3D sdbus_do_command(&s->sdbus, &request, response); =20 if (s->cmdreg & SDHC_CMD_RESPONSE) { @@ -247,7 +225,7 @@ static void sdhci_send_command(SDHCIState *s) s->rspreg[0] =3D (response[0] << 24) | (response[1] << 16) | (response[2] << 8) | response[3]; s->rspreg[1] =3D s->rspreg[2] =3D s->rspreg[3] =3D 0; - DPRINT_L1("Response: RSPREG[31..0]=3D0x%08x\n", s->rspreg[0]); + trace_sdhci_response4(s->rspreg[0]); } else if (rlen =3D=3D 16) { s->rspreg[0] =3D (response[11] << 24) | (response[12] << 16) | (response[13] << 8) | response[14]; @@ -257,11 +235,10 @@ static void sdhci_send_command(SDHCIState *s) (response[5] << 8) | response[6]; s->rspreg[3] =3D (response[0] << 16) | (response[1] << 8) | response[2]; - DPRINT_L1("Response received:\n RSPREG[127..96]=3D0x%08x, RSPR= EG[95.." - "64]=3D0x%08x,\n RSPREG[63..32]=3D0x%08x, RSPREG[31..0]= =3D0x%08x\n", - s->rspreg[3], s->rspreg[2], s->rspreg[1], s->rspreg[0]); + trace_sdhci_response16(s->rspreg[3], s->rspreg[2], + s->rspreg[1], s->rspreg[0]); } else { - ERRPRINT("Timeout waiting for command response\n"); + trace_sdhci_error("timeout waiting for command response"); if (s->errintstsen & SDHC_EISEN_CMDTIMEOUT) { s->errintsts |=3D SDHC_EIS_CMDTIMEOUT; s->norintsts |=3D SDHC_NIS_ERR; @@ -295,7 +272,7 @@ static void sdhci_end_transfer(SDHCIState *s) =20 request.cmd =3D 0x0C; request.arg =3D 0; - DPRINT_L1("Automatically issue CMD%d %08x\n", request.cmd, request= .arg); + trace_sdhci_end_transfer(request.cmd, request.arg); sdbus_do_command(&s->sdbus, &request, response); /* Auto CMD12 response goes to the upper Response register */ s->rspreg[3] =3D (response[0] << 24) | (response[1] << 16) | @@ -364,7 +341,7 @@ static uint32_t sdhci_read_dataport(SDHCIState *s, unsi= gned size) =20 /* first check that a valid data exists in host controller input buffe= r */ if ((s->prnsts & SDHC_DATA_AVAILABLE) =3D=3D 0) { - ERRPRINT("Trying to read from empty buffer\n"); + trace_sdhci_error("read from empty buffer"); return 0; } =20 @@ -373,8 +350,7 @@ static uint32_t sdhci_read_dataport(SDHCIState *s, unsi= gned size) s->data_count++; /* check if we've read all valid data (blksize bytes) from buffer = */ if ((s->data_count) >=3D (s->blksize & 0x0fff)) { - DPRINT_L2("All %u bytes of data have been read from input buff= er\n", - s->data_count); + trace_sdhci_read_dataport(s->data_count); s->prnsts &=3D ~SDHC_DATA_AVAILABLE; /* no more data in a buff= er */ s->data_count =3D 0; /* next buff read must start at position= [0] */ =20 @@ -457,7 +433,7 @@ static void sdhci_write_dataport(SDHCIState *s, uint32_= t value, unsigned size) =20 /* Check that there is free space left in a buffer */ if (!(s->prnsts & SDHC_SPACE_AVAILABLE)) { - ERRPRINT("Can't write to data buffer: buffer full\n"); + trace_sdhci_error("Can't write to data buffer: buffer full"); return; } =20 @@ -466,8 +442,7 @@ static void sdhci_write_dataport(SDHCIState *s, uint32_= t value, unsigned size) s->data_count++; value >>=3D 8; if (s->data_count >=3D (s->blksize & 0x0fff)) { - DPRINT_L2("write buffer filled with %u bytes of data\n", - s->data_count); + trace_sdhci_write_dataport(s->data_count); s->data_count =3D 0; s->prnsts &=3D ~SDHC_SPACE_AVAILABLE; if (s->prnsts & SDHC_DOING_WRITE) { @@ -655,15 +630,14 @@ static void sdhci_do_adma(SDHCIState *s) { unsigned int n, begin, length; const uint16_t block_size =3D s->blksize & 0x0fff; - ADMADescr dscr; + ADMADescr dscr =3D {}; int i; =20 for (i =3D 0; i < SDHC_ADMA_DESCS_PER_DELAY; ++i) { s->admaerr &=3D ~SDHC_ADMAERR_LENGTH_MISMATCH; =20 get_adma_description(s, &dscr); - DPRINT_L2("ADMA loop: addr=3D" TARGET_FMT_plx ", len=3D%d, attr=3D= %x\n", - dscr.addr, dscr.length, dscr.attr); + trace_sdhci_adma_loop(dscr.addr, dscr.length, dscr.attr); =20 if ((dscr.attr & SDHC_ADMA_ATTR_VALID) =3D=3D 0) { /* Indicate that error occurred in ST_FDS state */ @@ -746,8 +720,7 @@ static void sdhci_do_adma(SDHCIState *s) break; case SDHC_ADMA_ATTR_ACT_LINK: /* link to next descriptor table */ s->admasysaddr =3D dscr.addr; - DPRINT_L1("ADMA link: admasysaddr=3D0x%" PRIx64 "\n", - s->admasysaddr); + trace_sdhci_adma("link", s->admasysaddr); break; default: s->admasysaddr +=3D dscr.incr; @@ -755,8 +728,7 @@ static void sdhci_do_adma(SDHCIState *s) } =20 if (dscr.attr & SDHC_ADMA_ATTR_INT) { - DPRINT_L1("ADMA interrupt: admasysaddr=3D0x%" PRIx64 "\n", - s->admasysaddr); + trace_sdhci_adma("interrupt", s->admasysaddr); if (s->norintstsen & SDHC_NISEN_DMA) { s->norintsts |=3D SDHC_NIS_DMA; } @@ -767,15 +739,15 @@ static void sdhci_do_adma(SDHCIState *s) /* ADMA transfer terminates if blkcnt =3D=3D 0 or by END attribute= */ if (((s->trnmod & SDHC_TRNS_BLK_CNT_EN) && (s->blkcnt =3D=3D 0)) || (dscr.attr & SDHC_ADMA_ATTR_E= ND)) { - DPRINT_L2("ADMA transfer completed\n"); + trace_sdhci_adma_transfer_completed(); if (length || ((dscr.attr & SDHC_ADMA_ATTR_END) && (s->trnmod & SDHC_TRNS_BLK_CNT_EN) && s->blkcnt !=3D 0)) { - ERRPRINT("SD/MMC host ADMA length mismatch\n"); + trace_sdhci_error("SD/MMC host ADMA length mismatch"); s->admaerr |=3D SDHC_ADMAERR_LENGTH_MISMATCH | SDHC_ADMAERR_STATE_ST_TFR; if (s->errintstsen & SDHC_EISEN_ADMAERR) { - ERRPRINT("Set ADMA error flag\n"); + trace_sdhci_error("Set ADMA error flag"); s->errintsts |=3D SDHC_EIS_ADMAERR; s->norintsts |=3D SDHC_NIS_ERR; } @@ -811,7 +783,7 @@ static void sdhci_data_transfer(void *opaque) break; case SDHC_CTRL_ADMA1_32: if (!(s->capareg & SDHC_CAN_DO_ADMA1)) { - ERRPRINT("ADMA1 not supported\n"); + trace_sdhci_error("ADMA1 not supported"); break; } =20 @@ -819,7 +791,7 @@ static void sdhci_data_transfer(void *opaque) break; case SDHC_CTRL_ADMA2_32: if (!(s->capareg & SDHC_CAN_DO_ADMA2)) { - ERRPRINT("ADMA2 not supported\n"); + trace_sdhci_error("ADMA2 not supported"); break; } =20 @@ -828,14 +800,14 @@ static void sdhci_data_transfer(void *opaque) case SDHC_CTRL_ADMA2_64: if (!(s->capareg & SDHC_CAN_DO_ADMA2) || !(s->capareg & SDHC_64_BIT_BUS_SUPPORT)) { - ERRPRINT("64 bit ADMA not supported\n"); + trace_sdhci_error("64 bit ADMA not supported"); break; } =20 sdhci_do_adma(s); break; default: - ERRPRINT("Unsupported DMA type\n"); + trace_sdhci_error("Unsupported DMA type"); break; } } else { @@ -870,8 +842,8 @@ static inline bool sdhci_buff_access_is_sequential(SDHCIState *s, unsigned byte_num) { if ((s->data_count & 0x3) !=3D byte_num) { - ERRPRINT("Non-sequential access to Buffer Data Port register" - "is prohibited\n"); + trace_sdhci_error("Non-sequential access to Buffer Data Port regis= ter" + "is prohibited\n"); return false; } return true; @@ -901,8 +873,7 @@ static uint64_t sdhci_read(void *opaque, hwaddr offset,= unsigned size) case SDHC_BDATA: if (sdhci_buff_access_is_sequential(s, offset - SDHC_BDATA)) { ret =3D sdhci_read_dataport(s, size); - DPRINT_L2("read %ub: addr[0x%04x] -> %u(0x%x)\n", size, (int)o= ffset, - ret, ret); + trace_sdhci_access("rd", size << 3, offset, "->", ret, ret); return ret; } break; @@ -954,7 +925,7 @@ static uint64_t sdhci_read(void *opaque, hwaddr offset,= unsigned size) =20 ret >>=3D (offset & 0x3) * 8; ret &=3D (1ULL << (size * 8)) - 1; - DPRINT_L2("read %ub: addr[0x%04x] -> %u(0x%x)\n", size, (int)offset, r= et, ret); + trace_sdhci_access("rd", size << 3, offset, "->", ret, ret); return ret; } =20 @@ -1158,8 +1129,8 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val= , unsigned size) "not implemented\n", size, offset, value >> shift); break; } - DPRINT_L2("write %ub: addr[0x%04x] <- %u(0x%x)\n", - size, (int)offset, value >> shift, value >> shift); + trace_sdhci_access("wr", size << 3, offset, "<-", + value >> shift, value >> shift); } =20 static const MemoryRegionOps sdhci_mmio_ops =3D { diff --git a/hw/sd/trace-events b/hw/sd/trace-events index 6eca347..0a12115 100644 --- a/hw/sd/trace-events +++ b/hw/sd/trace-events @@ -1,5 +1,19 @@ # See docs/devel/tracing.txt for syntax documentation. =20 +# hw/sd/sdhci.c +sdhci_set_inserted(const char *level) "card state changed: %s" +sdhci_send_command(uint8_t cmd, uint32_t arg) "CMD%02u ARG[0x%08x]" +sdhci_error(const char *msg) "%s" +sdhci_response4(uint32_t r0) "RSPREG[31..0]=3D0x%08x" +sdhci_response16(uint32_t r3, uint32_t r2, uint32_t r1, uint32_t r0) "RSPR= EG[127..96]=3D0x%08x, RSPREG[95..64]=3D0x%08x, RSPREG[63..32]=3D0x%08x, RSP= REG[31..0]=3D0x%08x" +sdhci_end_transfer(uint8_t cmd, uint32_t arg) "Automatically issue CMD%02u= 0x%08x" +sdhci_adma(const char *desc, uint32_t sysad) "%s: admasysaddr=3D0x%" PRIx32 +sdhci_adma_loop(uint64_t addr, uint16_t length, uint8_t attr) "addr=3D0x%0= 8" PRIx64 ", len=3D%d, attr=3D0x%x" +sdhci_adma_transfer_completed(void) "" +sdhci_access(const char *access, unsigned int size, uint64_t offset, const= char *dir, uint64_t val, uint64_t val2) "%s%u: addr[0x%04" PRIx64 "] %s 0x= %08" PRIx64 " (%" PRIu64 ")" +sdhci_read_dataport(uint16_t data_count) "all %u bytes of data have been r= ead from input buffer" +sdhci_write_dataport(uint16_t data_count) "write buffer filled with %u byt= es of data" + # hw/sd/milkymist-memcard.c milkymist_memcard_memory_read(uint32_t addr, uint32_t value) "addr 0x%08x = value 0x%08x" milkymist_memcard_memory_write(uint32_t addr, uint32_t value) "addr 0x%08x= value 0x%08x" --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 19/24] sdhci: move MASK_TRNMOD with other SDHC_TRN* defines in "sd-internal.h" X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Message-id: 20180115182436.2066-10-f4bug@amsat.org Signed-off-by: Peter Maydell --- hw/sd/sdhci-internal.h | 1 + hw/sd/sdhci.c | 3 +-- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h index 248fd02..e941bc2 100644 --- a/hw/sd/sdhci-internal.h +++ b/hw/sd/sdhci-internal.h @@ -43,6 +43,7 @@ #define SDHC_TRNS_ACMD12 0x0004 #define SDHC_TRNS_READ 0x0010 #define SDHC_TRNS_MULTI 0x0020 +#define SDHC_TRNMOD_MASK 0x0037 =20 /* R/W Command Register 0x0 */ #define SDHC_CMDREG 0x0E diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 68f1aee..4265b6a 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -99,7 +99,6 @@ (SDHC_CAPAB_BASECLKFREQ << 8) | (SDHC_CAPAB_TOUNIT << 7) | \ (SDHC_CAPAB_TOCLKFREQ)) =20 -#define MASK_TRNMOD 0x0037 #define MASKED_WRITE(reg, mask, val) (reg =3D (reg & (mask)) | (val)) =20 static uint8_t sdhci_slotint(SDHCIState *s) @@ -1026,7 +1025,7 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val= , unsigned size) if (!(s->capareg & SDHC_CAN_DO_DMA)) { value &=3D ~SDHC_TRNS_DMA; } - MASKED_WRITE(s->trnmod, mask, value & MASK_TRNMOD); + MASKED_WRITE(s->trnmod, mask, value & SDHC_TRNMOD_MASK); MASKED_WRITE(s->cmdreg, mask >> 16, value >> 16); =20 /* Writing to the upper byte of CMDREG triggers SD command generat= ion */ --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516110173209530.7742321789179; Tue, 16 Jan 2018 05:42:53 -0800 (PST) Received: from localhost ([::1]:36775 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRVq-0006QF-BX for importer@patchew.org; Tue, 16 Jan 2018 08:42:50 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37508) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRO3-0008Lp-UV for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:51 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebRNy-0002tc-DE for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:47 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45898) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebRNy-0002sv-6C for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:42 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNx-0002y6-79 for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:41 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:34:15 +0000 Message-Id: <1516109659-1557-21-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 20/24] sdhci: rename the SDHC_CAPAB register X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Message-id: 20180115182436.2066-11-f4bug@amsat.org Signed-off-by: Peter Maydell --- hw/sd/sdhci-internal.h | 2 +- hw/sd/sdhci.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/sd/sdhci-internal.h b/hw/sd/sdhci-internal.h index e941bc2..fc807f0 100644 --- a/hw/sd/sdhci-internal.h +++ b/hw/sd/sdhci-internal.h @@ -174,7 +174,7 @@ #define SDHC_ACMD12ERRSTS 0x3C =20 /* HWInit Capabilities Register 0x05E80080 */ -#define SDHC_CAPAREG 0x40 +#define SDHC_CAPAB 0x40 #define SDHC_CAN_DO_DMA 0x00400000 #define SDHC_CAN_DO_ADMA2 0x00080000 #define SDHC_CAN_DO_ADMA1 0x00100000 diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 4265b6a..c4e486e 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -898,7 +898,7 @@ static uint64_t sdhci_read(void *opaque, hwaddr offset,= unsigned size) case SDHC_ACMD12ERRSTS: ret =3D s->acmd12errsts; break; - case SDHC_CAPAREG: + case SDHC_CAPAB: ret =3D s->capareg; break; case SDHC_MAXCURR: --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516110914856714.1673007774825; Tue, 16 Jan 2018 05:55:14 -0800 (PST) Received: from localhost ([::1]:37026 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRhp-0008I3-VV for importer@patchew.org; Tue, 16 Jan 2018 08:55:14 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37521) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRO5-0008NS-BP for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:55 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebRNz-0002uS-C0 for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:49 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45898) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebRNz-0002sv-4Q for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:43 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNx-0002yW-Uc for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:41 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:34:16 +0000 Message-Id: <1516109659-1557-22-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 21/24] sdhci: fix CAPAB/MAXCURR registers, both are 64bit and read-only X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Philippe Mathieu-Daud=C3=A9 running qtests: $ make check-qtest-arm GTESTER check-qtest-arm SDHC rd_4b @0x44 not implemented SDHC wr_4b @0x40 <- 0x89abcdef not implemented SDHC wr_4b @0x44 <- 0x01234567 not implemented Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Message-id: 20180115182436.2066-12-f4bug@amsat.org Signed-off-by: Peter Maydell --- include/hw/sd/sdhci.h | 4 ++-- hw/sd/sdhci.c | 23 +++++++++++++++++++---- 2 files changed, 21 insertions(+), 6 deletions(-) diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index 8041c96..442e30a 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -72,8 +72,8 @@ typedef struct SDHCIState { uint64_t admasysaddr; /* ADMA System Address Register */ =20 /* Read-only registers */ - uint32_t capareg; /* Capabilities Register */ - uint32_t maxcurr; /* Maximum Current Capabilities Register */ + uint64_t capareg; /* Capabilities Register */ + uint64_t maxcurr; /* Maximum Current Capabilities Register */ =20 uint8_t *fifo_buffer; /* SD host i/o FIFO buffer */ uint32_t buf_maxsz; diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index c4e486e..d4fcebc 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -899,10 +899,16 @@ static uint64_t sdhci_read(void *opaque, hwaddr offse= t, unsigned size) ret =3D s->acmd12errsts; break; case SDHC_CAPAB: - ret =3D s->capareg; + ret =3D (uint32_t)s->capareg; + break; + case SDHC_CAPAB + 4: + ret =3D (uint32_t)(s->capareg >> 32); break; case SDHC_MAXCURR: - ret =3D s->maxcurr; + ret =3D (uint32_t)s->maxcurr; + break; + case SDHC_MAXCURR + 4: + ret =3D (uint32_t)(s->maxcurr >> 32); break; case SDHC_ADMAERR: ret =3D s->admaerr; @@ -1123,6 +1129,15 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t va= l, unsigned size) } sdhci_update_irq(s); break; + + case SDHC_CAPAB: + case SDHC_CAPAB + 4: + case SDHC_MAXCURR: + case SDHC_MAXCURR + 4: + qemu_log_mask(LOG_GUEST_ERROR, "SDHC wr_%ub @0x%02" HWADDR_PRIx + " <- 0x%08x read-only\n", size, offset, value >> shi= ft); + break; + default: qemu_log_mask(LOG_UNIMP, "SDHC wr_%ub @0x%02" HWADDR_PRIx " <- 0x%= 08x " "not implemented\n", size, offset, value >> shift); @@ -1163,8 +1178,8 @@ static inline unsigned int sdhci_get_fifolen(SDHCISta= te *s) #define DEFINE_SDHCI_COMMON_PROPERTIES(_state) \ /* Capabilities registers provide information on supported features * of this specific host controller implementation */ \ - DEFINE_PROP_UINT32("capareg", _state, capareg, SDHC_CAPAB_REG_DEFAULT)= , \ - DEFINE_PROP_UINT32("maxcurr", _state, maxcurr, 0) + DEFINE_PROP_UINT64("capareg", _state, capareg, SDHC_CAPAB_REG_DEFAULT)= , \ + DEFINE_PROP_UINT64("maxcurr", _state, maxcurr, 0) =20 static void sdhci_initfn(SDHCIState *s) { --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Tue, 16 Jan 2018 08:34:43 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNy-0002yy-MD for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:42 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:34:17 +0000 Message-Id: <1516109659-1557-23-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 22/24] sdhci: Implement write method of ACMD12ERRSTS register X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Andrey Smirnov Signed-off-by: Andrey Smirnov Reviewed-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Alistair Francis Message-id: 20180115182436.2066-13-f4bug@amsat.org Signed-off-by: Peter Maydell --- hw/sd/sdhci.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index d4fcebc..9bdbcd0 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1129,6 +1129,9 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val= , unsigned size) } sdhci_update_irq(s); break; + case SDHC_ACMD12ERRSTS: + MASKED_WRITE(s->acmd12errsts, mask, value); + break; =20 case SDHC_CAPAB: case SDHC_CAPAB + 4: --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516110796879319.6996924226869; Tue, 16 Jan 2018 05:53:16 -0800 (PST) Received: from localhost ([::1]:36915 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRft-0006dd-Pt for importer@patchew.org; Tue, 16 Jan 2018 08:53:13 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37530) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ebRO6-0008P5-Qh for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:55 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ebRO0-0002w3-RM for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:50 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:45900) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ebRO0-0002u6-JG for qemu-devel@nongnu.org; Tue, 16 Jan 2018 08:34:44 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ebRNz-0002zP-Fd for qemu-devel@nongnu.org; Tue, 16 Jan 2018 13:34:43 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 16 Jan 2018 13:34:18 +0000 Message-Id: <1516109659-1557-24-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> References: <1516109659-1557-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 23/24] sdhci: fix the PCI device, using the PCI address space for DMA X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Philippe Mathieu-Daud=C3=A9 While SysBus devices can use the get_system_memory() address space, PCI devices should use the bus master address space for DMA. Suggested-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Peter Maydell Message-id: 20180115182436.2066-14-f4bug@amsat.org Signed-off-by: Peter Maydell --- include/hw/sd/sdhci.h | 1 + hw/sd/sdhci.c | 29 +++++++++++++++-------------- 2 files changed, 16 insertions(+), 14 deletions(-) diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index 442e30a..4a102b8 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -41,6 +41,7 @@ typedef struct SDHCIState { /*< public >*/ SDBus sdbus; MemoryRegion iomem; + AddressSpace *dma_as; =20 QEMUTimer *insert_timer; /* timer for 'changing' sd card. */ QEMUTimer *transfer_timer; diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index 9bdbcd0..dd40069 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -496,7 +496,7 @@ static void sdhci_sdma_transfer_multi_blocks(SDHCIState= *s) s->blkcnt--; } } - dma_memory_write(&address_space_memory, s->sdmasysad, + dma_memory_write(s->dma_as, s->sdmasysad, &s->fifo_buffer[begin], s->data_count - begin= ); s->sdmasysad +=3D s->data_count - begin; if (s->data_count =3D=3D block_size) { @@ -518,7 +518,7 @@ static void sdhci_sdma_transfer_multi_blocks(SDHCIState= *s) s->data_count =3D block_size; boundary_count -=3D block_size - begin; } - dma_memory_read(&address_space_memory, s->sdmasysad, + dma_memory_read(s->dma_as, s->sdmasysad, &s->fifo_buffer[begin], s->data_count - begin); s->sdmasysad +=3D s->data_count - begin; if (s->data_count =3D=3D block_size) { @@ -556,11 +556,9 @@ static void sdhci_sdma_transfer_single_block(SDHCIStat= e *s) for (n =3D 0; n < datacnt; n++) { s->fifo_buffer[n] =3D sdbus_read_data(&s->sdbus); } - dma_memory_write(&address_space_memory, s->sdmasysad, s->fifo_buff= er, - datacnt); + dma_memory_write(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt); } else { - dma_memory_read(&address_space_memory, s->sdmasysad, s->fifo_buffe= r, - datacnt); + dma_memory_read(s->dma_as, s->sdmasysad, s->fifo_buffer, datacnt); for (n =3D 0; n < datacnt; n++) { sdbus_write_data(&s->sdbus, s->fifo_buffer[n]); } @@ -584,7 +582,7 @@ static void get_adma_description(SDHCIState *s, ADMADes= cr *dscr) hwaddr entry_addr =3D (hwaddr)s->admasysaddr; switch (SDHC_DMA_TYPE(s->hostctl)) { case SDHC_CTRL_ADMA2_32: - dma_memory_read(&address_space_memory, entry_addr, (uint8_t *)&adm= a2, + dma_memory_read(s->dma_as, entry_addr, (uint8_t *)&adma2, sizeof(adma2)); adma2 =3D le64_to_cpu(adma2); /* The spec does not specify endianness of descriptor table. @@ -596,7 +594,7 @@ static void get_adma_description(SDHCIState *s, ADMADes= cr *dscr) dscr->incr =3D 8; break; case SDHC_CTRL_ADMA1_32: - dma_memory_read(&address_space_memory, entry_addr, (uint8_t *)&adm= a1, + dma_memory_read(s->dma_as, entry_addr, (uint8_t *)&adma1, sizeof(adma1)); adma1 =3D le32_to_cpu(adma1); dscr->addr =3D (hwaddr)(adma1 & 0xFFFFF000); @@ -609,12 +607,12 @@ static void get_adma_description(SDHCIState *s, ADMAD= escr *dscr) } break; case SDHC_CTRL_ADMA2_64: - dma_memory_read(&address_space_memory, entry_addr, + dma_memory_read(s->dma_as, entry_addr, (uint8_t *)(&dscr->attr), 1); - dma_memory_read(&address_space_memory, entry_addr + 2, + dma_memory_read(s->dma_as, entry_addr + 2, (uint8_t *)(&dscr->length), 2); dscr->length =3D le16_to_cpu(dscr->length); - dma_memory_read(&address_space_memory, entry_addr + 4, + dma_memory_read(s->dma_as, entry_addr + 4, (uint8_t *)(&dscr->addr), 8); dscr->attr =3D le64_to_cpu(dscr->attr); dscr->attr &=3D 0xfffffff8; @@ -673,7 +671,7 @@ static void sdhci_do_adma(SDHCIState *s) s->data_count =3D block_size; length -=3D block_size - begin; } - dma_memory_write(&address_space_memory, dscr.addr, + dma_memory_write(s->dma_as, dscr.addr, &s->fifo_buffer[begin], s->data_count - begin); dscr.addr +=3D s->data_count - begin; @@ -697,7 +695,7 @@ static void sdhci_do_adma(SDHCIState *s) s->data_count =3D block_size; length -=3D block_size - begin; } - dma_memory_read(&address_space_memory, dscr.addr, + dma_memory_read(s->dma_as, dscr.addr, &s->fifo_buffer[begin], s->data_count - begin); dscr.addr +=3D s->data_count - begin; @@ -1312,7 +1310,8 @@ static void sdhci_pci_realize(PCIDevice *dev, Error *= *errp) dev->config[PCI_CLASS_PROG] =3D 0x01; /* Standard Host supported DMA */ dev->config[PCI_INTERRUPT_PIN] =3D 0x01; /* interrupt pin A */ s->irq =3D pci_allocate_irq(dev); - pci_register_bar(dev, 0, 0, &s->iomem); + s->dma_as =3D pci_get_address_space(dev); + pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->iomem); } =20 static void sdhci_pci_exit(PCIDevice *dev) @@ -1381,6 +1380,8 @@ static void sdhci_sysbus_realize(DeviceState *dev, Er= ror ** errp) return; } =20 + s->dma_as =3D &address_space_memory; + sysbus_init_irq(sbd, &s->irq); sysbus_init_mmio(sbd, &s->iomem); } --=20 2.7.4 From nobody Thu Dec 18 19:28:10 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1516110904500505.6754193573646; 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X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 24/24] sdhci: add a 'dma' property to the sysbus devices X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Philippe Mathieu-Daud=C3=A9 Add a 'dma' property allowing machine creation to provide the address-space SDHCI DMA operates on. [based on a patch from Alistair Francis from qemu/xilinx tag xilinx-v2016.1] Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20180115182436.2066-15-f4bug@amsat.org Signed-off-by: Peter Maydell --- include/hw/sd/sdhci.h | 1 + hw/sd/sdhci.c | 18 +++++++++++++++++- 2 files changed, 18 insertions(+), 1 deletion(-) diff --git a/include/hw/sd/sdhci.h b/include/hw/sd/sdhci.h index 4a102b8..cb37182 100644 --- a/include/hw/sd/sdhci.h +++ b/include/hw/sd/sdhci.h @@ -42,6 +42,7 @@ typedef struct SDHCIState { SDBus sdbus; MemoryRegion iomem; AddressSpace *dma_as; + MemoryRegion *dma_mr; =20 QEMUTimer *insert_timer; /* timer for 'changing' sd card. */ QEMUTimer *transfer_timer; diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c index dd40069..f9264d3 100644 --- a/hw/sd/sdhci.c +++ b/hw/sd/sdhci.c @@ -1354,6 +1354,8 @@ static Property sdhci_sysbus_properties[] =3D { DEFINE_SDHCI_COMMON_PROPERTIES(SDHCIState), DEFINE_PROP_BOOL("pending-insert-quirk", SDHCIState, pending_insert_qu= irk, false), + DEFINE_PROP_LINK("dma", SDHCIState, + dma_mr, TYPE_MEMORY_REGION, MemoryRegion *), DEFINE_PROP_END_OF_LIST(), }; =20 @@ -1367,6 +1369,11 @@ static void sdhci_sysbus_init(Object *obj) static void sdhci_sysbus_finalize(Object *obj) { SDHCIState *s =3D SYSBUS_SDHCI(obj); + + if (s->dma_mr) { + object_unparent(OBJECT(s->dma_mr)); + } + sdhci_uninitfn(s); } =20 @@ -1380,7 +1387,12 @@ static void sdhci_sysbus_realize(DeviceState *dev, E= rror ** errp) return; } =20 - s->dma_as =3D &address_space_memory; + if (s->dma_mr) { + address_space_init(s->dma_as, s->dma_mr, "sdhci-dma"); + } else { + /* use system_memory() if property "dma" not set */ + s->dma_as =3D &address_space_memory; + } =20 sysbus_init_irq(sbd, &s->irq); sysbus_init_mmio(sbd, &s->iomem); @@ -1391,6 +1403,10 @@ static void sdhci_sysbus_unrealize(DeviceState *dev,= Error **errp) SDHCIState *s =3D SYSBUS_SDHCI(dev); =20 sdhci_common_unrealize(s, &error_abort); + + if (s->dma_mr) { + address_space_destroy(s->dma_as); + } } =20 static void sdhci_sysbus_class_init(ObjectClass *klass, void *data) --=20 2.7.4