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[81.231.232.130]) by smtp.gmail.com with ESMTPSA id l187sm342322lfg.12.2018.01.16.03.51.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 16 Jan 2018 03:51:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=2oq1IylBhqMAvJip5cnicNwenuDa2g2e4mKgNmXiDE0=; b=H3ga3BRrC0DKEFST1SHOvUOxV/z9H97lnaUnoL4Ru4ejKdndpEb9K3LgeHkkxDrqyw Bw5Rj2MTU61KpNPBheACBPNdMvSfa99t9Jr8dcy3RpnFfttc8KAXreMPLvqpI39dpB3f 9RHfxtXSNJxcBfS1DzXJQXZ9HG5gf49tOgIVobGhG0TBwgLBDaFJcvZbcbiQQwWrJEyI 5HTrWK7wZEwdpddCsMwlcMgc4aQJYxUziWuAQvk5ZcBPw3VxITnl6fmcj72768GIZo9Y 0KUuO5B2GVRMIv1pC/mFJ+LtNrdh5q4Slgp/xVIP9wrCt4satBwCX6VjxVWY+saXQhBR AvuA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=2oq1IylBhqMAvJip5cnicNwenuDa2g2e4mKgNmXiDE0=; b=hAda/zhNmVaB5MmE7Q1KnlWllgo5ZueoHb854N3QG1Ziirayt/yU+Hca8QA750Aixa kkp7bH5ohKn+yN8qNcy8MFf8woumq4su3B3GAwU7x9m6velRlL5GTu5EwhAZqdlubdm9 3J4K5cGNvC2gta2qY4gfmPPIFdVjgHdKhudHFRVUr+OiR9iFSyTqEP9eM5BWvqDBqRWx YPHlgzxFHeZZKY1oxsll8K6w9w1SXLOTk+/o6c+3BmbnwXnbz1QrJIZFBRPvAYQY9Mvf lfOHcsQPZTk1obOC353OaRSuI0m4weEbSSgQb7rJl5GV1bOE34VJHIXYxrS3/hevyH7n lu0Q== X-Gm-Message-State: AKwxytfEkLalo5rG3GhvfP9ondvj8uyViFp8R3Mu5dFqSdV8C2MEG/BA V4mj1DarRbi4KF2n8vgq6V7PQg== X-Google-Smtp-Source: ACJfBosagMNRMfdPuNWeGegn7oqTqHQzDMSweYgJSjwG8ALAZ/xNbarFPqmjMOCh45MwFmV0xRdy3g== X-Received: by 10.25.109.10 with SMTP id i10mr17983827lfc.54.1516103471281; Tue, 16 Jan 2018 03:51:11 -0800 (PST) From: "Edgar E. Iglesias" To: qemu-devel@nongnu.org, peter.maydell@linaro.org Date: Tue, 16 Jan 2018 12:51:00 +0100 Message-Id: <1516103467-7983-2-git-send-email-edgar.iglesias@gmail.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516103467-7983-1-git-send-email-edgar.iglesias@gmail.com> References: <1516103467-7983-1-git-send-email-edgar.iglesias@gmail.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4010:c07::242 Subject: [Qemu-devel] [PULL v1 1/8] xlnx-zynqmp-pmu: Initial commit of the ZynqMP PMU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sai.pavan.boddu@xilinx.com, edgar.iglesias@xilinx.com, alistai@xilinx.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Alistair Francis The Xilinx ZynqMP SoC has two main processing systems in it. The ARM processing system (which is already modeled in QEMU) and the MicroBlaze Power Management Unit (PMU). This is the inital work for adding support for the PMU. The PMU susbsystem runs along side the ARM system on hardware, but due to architecture limitations in QEMU the two instances are seperate for the time being. Let's follow the same setup we do with the ARM system, where there is an SoC device and a ZCU102 board. Although the PMU is less board specific we are still going to follow the same split as maybe in future we can connect the PMU device to the ARM ZCU102 board. As the machine will be fairly small let's keep them both together in one file. Signed-off-by: Alistair Francis Reviewed-by: Edgar E. Iglesias Signed-off-by: Edgar E. Iglesias --- hw/microblaze/Makefile.objs | 1 + hw/microblaze/xlnx-zynqmp-pmu.c | 83 +++++++++++++++++++++++++++++++++++++= ++++ 2 files changed, 84 insertions(+) create mode 100644 hw/microblaze/xlnx-zynqmp-pmu.c diff --git a/hw/microblaze/Makefile.objs b/hw/microblaze/Makefile.objs index b2517d8..ae9fd40 100644 --- a/hw/microblaze/Makefile.objs +++ b/hw/microblaze/Makefile.objs @@ -1,3 +1,4 @@ obj-y +=3D petalogix_s3adsp1800_mmu.o obj-y +=3D petalogix_ml605_mmu.o +obj-y +=3D xlnx-zynqmp-pmu.o obj-y +=3D boot.o diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pm= u.c new file mode 100644 index 0000000..ac0f789 --- /dev/null +++ b/hw/microblaze/xlnx-zynqmp-pmu.c @@ -0,0 +1,83 @@ +/* + * Xilinx Zynq MPSoC PMU (Power Management Unit) emulation + * + * Copyright (C) 2017 Xilinx Inc + * Written by Alistair Francis + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WIT= HOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License + * for more details. + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "qemu-common.h" +#include "hw/boards.h" +#include "cpu.h" + +/* Define the PMU device */ + +#define TYPE_XLNX_ZYNQMP_PMU_SOC "xlnx,zynqmp-pmu-soc" +#define XLNX_ZYNQMP_PMU_SOC(obj) OBJECT_CHECK(XlnxZynqMPPMUSoCState, (obj)= , \ + TYPE_XLNX_ZYNQMP_PMU_SOC) + +typedef struct XlnxZynqMPPMUSoCState { + /*< private >*/ + DeviceState parent_obj; + + /*< public >*/ +} XlnxZynqMPPMUSoCState; + +static void xlnx_zynqmp_pmu_soc_init(Object *obj) +{ + +} + +static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp) +{ + +} + +static void xlnx_zynqmp_pmu_soc_class_init(ObjectClass *oc, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(oc); + + dc->realize =3D xlnx_zynqmp_pmu_soc_realize; +} + +static const TypeInfo xlnx_zynqmp_pmu_soc_type_info =3D { + .name =3D TYPE_XLNX_ZYNQMP_PMU_SOC, + .parent =3D TYPE_DEVICE, + .instance_size =3D sizeof(XlnxZynqMPPMUSoCState), + .instance_init =3D xlnx_zynqmp_pmu_soc_init, + .class_init =3D xlnx_zynqmp_pmu_soc_class_init, +}; + +static void xlnx_zynqmp_pmu_soc_register_types(void) +{ + type_register_static(&xlnx_zynqmp_pmu_soc_type_info); +} + +type_init(xlnx_zynqmp_pmu_soc_register_types) + +/* Define the PMU Machine */ + +static void xlnx_zynqmp_pmu_init(MachineState *machine) +{ + +} + +static void xlnx_zynqmp_pmu_machine_init(MachineClass *mc) +{ + mc->desc =3D "Xilinx ZynqMP PMU machine"; + mc->init =3D xlnx_zynqmp_pmu_init; +} + +DEFINE_MACHINE("xlnx-zynqmp-pmu", xlnx_zynqmp_pmu_machine_init) + --=20 2.7.4