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X-Received-From: 2a00:1450:400c:c0c::242 Subject: [Qemu-devel] [PATCH v2 16/16] target/xtensa: implement disassembler X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add disas/xtensa.c and use libisa for instruction decoding/opcode name lookup. Signed-off-by: Max Filippov --- MAINTAINERS | 1 + disas/Makefile.objs | 1 + disas/xtensa.c | 133 ++++++++++++++++++++++++++++++++++++++++++++++++= ++++ include/disas/bfd.h | 1 + target/xtensa/cpu.c | 9 ++++ 5 files changed, 145 insertions(+) create mode 100644 disas/xtensa.c diff --git a/MAINTAINERS b/MAINTAINERS index 0255113470c2..4e2795bc029f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -259,6 +259,7 @@ S: Maintained F: target/xtensa/ F: hw/xtensa/ F: tests/tcg/xtensa/ +F: disas/xtensa.c =20 TriCore M: Bastian Koppelmann diff --git a/disas/Makefile.objs b/disas/Makefile.objs index 194648fb1ac9..53556f8f5a9f 100644 --- a/disas/Makefile.objs +++ b/disas/Makefile.objs @@ -21,6 +21,7 @@ common-obj-$(CONFIG_S390_DIS) +=3D s390.o common-obj-$(CONFIG_SH4_DIS) +=3D sh4.o common-obj-$(CONFIG_SPARC_DIS) +=3D sparc.o common-obj-$(CONFIG_LM32_DIS) +=3D lm32.o +common-obj-$(CONFIG_XTENSA_DIS) +=3D xtensa.o =20 # TODO: As long as the TCG interpreter and its generated code depend # on the QEMU target, we cannot compile the disassembler here. diff --git a/disas/xtensa.c b/disas/xtensa.c new file mode 100644 index 000000000000..114326a4fc2e --- /dev/null +++ b/disas/xtensa.c @@ -0,0 +1,133 @@ +/* + * Copyright (c) 2017, Max Filippov, Open Source and Linux Lab. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are = met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in t= he + * documentation and/or other materials provided with the distributi= on. + * * Neither the name of the Open Source and Linux Lab nor the + * names of its contributors may be used to endorse or promote produ= cts + * derived from this software without specific prior written permiss= ion. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS= IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, T= HE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP= OSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMA= GES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERV= ICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED= AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR T= ORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE O= F THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "qemu/osdep.h" +#include "disas/bfd.h" +#include "hw/xtensa/xtensa-isa.h" + +int print_insn_xtensa(bfd_vma memaddr, struct disassemble_info *info) +{ + xtensa_isa isa =3D info->private_data; + xtensa_insnbuf insnbuf =3D xtensa_insnbuf_alloc(isa); + xtensa_insnbuf slotbuf =3D xtensa_insnbuf_alloc(isa); + bfd_byte *buffer =3D g_malloc(1); + int status =3D info->read_memory_func(memaddr, buffer, 1, info); + xtensa_format fmt; + unsigned slot, slots; + unsigned len; + + if (status) { + info->memory_error_func(status, memaddr, info); + len =3D -1; + goto out; + } + len =3D xtensa_isa_length_from_chars(isa, buffer); + if (len =3D=3D XTENSA_UNDEFINED) { + info->fprintf_func(info->stream, ".byte 0x%02x", buffer[0]); + len =3D 1; + goto out; + } + buffer =3D g_realloc(buffer, len); + status =3D info->read_memory_func(memaddr + 1, buffer + 1, len - 1, in= fo); + if (status) { + info->fprintf_func(info->stream, ".byte 0x%02x", buffer[0]); + info->memory_error_func(status, memaddr + 1, info); + len =3D 1; + goto out; + } + + xtensa_insnbuf_from_chars(isa, insnbuf, buffer, len); + fmt =3D xtensa_format_decode(isa, insnbuf); + if (fmt =3D=3D XTENSA_UNDEFINED) { + unsigned i; + + for (i =3D 0; i < len; ++i) { + info->fprintf_func(info->stream, "%s 0x%02x", + i ? ", " : ".byte ", buffer[i]); + } + goto out; + } + slots =3D xtensa_format_num_slots(isa, fmt); + + if (slots > 1) { + info->fprintf_func(info->stream, "{ "); + } + + for (slot =3D 0; slot < slots; ++slot) { + xtensa_opcode opc; + unsigned opnd, vopnd, opnds; + + if (slot) { + info->fprintf_func(info->stream, "; "); + } + xtensa_format_get_slot(isa, fmt, slot, insnbuf, slotbuf); + opc =3D xtensa_opcode_decode(isa, fmt, slot, slotbuf); + if (opc =3D=3D XTENSA_UNDEFINED) { + info->fprintf_func(info->stream, "???"); + continue; + } + opnds =3D xtensa_opcode_num_operands(isa, opc); + + info->fprintf_func(info->stream, "%s", xtensa_opcode_name(isa, opc= )); + + for (opnd =3D vopnd =3D 0; opnd < opnds; ++opnd) { + if (xtensa_operand_is_visible(isa, opc, opnd)) { + uint32_t v =3D 0xbadc0de; + int rc; + + info->fprintf_func(info->stream, vopnd ? ", " : "\t"); + xtensa_operand_get_field(isa, opc, opnd, fmt, slot, + slotbuf, &v); + rc =3D xtensa_operand_decode(isa, opc, opnd, &v); + if (rc =3D=3D XTENSA_UNDEFINED) { + info->fprintf_func(info->stream, "???"); + } else if (xtensa_operand_is_register(isa, opc, opnd)) { + xtensa_regfile rf =3D xtensa_operand_regfile(isa, opc,= opnd); + + info->fprintf_func(info->stream, "%s%d", + xtensa_regfile_shortname(isa, rf), = v); + } else if (xtensa_operand_is_PCrelative(isa, opc, opnd)) { + xtensa_operand_undo_reloc(isa, opc, opnd, &v, memaddr); + info->fprintf_func(info->stream, "0x%x", v); + } else { + info->fprintf_func(info->stream, "%d", v); + } + ++vopnd; + } + } + } + if (slots > 1) { + info->fprintf_func(info->stream, " }"); + } + +out: + g_free(buffer); + xtensa_insnbuf_free(isa, insnbuf); + xtensa_insnbuf_free(isa, slotbuf); + + return len; +} diff --git a/include/disas/bfd.h b/include/disas/bfd.h index 46c7ec3376fe..932453750cc0 100644 --- a/include/disas/bfd.h +++ b/include/disas/bfd.h @@ -428,6 +428,7 @@ int print_insn_ia64 (bfd_vma, disassemble_i= nfo*); int print_insn_lm32 (bfd_vma, disassemble_info*); int print_insn_big_nios2 (bfd_vma, disassemble_info*); int print_insn_little_nios2 (bfd_vma, disassemble_info*); +int print_insn_xtensa (bfd_vma, disassemble_info*); =20 #if 0 /* Fetch the disassembler for a given BFD, if that support is available. = */ diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index 91961789a5b7..1c982a0b2e31 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -93,6 +93,14 @@ static ObjectClass *xtensa_cpu_class_by_name(const char = *cpu_model) return oc; } =20 +static void xtensa_cpu_disas_set_info(CPUState *cs, disassemble_info *info) +{ + XtensaCPU *cpu =3D XTENSA_CPU(cs); + + info->private_data =3D cpu->env.config->isa; + info->print_insn =3D print_insn_xtensa; +} + static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs =3D CPU(dev); @@ -164,6 +172,7 @@ static void xtensa_cpu_class_init(ObjectClass *oc, void= *data) cc->do_unassigned_access =3D xtensa_cpu_do_unassigned_access; #endif cc->debug_excp_handler =3D xtensa_breakpoint_handler; + cc->disas_set_info =3D xtensa_cpu_disas_set_info; cc->tcg_initialize =3D xtensa_translate_init; dc->vmsd =3D &vmstate_xtensa_cpu; } --=20 2.1.4