From nobody Wed Apr 16 06:36:44 2025 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1513191380522849.0440702211799; Wed, 13 Dec 2017 10:56:20 -0800 (PST) Received: from localhost ([::1]:37061 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ePCCW-0007EK-TD for importer@patchew.org; Wed, 13 Dec 2017 13:56:16 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51719) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ePBWl-0004vf-FJ for qemu-devel@nongnu.org; Wed, 13 Dec 2017 13:13:11 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ePBWk-00088G-DV for qemu-devel@nongnu.org; Wed, 13 Dec 2017 13:13:07 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:39146) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ePBWk-00086L-4h for qemu-devel@nongnu.org; Wed, 13 Dec 2017 13:13:06 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ePBWj-0007nE-6R for qemu-devel@nongnu.org; Wed, 13 Dec 2017 18:13:05 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Wed, 13 Dec 2017 18:12:30 +0000 Message-Id: <1513188761-20784-33-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1513188761-20784-1-git-send-email-peter.maydell@linaro.org> References: <1513188761-20784-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 32/43] target/arm: Convert get_phys_addr_pmsav8() to not return FSC values X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_6 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Make get_phys_addr_pmsav8() return a fault type in the ARMMMUFaultInfo structure, which we convert to the FSC at the callsite. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Edgar E. Iglesias Tested-by: Stefano Stabellini Message-id: 1512503192-2239-9-git-send-email-peter.maydell@linaro.org --- target/arm/helper.c | 29 ++++++++++++++++++----------- 1 file changed, 18 insertions(+), 11 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 2752d9e..e611b0f 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -9364,7 +9364,7 @@ static void v8m_security_lookup(CPUARMState *env, uin= t32_t address, static bool pmsav8_mpu_lookup(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, hwaddr *phys_ptr, MemTxAttrs *txattrs, - int *prot, uint32_t *fsr, uint32_t *mregion) + int *prot, ARMMMUFaultInfo *fi, uint32_t *mr= egion) { /* Perform a PMSAv8 MPU lookup (without also doing the SAU check * that a full phys-to-virt translation does). @@ -9420,7 +9420,8 @@ static bool pmsav8_mpu_lookup(CPUARMState *env, uint3= 2_t address, /* Multiple regions match -- always a failure (unlike * PMSAv7 where highest-numbered-region wins) */ - *fsr =3D 0x00d; /* permission fault */ + fi->type =3D ARMFault_Permission; + fi->level =3D 1; return true; } =20 @@ -9448,7 +9449,7 @@ static bool pmsav8_mpu_lookup(CPUARMState *env, uint3= 2_t address, =20 if (!hit) { /* background fault */ - *fsr =3D 0; + fi->type =3D ARMFault_Background; return true; } =20 @@ -9476,7 +9477,8 @@ static bool pmsav8_mpu_lookup(CPUARMState *env, uint3= 2_t address, } } =20 - *fsr =3D 0x00d; /* Permission fault */ + fi->type =3D ARMFault_Permission; + fi->level =3D 1; return !(*prot & (1 << access_type)); } =20 @@ -9484,7 +9486,7 @@ static bool pmsav8_mpu_lookup(CPUARMState *env, uint3= 2_t address, static bool get_phys_addr_pmsav8(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_= idx, hwaddr *phys_ptr, MemTxAttrs *txattrs, - int *prot, uint32_t *fsr) + int *prot, ARMMMUFaultInfo *fi) { uint32_t secure =3D regime_is_secure(env, mmu_idx); V8M_SAttributes sattrs =3D {}; @@ -9510,7 +9512,11 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, u= int32_t address, * (including possibly emulating an SG instruction). */ if (sattrs.ns !=3D !secure) { - *fsr =3D sattrs.nsc ? M_FAKE_FSR_NSC_EXEC : M_FAKE_FSR_SFA= ULT; + if (sattrs.nsc) { + fi->type =3D ARMFault_QEMU_NSCExec; + } else { + fi->type =3D ARMFault_QEMU_SFault; + } *phys_ptr =3D address; *prot =3D 0; return true; @@ -9532,7 +9538,7 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, ui= nt32_t address, * If we added it we would need to do so as a special case * for M_FAKE_FSR_SFAULT in arm_v7m_cpu_do_interrupt(). */ - *fsr =3D M_FAKE_FSR_SFAULT; + fi->type =3D ARMFault_QEMU_SFault; *phys_ptr =3D address; *prot =3D 0; return true; @@ -9541,7 +9547,7 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, ui= nt32_t address, } =20 return pmsav8_mpu_lookup(env, address, access_type, mmu_idx, phys_ptr, - txattrs, prot, fsr, NULL); + txattrs, prot, fi, NULL); } =20 static bool get_phys_addr_pmsav5(CPUARMState *env, uint32_t address, @@ -9819,7 +9825,8 @@ static bool get_phys_addr(CPUARMState *env, target_ul= ong address, if (arm_feature(env, ARM_FEATURE_V8)) { /* PMSAv8 */ ret =3D get_phys_addr_pmsav8(env, address, access_type, mmu_id= x, - phys_ptr, attrs, prot, fsr); + phys_ptr, attrs, prot, fi); + *fsr =3D arm_fi_to_sfsc(fi); } else if (arm_feature(env, ARM_FEATURE_V7)) { /* PMSAv7 */ ret =3D get_phys_addr_pmsav7(env, address, access_type, mmu_id= x, @@ -10180,9 +10187,9 @@ uint32_t HELPER(v7m_tt)(CPUARMState *env, uint32_t = addr, uint32_t op) uint32_t tt_resp; bool r, rw, nsr, nsrw, mrvalid; int prot; + ARMMMUFaultInfo fi =3D {}; MemTxAttrs attrs =3D {}; hwaddr phys_addr; - uint32_t fsr; ARMMMUIdx mmu_idx; uint32_t mregion; bool targetpriv; @@ -10216,7 +10223,7 @@ uint32_t HELPER(v7m_tt)(CPUARMState *env, uint32_t = addr, uint32_t op) if (arm_current_el(env) !=3D 0 || alt) { /* We can ignore the return value as prot is always set */ pmsav8_mpu_lookup(env, addr, MMU_DATA_LOAD, mmu_idx, - &phys_addr, &attrs, &prot, &fsr, &mregion); + &phys_addr, &attrs, &prot, &fi, &mregion); if (mregion =3D=3D -1) { mrvalid =3D false; mregion =3D 0; --=20 2.7.4