From nobody Wed Apr 16 06:33:45 2025 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1513190790369832.3173965137199; Wed, 13 Dec 2017 10:46:30 -0800 (PST) Received: from localhost ([::1]:36980 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ePC2t-0007Pp-AG for importer@patchew.org; Wed, 13 Dec 2017 13:46:19 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51645) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ePBWi-0004rY-9s for qemu-devel@nongnu.org; Wed, 13 Dec 2017 13:13:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ePBWh-000834-5L for qemu-devel@nongnu.org; Wed, 13 Dec 2017 13:13:04 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:39140) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ePBWg-00080N-UJ for qemu-devel@nongnu.org; Wed, 13 Dec 2017 13:13:03 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1ePBWf-0007kp-Md for qemu-devel@nongnu.org; Wed, 13 Dec 2017 18:13:01 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Wed, 13 Dec 2017 18:12:25 +0000 Message-Id: <1513188761-20784-28-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1513188761-20784-1-git-send-email-peter.maydell@linaro.org> References: <1513188761-20784-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 27/43] target/arm: Convert get_phys_addr_v5() to not return FSC values X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_6 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Make get_phys_addr_v5() return a fault type in the ARMMMUFaultInfo structure, which we convert to the FSC at the callsite. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Reviewed-by: Edgar E. Iglesias Tested-by: Stefano Stabellini Message-id: 1512503192-2239-4-git-send-email-peter.maydell@linaro.org --- target/arm/helper.c | 33 ++++++++++++++++++--------------- 1 file changed, 18 insertions(+), 15 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index c43159e..5f2f004 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -8341,11 +8341,11 @@ static uint64_t arm_ldq_ptw(CPUState *cs, hwaddr ad= dr, bool is_secure, static bool get_phys_addr_v5(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_idx, hwaddr *phys_ptr, int *prot, - target_ulong *page_size, uint32_t *fsr, + target_ulong *page_size, ARMMMUFaultInfo *fi) { CPUState *cs =3D CPU(arm_env_get_cpu(env)); - int code; + int level =3D 1; uint32_t table; uint32_t desc; int type; @@ -8359,7 +8359,7 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32= _t address, /* Lookup l1 descriptor. */ if (!get_level1_table_address(env, mmu_idx, &table, address)) { /* Section translation fault if page walk is disabled by PD0 or PD= 1 */ - code =3D 5; + fi->type =3D ARMFault_Translation; goto do_fault; } desc =3D arm_ldl_ptw(cs, table, regime_is_secure(env, mmu_idx), @@ -8374,21 +8374,20 @@ static bool get_phys_addr_v5(CPUARMState *env, uint= 32_t address, domain_prot =3D (dacr >> (domain * 2)) & 3; if (type =3D=3D 0) { /* Section translation fault. */ - code =3D 5; + fi->type =3D ARMFault_Translation; goto do_fault; } + if (type !=3D 2) { + level =3D 2; + } if (domain_prot =3D=3D 0 || domain_prot =3D=3D 2) { - if (type =3D=3D 2) - code =3D 9; /* Section domain fault. */ - else - code =3D 11; /* Page domain fault. */ + fi->type =3D ARMFault_Domain; goto do_fault; } if (type =3D=3D 2) { /* 1Mb section. */ phys_addr =3D (desc & 0xfff00000) | (address & 0x000fffff); ap =3D (desc >> 10) & 3; - code =3D 13; *page_size =3D 1024 * 1024; } else { /* Lookup l2 entry. */ @@ -8403,7 +8402,7 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32= _t address, mmu_idx, fi); switch (desc & 3) { case 0: /* Page translation fault. */ - code =3D 7; + fi->type =3D ARMFault_Translation; goto do_fault; case 1: /* 64k page. */ phys_addr =3D (desc & 0xffff0000) | (address & 0xffff); @@ -8426,7 +8425,7 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32= _t address, /* UNPREDICTABLE in ARMv5; we choose to take a * page translation fault. */ - code =3D 7; + fi->type =3D ARMFault_Translation; goto do_fault; } } else { @@ -8439,18 +8438,19 @@ static bool get_phys_addr_v5(CPUARMState *env, uint= 32_t address, /* Never happens, but compiler isn't smart enough to tell. */ abort(); } - code =3D 15; } *prot =3D ap_to_rw_prot(env, mmu_idx, ap, domain_prot); *prot |=3D *prot ? PAGE_EXEC : 0; if (!(*prot & (1 << access_type))) { /* Access permission fault. */ + fi->type =3D ARMFault_Permission; goto do_fault; } *phys_ptr =3D phys_addr; return false; do_fault: - *fsr =3D code | (domain << 4); + fi->domain =3D domain; + fi->level =3D level; return true; } =20 @@ -9860,8 +9860,11 @@ static bool get_phys_addr(CPUARMState *env, target_u= long address, return get_phys_addr_v6(env, address, access_type, mmu_idx, phys_p= tr, attrs, prot, page_size, fsr, fi); } else { - return get_phys_addr_v5(env, address, access_type, mmu_idx, phys_p= tr, - prot, page_size, fsr, fi); + bool ret =3D get_phys_addr_v5(env, address, access_type, mmu_idx, + phys_ptr, prot, page_size, fi); + + *fsr =3D arm_fi_to_sfsc(fi); + return ret; } } =20 --=20 2.7.4