From nobody Tue Feb 10 14:49:45 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1512503688686886.5011090595693; Tue, 5 Dec 2017 11:54:48 -0800 (PST) Received: from localhost ([::1]:51811 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eMJIc-0000s1-Qm for importer@patchew.org; Tue, 05 Dec 2017 14:54:38 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56675) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eMJB4-00013p-RD for qemu-devel@nongnu.org; Tue, 05 Dec 2017 14:46:51 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eMJB4-0002MG-0j for qemu-devel@nongnu.org; Tue, 05 Dec 2017 14:46:50 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:38776) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eMJB1-0002CW-VR; Tue, 05 Dec 2017 14:46:48 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1eMJAs-0005BS-Ez; Tue, 05 Dec 2017 19:46:38 +0000 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Tue, 5 Dec 2017 19:46:27 +0000 Message-Id: <1512503192-2239-8-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1512503192-2239-1-git-send-email-peter.maydell@linaro.org> References: <1512503192-2239-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH 07/12] target/arm: Convert get_phys_addr_pmsav7() to not return FSC values X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E . Iglesias" , Stefano Stabellini , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Make get_phys_addr_pmsav7() return a fault type in the ARMMMUFaultInfo structure, which we convert to the FSC at the callsite. Signed-off-by: Peter Maydell --- target/arm/helper.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 57286a7..0f5b161 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -9126,7 +9126,8 @@ static inline bool m_is_system_region(CPUARMState *en= v, uint32_t address) =20 static bool get_phys_addr_pmsav7(CPUARMState *env, uint32_t address, MMUAccessType access_type, ARMMMUIdx mmu_= idx, - hwaddr *phys_ptr, int *prot, uint32_t *fs= r) + hwaddr *phys_ptr, int *prot, + ARMMMUFaultInfo *fi) { ARMCPU *cpu =3D arm_env_get_cpu(env); int n; @@ -9221,7 +9222,7 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, ui= nt32_t address, if (n =3D=3D -1) { /* no hits */ if (!pmsav7_use_background_region(cpu, mmu_idx, is_user)) { /* background fault */ - *fsr =3D 0; + fi->type =3D ARMFault_Background; return true; } get_phys_addr_pmsav7_default(env, mmu_idx, address, prot); @@ -9279,7 +9280,8 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, ui= nt32_t address, } } =20 - *fsr =3D 0x00d; /* Permission fault */ + fi->type =3D ARMFault_Permission; + fi->level =3D 1; return !(*prot & (1 << access_type)); } =20 @@ -9824,7 +9826,8 @@ static bool get_phys_addr(CPUARMState *env, target_ul= ong address, } else if (arm_feature(env, ARM_FEATURE_V7)) { /* PMSAv7 */ ret =3D get_phys_addr_pmsav7(env, address, access_type, mmu_id= x, - phys_ptr, prot, fsr); + phys_ptr, prot, fi); + *fsr =3D arm_fi_to_sfsc(fi); } else { /* Pre-v7 MPU */ ret =3D get_phys_addr_pmsav5(env, address, access_type, mmu_id= x, --=20 2.7.4