From nobody Tue Feb 10 16:18:15 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1512503550086305.2877656451104; Tue, 5 Dec 2017 11:52:30 -0800 (PST) Received: from localhost ([::1]:51796 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eMJGV-0006Hb-Bj for importer@patchew.org; Tue, 05 Dec 2017 14:52:27 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56814) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eMJBA-0001Ak-GZ for qemu-devel@nongnu.org; Tue, 05 Dec 2017 14:47:00 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eMJB9-0002Pi-HQ for qemu-devel@nongnu.org; Tue, 05 Dec 2017 14:46:56 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:38776) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eMJB6-0002CW-ST; Tue, 05 Dec 2017 14:46:53 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1eMJAp-000597-1N; Tue, 05 Dec 2017 19:46:35 +0000 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Tue, 5 Dec 2017 19:46:22 +0000 Message-Id: <1512503192-2239-3-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1512503192-2239-1-git-send-email-peter.maydell@linaro.org> References: <1512503192-2239-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH 02/12] target/arm: Remove fsr argument from arm_ld*_ptw() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Edgar E . Iglesias" , Stefano Stabellini , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" All the callers of arm_ldq_ptw() and arm_ldl_ptw() ignore the value that those functions store in the fsr argument on failure: if they return failure to their callers they will always overwrite the fsr value with something else. Remove the argument from these functions and S1_ptw_translate(). This will simplify removing fsr from the calling functions. Signed-off-by: Peter Maydell --- target/arm/helper.c | 24 +++++++++++------------- 1 file changed, 11 insertions(+), 13 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 5368ad8..30616d9 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -8269,7 +8269,6 @@ static bool get_level1_table_address(CPUARMState *env= , ARMMMUIdx mmu_idx, /* Translate a S1 pagetable walk through S2 if needed. */ static hwaddr S1_ptw_translate(CPUARMState *env, ARMMMUIdx mmu_idx, hwaddr addr, MemTxAttrs txattrs, - uint32_t *fsr, ARMMMUFaultInfo *fi) { if ((mmu_idx =3D=3D ARMMMUIdx_S1NSE0 || mmu_idx =3D=3D ARMMMUIdx_S1NSE= 1) && @@ -8278,9 +8277,10 @@ static hwaddr S1_ptw_translate(CPUARMState *env, ARM= MMUIdx mmu_idx, hwaddr s2pa; int s2prot; int ret; + uint32_t fsr; =20 ret =3D get_phys_addr_lpae(env, addr, 0, ARMMMUIdx_S2NS, &s2pa, - &txattrs, &s2prot, &s2size, fsr, fi, NULL= ); + &txattrs, &s2prot, &s2size, &fsr, fi, NUL= L); if (ret) { fi->s2addr =3D addr; fi->stage2 =3D true; @@ -8300,8 +8300,7 @@ static hwaddr S1_ptw_translate(CPUARMState *env, ARMM= MUIdx mmu_idx, * (but not if it was for a debug access). */ static uint32_t arm_ldl_ptw(CPUState *cs, hwaddr addr, bool is_secure, - ARMMMUIdx mmu_idx, uint32_t *fsr, - ARMMMUFaultInfo *fi) + ARMMMUIdx mmu_idx, ARMMMUFaultInfo *fi) { ARMCPU *cpu =3D ARM_CPU(cs); CPUARMState *env =3D &cpu->env; @@ -8310,7 +8309,7 @@ static uint32_t arm_ldl_ptw(CPUState *cs, hwaddr addr= , bool is_secure, =20 attrs.secure =3D is_secure; as =3D arm_addressspace(cs, attrs); - addr =3D S1_ptw_translate(env, mmu_idx, addr, attrs, fsr, fi); + addr =3D S1_ptw_translate(env, mmu_idx, addr, attrs, fi); if (fi->s1ptw) { return 0; } @@ -8322,8 +8321,7 @@ static uint32_t arm_ldl_ptw(CPUState *cs, hwaddr addr= , bool is_secure, } =20 static uint64_t arm_ldq_ptw(CPUState *cs, hwaddr addr, bool is_secure, - ARMMMUIdx mmu_idx, uint32_t *fsr, - ARMMMUFaultInfo *fi) + ARMMMUIdx mmu_idx, ARMMMUFaultInfo *fi) { ARMCPU *cpu =3D ARM_CPU(cs); CPUARMState *env =3D &cpu->env; @@ -8332,7 +8330,7 @@ static uint64_t arm_ldq_ptw(CPUState *cs, hwaddr addr= , bool is_secure, =20 attrs.secure =3D is_secure; as =3D arm_addressspace(cs, attrs); - addr =3D S1_ptw_translate(env, mmu_idx, addr, attrs, fsr, fi); + addr =3D S1_ptw_translate(env, mmu_idx, addr, attrs, fi); if (fi->s1ptw) { return 0; } @@ -8368,7 +8366,7 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32= _t address, goto do_fault; } desc =3D arm_ldl_ptw(cs, table, regime_is_secure(env, mmu_idx), - mmu_idx, fsr, fi); + mmu_idx, fi); type =3D (desc & 3); domain =3D (desc >> 5) & 0x0f; if (regime_el(env, mmu_idx) =3D=3D 1) { @@ -8405,7 +8403,7 @@ static bool get_phys_addr_v5(CPUARMState *env, uint32= _t address, table =3D (desc & 0xfffff000) | ((address >> 8) & 0xffc); } desc =3D arm_ldl_ptw(cs, table, regime_is_secure(env, mmu_idx), - mmu_idx, fsr, fi); + mmu_idx, fi); switch (desc & 3) { case 0: /* Page translation fault. */ code =3D 7; @@ -8487,7 +8485,7 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32= _t address, goto do_fault; } desc =3D arm_ldl_ptw(cs, table, regime_is_secure(env, mmu_idx), - mmu_idx, fsr, fi); + mmu_idx, fi); type =3D (desc & 3); if (type =3D=3D 0 || (type =3D=3D 3 && !arm_feature(env, ARM_FEATURE_P= XN))) { /* Section translation fault, or attempt to use the encoding @@ -8539,7 +8537,7 @@ static bool get_phys_addr_v6(CPUARMState *env, uint32= _t address, /* Lookup l2 entry. */ table =3D (desc & 0xfffffc00) | ((address >> 10) & 0x3fc); desc =3D arm_ldl_ptw(cs, table, regime_is_secure(env, mmu_idx), - mmu_idx, fsr, fi); + mmu_idx, fi); ap =3D ((desc >> 4) & 3) | ((desc >> 7) & 4); switch (desc & 3) { case 0: /* Page translation fault. */ @@ -8950,7 +8948,7 @@ static bool get_phys_addr_lpae(CPUARMState *env, targ= et_ulong address, descaddr |=3D (address >> (stride * (4 - level))) & indexmask; descaddr &=3D ~7ULL; nstable =3D extract32(tableattrs, 4, 1); - descriptor =3D arm_ldq_ptw(cs, descaddr, !nstable, mmu_idx, fsr, f= i); + descriptor =3D arm_ldq_ptw(cs, descaddr, !nstable, mmu_idx, fi); if (fi->s1ptw) { goto do_fault; } --=20 2.7.4