From nobody Tue Feb 10 01:50:25 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1511449132179975.4180691537638; Thu, 23 Nov 2017 06:58:52 -0800 (PST) Received: from localhost ([::1]:44744 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eHsxd-00037E-Aj for importer@patchew.org; Thu, 23 Nov 2017 09:58:41 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40317) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eHsvu-00027m-MM for qemu-devel@nongnu.org; Thu, 23 Nov 2017 09:56:55 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eHsvs-0007ql-Nv for qemu-devel@nongnu.org; Thu, 23 Nov 2017 09:56:54 -0500 Received: from mx1.redhat.com ([209.132.183.28]:50446) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eHsvn-0007if-42; Thu, 23 Nov 2017 09:56:47 -0500 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id BE5E76A7C9; Thu, 23 Nov 2017 14:56:45 +0000 (UTC) Received: from localhost.localdomain.com (ovpn-117-138.ams2.redhat.com [10.36.117.138]) by smtp.corp.redhat.com (Postfix) with ESMTP id 6A2265D6A5; Thu, 23 Nov 2017 14:56:35 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org, wanghaibin.wang@huawei.com Date: Thu, 23 Nov 2017 15:56:13 +0100 Message-Id: <1511448975-28326-3-git-send-email-eric.auger@redhat.com> In-Reply-To: <1511448975-28326-1-git-send-email-eric.auger@redhat.com> References: <1511448975-28326-1-git-send-email-eric.auger@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Thu, 23 Nov 2017 14:56:45 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v3 2/4] hw/intc/arm_gicv3_its: Implement a minimalist reset X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: wei@redhat.com, drjones@redhat.com, vijay.kilari@gmail.com, quintela@redhat.com, dgilbert@redhat.com, wu.wubin@huawei.com, christoffer.dall@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" At the moment the ITS is not properly reset and this causes various bugs on save/restore. We implement a minimalist reset through individual register writes but for kernel versions before v4.15 this fails voiding the vITS cache. We cannot claim we have a comprehensive reset (hence the error message) but that's better than nothing. Signed-off-by: Eric Auger --- v2 -> v3: - individual register writes performed in kvm_arm_its_reset - check KVM_DEV_ARM_VGIC_GRP_ITS_REGS support --- hw/intc/arm_gicv3_its_kvm.c | 41 +++++++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) diff --git a/hw/intc/arm_gicv3_its_kvm.c b/hw/intc/arm_gicv3_its_kvm.c index b1b322b..83e5268 100644 --- a/hw/intc/arm_gicv3_its_kvm.c +++ b/hw/intc/arm_gicv3_its_kvm.c @@ -28,6 +28,16 @@ =20 #define TYPE_KVM_ARM_ITS "arm-its-kvm" #define KVM_ARM_ITS(obj) OBJECT_CHECK(GICv3ITSState, (obj), TYPE_KVM_ARM_I= TS) +#define KVM_ARM_ITS_CLASS(klass) \ + OBJECT_CLASS_CHECK(KVMARMITSClass, (klass), TYPE_KVM_ARM_ITS) +#define KVM_ARM_ITS_GET_CLASS(obj) \ + OBJECT_GET_CLASS(KVMARMITSClass, (obj), TYPE_KVM_ARM_ITS) + +typedef struct KVMARMITSClass { + GICv3ITSCommonClass parent_class; + void (*parent_reset)(DeviceState *dev); +} KVMARMITSClass; + =20 static int kvm_its_send_msi(GICv3ITSState *s, uint32_t value, uint16_t dev= id) { @@ -186,6 +196,34 @@ static void kvm_arm_its_post_load(GICv3ITSState *s) GITS_CTLR, &s->ctlr, true, &error_abort); } =20 +static void kvm_arm_its_reset(DeviceState *dev) +{ + GICv3ITSState *s =3D ARM_GICV3_ITS_COMMON(dev); + KVMARMITSClass *c =3D KVM_ARM_ITS_GET_CLASS(s); + int i; + + c->parent_reset(dev); + + error_report("ITS KVM: full reset is not supported by the host kernel"= ); + + if (!kvm_device_check_attr(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, + GITS_CTLR)) { + return; + } + + kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, + GITS_CTLR, &s->ctlr, true, &error_abort); + + kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, + GITS_CBASER, &s->cbaser, true, &error_abort); + + for (i =3D 0; i < 8; i++) { + kvm_device_access(s->dev_fd, KVM_DEV_ARM_VGIC_GRP_ITS_REGS, + GITS_BASER + i * 8, &s->baser[i], true, + &error_abort); + } +} + static Property kvm_arm_its_props[] =3D { DEFINE_PROP_LINK("parent-gicv3", GICv3ITSState, gicv3, "kvm-arm-gicv3", GICv3State *), @@ -196,12 +234,15 @@ static void kvm_arm_its_class_init(ObjectClass *klass= , void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); GICv3ITSCommonClass *icc =3D ARM_GICV3_ITS_COMMON_CLASS(klass); + KVMARMITSClass *ic =3D KVM_ARM_ITS_CLASS(klass); =20 dc->realize =3D kvm_arm_its_realize; dc->props =3D kvm_arm_its_props; + ic->parent_reset =3D dc->reset; icc->send_msi =3D kvm_its_send_msi; icc->pre_save =3D kvm_arm_its_pre_save; icc->post_load =3D kvm_arm_its_post_load; + dc->reset =3D kvm_arm_its_reset; } =20 static const TypeInfo kvm_arm_its_info =3D { --=20 2.5.5