From nobody Sun May 5 19:40:10 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1510343897526808.6222373562773; Fri, 10 Nov 2017 11:58:17 -0800 (PST) Received: from localhost ([::1]:43268 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eDFRM-0000Lg-Ql for importer@patchew.org; Fri, 10 Nov 2017 14:58:12 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47364) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eDFNC-0005Nx-VR for qemu-devel@nongnu.org; Fri, 10 Nov 2017 14:53:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eDFNC-0006F9-1b for qemu-devel@nongnu.org; Fri, 10 Nov 2017 14:53:55 -0500 Received: from out4-smtp.messagingengine.com ([66.111.4.28]:49123) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eDFN5-0006Af-8g; Fri, 10 Nov 2017 14:53:47 -0500 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id C6BB02126E; Fri, 10 Nov 2017 14:53:46 -0500 (EST) Received: from frontend2 ([10.202.2.161]) by compute4.internal (MEProxy); Fri, 10 Nov 2017 14:53:46 -0500 Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id 9157624631; Fri, 10 Nov 2017 14:53:46 -0500 (EST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=mesmtp; bh=GICqql91n8/XxF +zmvhStmbEqTisJhB0HxKda0g+MjY=; b=lOMgzNX3e1KJN1nnHCzr7xITvaW2YS cE6TRgb17uawKghqzIYLyu6ynpQNEylWWf/CJc3Uott/9Ke22M4KyL7NQ3D1BK5B 9QSRPJjhSDn8wmP3gfysfYiOT9cPNdif3PHCym/pt84l6kKJpJ/uLDu4DDXSqG1s FBa7gJlnkCYQ8= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=GICqql91n8/XxF+zmvhStmbEqTisJhB0HxKda0g+MjY=; b=D4FbCn0K PaZhF6rhkM4NZAlSeLBh+xXewvJVaJIHHWF5LbMsi2txL0THdzgA+mFDr7UscIqq vEUwMTPHZ9YY8PZ5BTfBk2rjpNP2+mUClfPf4quYPWNVbOfE/JD0CsmlCWFUXGBp cugZJBeC1kJYBMqTTRTfMTAqWoNTLECMWel3+sTi2fodPa/CZaEvto0Ky3lt4Yir T4jvC7OvdGVg3SXPzDpq4Y+sorfqIM/HlP0WJMm5mQ66gP85TH69QCA31pCFuI/H bap+nyTWSewDGkefPnJoGZZSSNgufLk56jPhPuGWqF2/ZTo3PIPHKNWALlzZ0pV2 vNos6n9hpTNT1g== X-ME-Sender: From: "Emilio G. Cota" To: qemu-devel@nongnu.org Date: Fri, 10 Nov 2017 14:53:42 -0500 Message-Id: <1510343626-25861-2-git-send-email-cota@braap.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510343626-25861-1-git-send-email-cota@braap.org> References: <1510343626-25861-1-git-send-email-cota@braap.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.111.4.28 Subject: [Qemu-devel] [PATCH for 2.11 1/5] qom: move CPUClass.tcg_initialize to a global X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Thomas Huth , Eduardo Habkost , Igor Mitsyanko , Richard Henderson , Alistair Francis , qemu-arm@nongnu.org, Marcel Apfelbaum , "Edgar E . Iglesias" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" 55c3cee ("qom: Introduce CPUClass.tcg_initialize", 2017-10-24) introduces a per-CPUClass bool that we check so that the target CPU is initialized for TCG only once. This works well except when we end up creating more than one CPUClass, in which case we end up incorrectly initializing TCG more than once, i.e. once for each CPUClass. This can be replicated with: $ aarch64-softmmu/qemu-system-aarch64 -machine xlnx-zcu102 -smp 6 \ -global driver=3Dxlnx,,zynqmp,property=3Dhas_rpu,value=3Don In this case the class name of the "RPUs" is prefixed by "cortex-r5-", whereas the "regular" CPUs are prefixed by "cortex-a53-". This results in two CPUClass instances being created. Fix it by introducing a static variable, so that only the first target CPU being initialized will initialize the target-dependent part of TCG, regardless of CPUClass instances. Fixes: 55c3ceef61fcf06fc98ddc752b7cce788ce7680b Signed-off-by: Emilio G. Cota Reviewed-by: Alistair Francis Reviewed-by: Eduardo Habkost Reviewed-by: Richard Henderson Tested-by: Alistair Francis --- include/qom/cpu.h | 1 - exec.c | 5 +++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/include/qom/cpu.h b/include/qom/cpu.h index fa4b0c9..c2fa151 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -209,7 +209,6 @@ typedef struct CPUClass { /* Keep non-pointer data at the end to minimize holes. */ int gdb_num_core_regs; bool gdb_stop_before_watchpoint; - bool tcg_initialized; } CPUClass; =20 #ifdef HOST_WORDS_BIGENDIAN diff --git a/exec.c b/exec.c index 97a24a8..8b579c0 100644 --- a/exec.c +++ b/exec.c @@ -792,11 +792,12 @@ void cpu_exec_initfn(CPUState *cpu) void cpu_exec_realizefn(CPUState *cpu, Error **errp) { CPUClass *cc =3D CPU_GET_CLASS(cpu); + static bool tcg_target_initialized; =20 cpu_list_add(cpu); =20 - if (tcg_enabled() && !cc->tcg_initialized) { - cc->tcg_initialized =3D true; + if (tcg_enabled() && !tcg_target_initialized) { + tcg_target_initialized =3D true; cc->tcg_initialize(); } =20 --=20 2.7.4 From nobody Sun May 5 19:40:10 2024 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1510343780716810.216861575696; Fri, 10 Nov 2017 11:56:20 -0800 (PST) Received: from localhost ([::1]:43255 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eDFPC-0006oD-HF for importer@patchew.org; Fri, 10 Nov 2017 14:55:58 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47446) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eDFNI-0005Tu-2R for qemu-devel@nongnu.org; Fri, 10 Nov 2017 14:54:01 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eDFND-0006GS-IQ for qemu-devel@nongnu.org; Fri, 10 Nov 2017 14:54:00 -0500 Received: from out4-smtp.messagingengine.com ([66.111.4.28]:60437) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eDFN5-0006Ap-G7; Fri, 10 Nov 2017 14:53:47 -0500 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id 131A8212A0; Fri, 10 Nov 2017 14:53:47 -0500 (EST) Received: from frontend1 ([10.202.2.160]) by compute4.internal (MEProxy); Fri, 10 Nov 2017 14:53:47 -0500 Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id C438A7E6B8; Fri, 10 Nov 2017 14:53:46 -0500 (EST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=mesmtp; bh=zKfCjUo7Reakg0 /ReUwtOq0EMonXUekHXcEhKAOR7bA=; b=zh5FHhJD4uhvZKMdMPzU3G1kEDBq26 QfxPAj71ZF0+n9nqAvb3XX9P4K3OUU1Vs6kEnS1wxAHlh6ufbmmRb+DbI4R1NNRT 0uoIixaIbTnuzgWpa3zNNL7/RoowBDu3EoSMVBH/bML8Ic6YkfEi8zMMU/rVsxDR nD8V3Rn/zsLQU= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=zKfCjUo7Reakg0/ReUwtOq0EMonXUekHXcEhKAOR7bA=; b=FLteUxxo /8yA6Y4gH6PRtBSmHDhStx+jitoMv6uOMQ7zojMUt6PeVfrDK1jWmbygS4GkphAa m/kyAe+sa9Ykp2TqgNvVAHjVox2mR5Rt+ZEe9H1dP2XXweKCPpixkksphtVqvKm7 97XQcuNV0w8BLylNQ36BokdtfGofQSdtYS0Cqx8NCK5wtqMYcFwCdUxG/OqJPQYX IgPgmf2FW9hoWYyma2cceP/zjrQl69hQxGcuRh2MJKPHV1l8fB/+XIgHWE+Q43nO Tl9BggZrcrDizWR8t6z0cWRV3fqw1rjIw4QT5L4Y/mr5a5G896miq6G3HL/jrbnQ HbgQZE16cys8xg== X-ME-Sender: From: "Emilio G. Cota" To: qemu-devel@nongnu.org Date: Fri, 10 Nov 2017 14:53:43 -0500 Message-Id: <1510343626-25861-3-git-send-email-cota@braap.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510343626-25861-1-git-send-email-cota@braap.org> References: <1510343626-25861-1-git-send-email-cota@braap.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.111.4.28 Subject: [Qemu-devel] [PATCH for 2.11 2/5] xlnx-zynqmp: Properly support the smp command line option X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Thomas Huth , Eduardo Habkost , Igor Mitsyanko , Richard Henderson , Alistair Francis , qemu-arm@nongnu.org, Marcel Apfelbaum , "Edgar E . Iglesias" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_6 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Alistair Francis Allow the -smp command line option to control the number of CPUs we create. Signed-off-by: Alistair Francis Reviewed-by: Eduardo Habkost Reviewed-by: Emilio G. Cota Tested-by: Emilio G. Cota --- hw/arm/xlnx-zcu102.c | 3 ++- hw/arm/xlnx-zynqmp.c | 26 ++++++++++++++++---------- 2 files changed, 18 insertions(+), 11 deletions(-) diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index e2d15a1..7ec03da 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -235,7 +235,8 @@ static void xlnx_zcu102_machine_class_init(ObjectClass = *oc, void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); =20 - mc->desc =3D "Xilinx ZynqMP ZCU102 board"; + mc->desc =3D "Xilinx ZynqMP ZCU102 board with 4xA53s and 2xR5s based o= n " \ + "the value of smp"; mc->init =3D xlnx_zcu102_init; mc->block_default_type =3D IF_IDE; mc->units_per_default_bus =3D 1; diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c index d4b6560..c707c66 100644 --- a/hw/arm/xlnx-zynqmp.c +++ b/hw/arm/xlnx-zynqmp.c @@ -98,8 +98,9 @@ static void xlnx_zynqmp_create_rpu(XlnxZynqMPState *s, co= nst char *boot_cpu, { Error *err =3D NULL; int i; + int num_rpus =3D MIN(smp_cpus - XLNX_ZYNQMP_NUM_APU_CPUS, XLNX_ZYNQMP_= NUM_RPU_CPUS); =20 - for (i =3D 0; i < XLNX_ZYNQMP_NUM_RPU_CPUS; i++) { + for (i =3D 0; i < num_rpus; i++) { char *name; =20 object_initialize(&s->rpu_cpu[i], sizeof(s->rpu_cpu[i]), @@ -132,8 +133,9 @@ static void xlnx_zynqmp_init(Object *obj) { XlnxZynqMPState *s =3D XLNX_ZYNQMP(obj); int i; + int num_apus =3D MIN(smp_cpus, XLNX_ZYNQMP_NUM_APU_CPUS); =20 - for (i =3D 0; i < XLNX_ZYNQMP_NUM_APU_CPUS; i++) { + for (i =3D 0; i < num_apus; i++) { object_initialize(&s->apu_cpu[i], sizeof(s->apu_cpu[i]), "cortex-a53-" TYPE_ARM_CPU); object_property_add_child(obj, "apu-cpu[*]", OBJECT(&s->apu_cpu[i]= ), @@ -182,6 +184,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error= **errp) MemoryRegion *system_memory =3D get_system_memory(); uint8_t i; uint64_t ram_size; + int num_apus =3D MIN(smp_cpus, XLNX_ZYNQMP_NUM_APU_CPUS); const char *boot_cpu =3D s->boot_cpu ? s->boot_cpu : "apu-cpu[0]"; ram_addr_t ddr_low_size, ddr_high_size; qemu_irq gic_spi[GIC_NUM_SPI_INTR]; @@ -233,10 +236,10 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Err= or **errp) =20 qdev_prop_set_uint32(DEVICE(&s->gic), "num-irq", GIC_NUM_SPI_INTR + 32= ); qdev_prop_set_uint32(DEVICE(&s->gic), "revision", 2); - qdev_prop_set_uint32(DEVICE(&s->gic), "num-cpu", XLNX_ZYNQMP_NUM_APU_C= PUS); + qdev_prop_set_uint32(DEVICE(&s->gic), "num-cpu", num_apus); =20 /* Realize APUs before realizing the GIC. KVM requires this. */ - for (i =3D 0; i < XLNX_ZYNQMP_NUM_APU_CPUS; i++) { + for (i =3D 0; i < num_apus; i++) { char *name; =20 object_property_set_int(OBJECT(&s->apu_cpu[i]), QEMU_PSCI_CONDUIT_= SMC, @@ -292,7 +295,7 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Error= **errp) } } =20 - for (i =3D 0; i < XLNX_ZYNQMP_NUM_APU_CPUS; i++) { + for (i =3D 0; i < num_apus; i++) { qemu_irq irq; =20 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gic), i, @@ -307,11 +310,14 @@ static void xlnx_zynqmp_realize(DeviceState *dev, Err= or **errp) } =20 if (s->has_rpu) { - xlnx_zynqmp_create_rpu(s, boot_cpu, &err); - if (err) { - error_propagate(errp, err); - return; - } + info_report("The 'has_rpu' property is no longer required, to use = the " + "RPUs just use -smp 6."); + } + + xlnx_zynqmp_create_rpu(s, boot_cpu, &err); + if (err) { + error_propagate(errp, err); + return; } =20 if (!s->boot_cpu_ptr) { --=20 2.7.4 From nobody Sun May 5 19:40:10 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1510344001486188.95143207279796; Fri, 10 Nov 2017 12:00:01 -0800 (PST) Received: from localhost ([::1]:43277 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eDFSy-0001ZO-MZ for importer@patchew.org; Fri, 10 Nov 2017 14:59:52 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47360) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eDFNC-0005Nn-Pt for qemu-devel@nongnu.org; Fri, 10 Nov 2017 14:53:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eDFNB-0006EZ-BH for qemu-devel@nongnu.org; Fri, 10 Nov 2017 14:53:54 -0500 Received: from out4-smtp.messagingengine.com ([66.111.4.28]:60233) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eDFN5-0006B6-Lw; Fri, 10 Nov 2017 14:53:47 -0500 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id 43A81212C8; Fri, 10 Nov 2017 14:53:47 -0500 (EST) Received: from frontend2 ([10.202.2.161]) by compute4.internal (MEProxy); Fri, 10 Nov 2017 14:53:47 -0500 Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id 0BDEA24631; Fri, 10 Nov 2017 14:53:47 -0500 (EST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=mesmtp; bh=r88MF40W9pSEe9 7d+djRzbpw1Fbz7r9nHuOys0gZuDI=; b=Q0rlqhn6PmwKhGiRpAPBT4JlZWrk26 j+3TJMTn/X8sPx1htI6jd3S1SjD5HyzI6MGZ26g33rY1+qosVbjVb9mjjBOowBAZ t5QgwBQGhiAM568T+YdzmHtWb+RKfMFUa23D22Utx5qJR4rQ0Tl/CwTQ78L9fq8D XcyZdRpC6F6w4= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=r88MF40W9pSEe97d+djRzbpw1Fbz7r9nHuOys0gZuDI=; b=iPu7qDar 9hL3Klm4xzbLfAhE8fMgjjDKdk576IsSJ29qwhCG6mXk0V5mxvlS5hwYeQ3sYecu MwcOExVPik4laVpZQ17WGgIvQ+Pxrj4id+fBeTGOfa6nIa93J1WUfwcbPBBEwjca eYjpNs1lu2pBmF6uPB6DiYB8KNpoEKdx2OO8iQ4TjEB5z8m1ldPGe+47xkWL8XmW yr56Z1lc7MWEa6hK8v328W2iaBImeoLuSOT4xwEY4QVnFNezUI5UaoaJJw9LUL1p J7tVlwntYKWaoRfkAIjgfnVqF9YVfUffPRLG1JNFY+Blr2hEOsNAEn47TCBFn6w1 5jczUhqTq4XIbA== X-ME-Sender: From: "Emilio G. Cota" To: qemu-devel@nongnu.org Date: Fri, 10 Nov 2017 14:53:44 -0500 Message-Id: <1510343626-25861-4-git-send-email-cota@braap.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510343626-25861-1-git-send-email-cota@braap.org> References: <1510343626-25861-1-git-send-email-cota@braap.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.111.4.28 Subject: [Qemu-devel] [PATCH for 2.11 3/5] xlnx-zcu102: Add an info message deprecating the EP108 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Thomas Huth , Eduardo Habkost , Igor Mitsyanko , Richard Henderson , Alistair Francis , qemu-arm@nongnu.org, Marcel Apfelbaum , "Edgar E . Iglesias" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Alistair Francis The EP108 was an early access development board that is no longer used. Add an info message to convert any users to the ZCU102 instead. On QEMU they are both identical. This patch also updated the qemu-doc.texi file to indicate that the EP108 has been deprecated. Signed-off-by: Alistair Francis Reviewed-by: Emilio G. Cota --- qemu-doc.texi | 7 +++++++ hw/arm/xlnx-zcu102.c | 3 +++ 2 files changed, 10 insertions(+) diff --git a/qemu-doc.texi b/qemu-doc.texi index 8c10956..d383ac4 100644 --- a/qemu-doc.texi +++ b/qemu-doc.texi @@ -2537,6 +2537,13 @@ or ``ivshmem-doorbell`` device types. The ``spapr-pci-vfio-host-bridge'' device type is replaced by the ``spapr-pci-host-bridge'' device type. =20 +@section System emulator machines + +@subsection Xilinx EP108 (since 2.11.0) + +The ``xlnx-ep108'' machine has been replaced by the ``xlnx-zcu102'' machin= e. +The ``xlnx-zcu102'' machine has the same features and capabilites in QEMU. + @node License @appendix License =20 diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index 7ec03da..adddd23 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -164,6 +164,9 @@ static void xlnx_ep108_init(MachineState *machine) { XlnxZCU102 *s =3D EP108_MACHINE(machine); =20 + info_report("The Xilinx EP108 machine is deprecated, please use the " + "ZCU102 machine instead. It has the same features supporte= d."); + xlnx_zynqmp_init(s, machine); } =20 --=20 2.7.4 From nobody Sun May 5 19:40:10 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1510343849065822.0357192182804; Fri, 10 Nov 2017 11:57:29 -0800 (PST) Received: from localhost ([::1]:43260 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eDFQU-000840-Ae for importer@patchew.org; Fri, 10 Nov 2017 14:57:18 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47374) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eDFND-0005OK-9y for qemu-devel@nongnu.org; Fri, 10 Nov 2017 14:53:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eDFNC-0006FQ-Ai for qemu-devel@nongnu.org; Fri, 10 Nov 2017 14:53:55 -0500 Received: from out4-smtp.messagingengine.com ([66.111.4.28]:37759) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eDFN5-0006BH-VW; Fri, 10 Nov 2017 14:53:48 -0500 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id 7E76C212D8; Fri, 10 Nov 2017 14:53:47 -0500 (EST) Received: from frontend1 ([10.202.2.160]) by compute4.internal (MEProxy); Fri, 10 Nov 2017 14:53:47 -0500 Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id 4021E7E6B8; Fri, 10 Nov 2017 14:53:47 -0500 (EST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=mesmtp; bh=pqHQJ2NtykbD73 t2beuDfy4hyiS2WPvv0q1MpbtqhJk=; b=A1HlLjaKbPctNunYfoyQW/NwBu+c7L k9sHm861ymDQJB/WHQFnMp2SXg7vtMvGmdFFyS9tfmHf839jhgnDAy4gMzR3ghVW vr3MC+1oCqNbex+J99BYQ9V63sAt8NbtncTw8fD/sG3qJx41SfYdc9YAv8IUmmlP OYk8eGdwkY3tg= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=pqHQJ2NtykbD73t2beuDfy4hyiS2WPvv0q1MpbtqhJk=; b=SyFQc5dC 2e472gdOzKBW5uWOGWJuLpaaY3/RifTaJydd38nxOlBtiui8UsQVJCCKC2l/MXzX ataLGP+tLIRT5lOYW6FW+nPwxtOmhRKqLcuI16b3ofGJtVUypNScs3sClsVM0QSj unsIIobpepHw36Z61DNB24L0fU3UaBkLgpeXB+dgo0yFdsmjlidbE4chzmAOWkqt tGzsqpqxm7jdWag5VcnMtop1EfJyc1qRtbbmBom3QVkfIxrpa9b9j8DlhK3ErBC7 Tew8VdWXnfOeSUHMd6/QjlH5zxiWItRnRb2TiTseSpm3akXMGLDQ43Ladxz8OB9Y VyDcZhHMBZFo8Q== X-ME-Sender: From: "Emilio G. Cota" To: qemu-devel@nongnu.org Date: Fri, 10 Nov 2017 14:53:45 -0500 Message-Id: <1510343626-25861-5-git-send-email-cota@braap.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510343626-25861-1-git-send-email-cota@braap.org> References: <1510343626-25861-1-git-send-email-cota@braap.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.111.4.28 Subject: [Qemu-devel] [PATCH for 2.11 4/5] xlnx-zcu102: Specify the max number of CPUs for the EP108 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Thomas Huth , Eduardo Habkost , Igor Mitsyanko , Richard Henderson , Alistair Francis , qemu-arm@nongnu.org, Marcel Apfelbaum , "Edgar E . Iglesias" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Just like the zcu102, the ep108 can instantiate several CPUs. Signed-off-by: Emilio G. Cota Reviewed-by: Alistair Francis --- hw/arm/xlnx-zcu102.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index adddd23..190eb69 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -188,6 +188,7 @@ static void xlnx_ep108_machine_class_init(ObjectClass *= oc, void *data) mc->block_default_type =3D IF_IDE; mc->units_per_default_bus =3D 1; mc->ignore_memory_transaction_failures =3D true; + mc->max_cpus =3D XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS; } =20 static const TypeInfo xlnx_ep108_machine_init_typeinfo =3D { --=20 2.7.4 From nobody Sun May 5 19:40:10 2024 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1510343765376142.53800670730197; Fri, 10 Nov 2017 11:56:05 -0800 (PST) Received: from localhost ([::1]:43254 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eDFP5-0006g9-91 for importer@patchew.org; Fri, 10 Nov 2017 14:55:51 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47389) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eDFND-0005Of-P0 for qemu-devel@nongnu.org; Fri, 10 Nov 2017 14:53:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eDFNC-0006FE-2r for qemu-devel@nongnu.org; Fri, 10 Nov 2017 14:53:55 -0500 Received: from out4-smtp.messagingengine.com ([66.111.4.28]:41847) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eDFN6-0006BQ-4p; Fri, 10 Nov 2017 14:53:48 -0500 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id AD487212AD; Fri, 10 Nov 2017 14:53:47 -0500 (EST) Received: from frontend2 ([10.202.2.161]) by compute4.internal (MEProxy); Fri, 10 Nov 2017 14:53:47 -0500 Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id 762BD24631; Fri, 10 Nov 2017 14:53:47 -0500 (EST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=mesmtp; bh=1WJxFes6qCeE2S EUWYxFgDeT8yPJTnixP/FPXmUHqww=; b=fq4k7iGi+OTZUSvvWJ3nNqL1f49eb5 rsh7DM8mifl5QkSP5Nfhese3IKy1CXCBIH3id5/8qmBrW7SjoNzCcOpWKorBG8Sz vUqTwWCr+qiYdgFpgVHwdDuC56pYWaJbv3rSc3XZYiBU/xhNUb7e6J/516Te9vQv 0MGwgz7lq3pto= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc; s= fm1; bh=1WJxFes6qCeE2SEUWYxFgDeT8yPJTnixP/FPXmUHqww=; b=al9aSeZh cMCOAOGsP4uniVlE7Q/p9HBtT//S6aNm7spm8+bGL3E+i83fIOrt8qPcXNz7FsEc kolWScVLoyFO9M3KkYj2QpSOkdjrY/cIi1T0/ax6OfYMoWn9IKnfZcIhi3xUppZy H9Sue/kTqwaNzO0g/8NZVkJeVsdlNP7lpric/OTkwALEa5wlOKOrKvyjwqSjWKbG MLesdK08YTGzfT/OgW8fIhgu1dA85xpCPKqVse4yzKuRSwQEPRTkm/Nu19elOR8N rsPpGCHRXxRRHyhoWjEzYIzQ/BzCDH0Bv6nGoMbS6tPiUBcZp9ytXWLHaxnR0XYh AS5/Le0L2mKwCA== X-ME-Sender: From: "Emilio G. Cota" To: qemu-devel@nongnu.org Date: Fri, 10 Nov 2017 14:53:46 -0500 Message-Id: <1510343626-25861-6-git-send-email-cota@braap.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1510343626-25861-1-git-send-email-cota@braap.org> References: <1510343626-25861-1-git-send-email-cota@braap.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.111.4.28 Subject: [Qemu-devel] [PATCH for 2.11 5/5] hw: add .min_cpus and .default_cpus fields to machine_class X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Thomas Huth , Eduardo Habkost , Igor Mitsyanko , Richard Henderson , Alistair Francis , qemu-arm@nongnu.org, Marcel Apfelbaum , "Edgar E . Iglesias" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_6 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" max_cpus needs to be an upper bound on the number of vCPUs initialized; otherwise TCG region initialization breaks. Some boards initialize a hard-coded number of vCPUs, which is not captured by the global max_cpus and therefore breaks TCG initialization. Fix it by adding the .min_cpus field to machine_class. This commit also changes some user-facing behaviour: we now die if -smp is below this hard-coded vCPU minimum instead of silently ignoring the passed -smp value (sometimes announcing this by printing a warning). However, the introduction of .default_cpus lessens the likelihood that users will notice this: if -smp isn't set, we now assign the value in .default_cpus to both smp_cpus and max_cpus. IOW, if a user does not set -smp, they always get a correct number of vCPUs. This change fixes 3468b59 ("tcg: enable multiple TCG contexts in softmmu", 2017-10-24), which broke TCG initialization for some ARM boards. Fixes: 3468b59e18b179bc63c7ce934de912dfa9596122 Reported-by: Thomas Huth Suggested-by: Peter Maydell Signed-off-by: Emilio G. Cota Reviewed-by: Alistair Francis Reviewed-by: Eduardo Habkost --- include/hw/boards.h | 5 +++++ hw/arm/exynos4_boards.c | 12 ++++-------- hw/arm/raspi.c | 2 ++ hw/arm/xlnx-zcu102.c | 2 ++ vl.c | 21 ++++++++++++++++++--- 5 files changed, 31 insertions(+), 11 deletions(-) diff --git a/include/hw/boards.h b/include/hw/boards.h index 191a5b3..62f160e 100644 --- a/include/hw/boards.h +++ b/include/hw/boards.h @@ -102,6 +102,9 @@ typedef struct { =20 /** * MachineClass: + * @max_cpus: maximum number of CPUs supported. Default: 1 + * @min_cpus: minimum number of CPUs supported. Default: 1 + * @default_cpus: number of CPUs instantiated if none are specified. Defau= lt: 1 * @get_hotplug_handler: this function is called during bus-less * device hotplug. If defined it returns pointer to an instance * of HotplugHandler object, which handles hotplug operation @@ -167,6 +170,8 @@ struct MachineClass { BlockInterfaceType block_default_type; int units_per_default_bus; int max_cpus; + int min_cpus; + int default_cpus; unsigned int no_serial:1, no_parallel:1, use_virtcon:1, diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c index f1441ec..750162c 100644 --- a/hw/arm/exynos4_boards.c +++ b/hw/arm/exynos4_boards.c @@ -27,7 +27,6 @@ #include "qemu-common.h" #include "cpu.h" #include "sysemu/sysemu.h" -#include "sysemu/qtest.h" #include "hw/sysbus.h" #include "net/net.h" #include "hw/arm/arm.h" @@ -129,13 +128,6 @@ exynos4_boards_init_common(MachineState *machine, Exynos4BoardType board_type) { Exynos4BoardState *s =3D g_new(Exynos4BoardState, 1); - MachineClass *mc =3D MACHINE_GET_CLASS(machine); - - if (smp_cpus !=3D EXYNOS4210_NCPUS && !qtest_enabled()) { - error_report("%s board supports only %d CPU cores, ignoring smp_cp= us" - " value", - mc->name, EXYNOS4210_NCPUS); - } =20 exynos4_board_binfo.ram_size =3D exynos4_board_ram_size[board_type]; exynos4_board_binfo.board_id =3D exynos4_board_id[board_type]; @@ -189,6 +181,8 @@ static void nuri_class_init(ObjectClass *oc, void *data) mc->desc =3D "Samsung NURI board (Exynos4210)"; mc->init =3D nuri_init; mc->max_cpus =3D EXYNOS4210_NCPUS; + mc->min_cpus =3D EXYNOS4210_NCPUS; + mc->default_cpus =3D EXYNOS4210_NCPUS; mc->ignore_memory_transaction_failures =3D true; } =20 @@ -205,6 +199,8 @@ static void smdkc210_class_init(ObjectClass *oc, void *= data) mc->desc =3D "Samsung SMDKC210 board (Exynos4210)"; mc->init =3D smdkc210_init; mc->max_cpus =3D EXYNOS4210_NCPUS; + mc->min_cpus =3D EXYNOS4210_NCPUS; + mc->default_cpus =3D EXYNOS4210_NCPUS; mc->ignore_memory_transaction_failures =3D true; } =20 diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c index 5941c9f..cd5fa8c 100644 --- a/hw/arm/raspi.c +++ b/hw/arm/raspi.c @@ -167,6 +167,8 @@ static void raspi2_machine_init(MachineClass *mc) mc->no_floppy =3D 1; mc->no_cdrom =3D 1; mc->max_cpus =3D BCM2836_NCPUS; + mc->min_cpus =3D BCM2836_NCPUS; + mc->default_cpus =3D BCM2836_NCPUS; mc->default_ram_size =3D 1024 * 1024 * 1024; mc->ignore_memory_transaction_failures =3D true; }; diff --git a/hw/arm/xlnx-zcu102.c b/hw/arm/xlnx-zcu102.c index 190eb69..9631a53 100644 --- a/hw/arm/xlnx-zcu102.c +++ b/hw/arm/xlnx-zcu102.c @@ -189,6 +189,7 @@ static void xlnx_ep108_machine_class_init(ObjectClass *= oc, void *data) mc->units_per_default_bus =3D 1; mc->ignore_memory_transaction_failures =3D true; mc->max_cpus =3D XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS; + mc->default_cpus =3D XLNX_ZYNQMP_NUM_APU_CPUS; } =20 static const TypeInfo xlnx_ep108_machine_init_typeinfo =3D { @@ -246,6 +247,7 @@ static void xlnx_zcu102_machine_class_init(ObjectClass = *oc, void *data) mc->units_per_default_bus =3D 1; mc->ignore_memory_transaction_failures =3D true; mc->max_cpus =3D XLNX_ZYNQMP_NUM_APU_CPUS + XLNX_ZYNQMP_NUM_RPU_CPUS; + mc->default_cpus =3D XLNX_ZYNQMP_NUM_APU_CPUS; } =20 static const TypeInfo xlnx_zcu102_machine_init_typeinfo =3D { diff --git a/vl.c b/vl.c index ec29909..7372424 100644 --- a/vl.c +++ b/vl.c @@ -160,8 +160,8 @@ Chardev *virtcon_hds[MAX_VIRTIO_CONSOLES]; Chardev *sclp_hds[MAX_SCLP_CONSOLES]; int win2k_install_hack =3D 0; int singlestep =3D 0; -int smp_cpus =3D 1; -unsigned int max_cpus =3D 1; +int smp_cpus; +unsigned int max_cpus; int smp_cores =3D 1; int smp_threads =3D 1; int acpi_enabled =3D 1; @@ -4327,9 +4327,24 @@ int main(int argc, char **argv, char **envp) exit(0); } =20 + /* machine_class: default to UP */ + machine_class->max_cpus =3D machine_class->max_cpus ?: 1; + machine_class->min_cpus =3D machine_class->min_cpus ?: 1; + machine_class->default_cpus =3D machine_class->default_cpus ?: 1; + + /* default to machine_class->default_cpus */ + smp_cpus =3D machine_class->default_cpus; + max_cpus =3D machine_class->default_cpus; + smp_parse(qemu_opts_find(qemu_find_opts("smp-opts"), NULL)); =20 - machine_class->max_cpus =3D machine_class->max_cpus ?: 1; /* Default t= o UP */ + /* sanity-check smp_cpus and max_cpus against machine_class */ + if (smp_cpus < machine_class->min_cpus) { + error_report("Invalid SMP CPUs %d. The min CPUs " + "supported by machine '%s' is %d", smp_cpus, + machine_class->name, machine_class->min_cpus); + exit(1); + } if (max_cpus > machine_class->max_cpus) { error_report("Invalid SMP CPUs %d. The max CPUs " "supported by machine '%s' is %d", max_cpus, --=20 2.7.4