hw/s390x/s390-pci-bus.h | 1 + hw/s390x/s390-pci-inst.c | 250 ++++++++++++++++++++++++++++------------------- hw/s390x/s390-pci-inst.h | 2 +- 3 files changed, 153 insertions(+), 100 deletions(-)
Right now the PCI support is very limited (e.g. pass through of a host vfio device) To enable features like virtio-pci several modifications needs to be done. Virtio-PCI uses subregions, which may eventually be discontinuous inside bars instead of a single flat region. The address offset being formerly calculated from the BAR base address must be adapted to the subregions instead of to the single region. This patch provides the new calculation for the three kind of BAR access, zPCI STORE, zPCI LOAD and zPCI STORE BLOCK. We use the opportunity to - enhance the fault detection for zPCI STORE and LOAD, - enhance the fault detection and to provide the maximum STORE BLOCK block size, maxstbl, for zPCI STORE BLOCK - factor out part of the code used to calculate the offset and access the BARs, - factor out the code for endianess conversion. Pierre Morel (7): s390x/pci: factor out endianess conversion s390x/pci: rework PCI STORE s390x/pci: rework PCI LOAD s390x/pci: rework PCI STORE BLOCK s390x/pci: move the memory region read from pcilg s390x/pci: move the memory region write from pcistg s390x/pci: search for subregion inside the BARs hw/s390x/s390-pci-bus.h | 1 + hw/s390x/s390-pci-inst.c | 250 ++++++++++++++++++++++++++++------------------- hw/s390x/s390-pci-inst.h | 2 +- 3 files changed, 153 insertions(+), 100 deletions(-) -- 2.7.4
On Tue, 7 Nov 2017 18:24:32 +0100 Pierre Morel <pmorel@linux.vnet.ibm.com> wrote: > Right now the PCI support is very limited (e.g. pass through of a > host vfio device) > To enable features like virtio-pci several modifications needs to be > done. > > Virtio-PCI uses subregions, which may eventually be discontinuous > inside bars instead of a single flat region. > The address offset being formerly calculated from the BAR base address > must be adapted to the subregions instead of to the single region. > > This patch provides the new calculation for the three kind of BAR > access, zPCI STORE, zPCI LOAD and zPCI STORE BLOCK. > > We use the opportunity to > - enhance the fault detection for zPCI STORE and LOAD, > - enhance the fault detection and to provide the maximum STORE BLOCK > block size, maxstbl, for zPCI STORE BLOCK > - factor out part of the code used to calculate the offset and > access the BARs, > - factor out the code for endianess conversion. Will look at this later. Just a quick question: What kind of further functionality is enabled by this? E.g., I can attach a virtio-net-pci device right now, does this enable more virtio devices? > > > Pierre Morel (7): > s390x/pci: factor out endianess conversion > s390x/pci: rework PCI STORE > s390x/pci: rework PCI LOAD > s390x/pci: rework PCI STORE BLOCK > s390x/pci: move the memory region read from pcilg > s390x/pci: move the memory region write from pcistg > s390x/pci: search for subregion inside the BARs > > hw/s390x/s390-pci-bus.h | 1 + > hw/s390x/s390-pci-inst.c | 250 ++++++++++++++++++++++++++++------------------- > hw/s390x/s390-pci-inst.h | 2 +- > 3 files changed, 153 insertions(+), 100 deletions(-) >
On 11/07/2017 06:31 PM, Cornelia Huck wrote: > On Tue, 7 Nov 2017 18:24:32 +0100 > Pierre Morel <pmorel@linux.vnet.ibm.com> wrote: > >> Right now the PCI support is very limited (e.g. pass through of a >> host vfio device) >> To enable features like virtio-pci several modifications needs to be >> done. >> >> Virtio-PCI uses subregions, which may eventually be discontinuous >> inside bars instead of a single flat region. >> The address offset being formerly calculated from the BAR base address >> must be adapted to the subregions instead of to the single region. >> >> This patch provides the new calculation for the three kind of BAR >> access, zPCI STORE, zPCI LOAD and zPCI STORE BLOCK. >> >> We use the opportunity to >> - enhance the fault detection for zPCI STORE and LOAD, >> - enhance the fault detection and to provide the maximum STORE BLOCK >> block size, maxstbl, for zPCI STORE BLOCK >> - factor out part of the code used to calculate the offset and >> access the BARs, >> - factor out the code for endianess conversion. > > Will look at this later. Just a quick question: What kind of further > functionality is enabled by this? E.g., I can attach a virtio-net-pci > device right now, does this enable more virtio devices? You can attach a virtio-net-pci today, with these patches it now starts to work ;-) In essence to me this all looks like a bugfix (a big one though) > >> >> >> Pierre Morel (7): >> s390x/pci: factor out endianess conversion >> s390x/pci: rework PCI STORE >> s390x/pci: rework PCI LOAD >> s390x/pci: rework PCI STORE BLOCK >> s390x/pci: move the memory region read from pcilg >> s390x/pci: move the memory region write from pcistg >> s390x/pci: search for subregion inside the BARs >> >> hw/s390x/s390-pci-bus.h | 1 + >> hw/s390x/s390-pci-inst.c | 250 ++++++++++++++++++++++++++++------------------- >> hw/s390x/s390-pci-inst.h | 2 +- >> 3 files changed, 153 insertions(+), 100 deletions(-) >> >
On Tue, 7 Nov 2017 18:50:10 +0100 Christian Borntraeger <borntraeger@de.ibm.com> wrote: > On 11/07/2017 06:31 PM, Cornelia Huck wrote: > > On Tue, 7 Nov 2017 18:24:32 +0100 > > Pierre Morel <pmorel@linux.vnet.ibm.com> wrote: > > > >> Right now the PCI support is very limited (e.g. pass through of a > >> host vfio device) > >> To enable features like virtio-pci several modifications needs to be > >> done. > >> > >> Virtio-PCI uses subregions, which may eventually be discontinuous > >> inside bars instead of a single flat region. > >> The address offset being formerly calculated from the BAR base address > >> must be adapted to the subregions instead of to the single region. > >> > >> This patch provides the new calculation for the three kind of BAR > >> access, zPCI STORE, zPCI LOAD and zPCI STORE BLOCK. > >> > >> We use the opportunity to > >> - enhance the fault detection for zPCI STORE and LOAD, > >> - enhance the fault detection and to provide the maximum STORE BLOCK > >> block size, maxstbl, for zPCI STORE BLOCK > >> - factor out part of the code used to calculate the offset and > >> access the BARs, > >> - factor out the code for endianess conversion. > > > > Will look at this later. Just a quick question: What kind of further > > functionality is enabled by this? E.g., I can attach a virtio-net-pci > > device right now, does this enable more virtio devices? > > You can attach a virtio-net-pci today, with these patches it now starts to work ;-) Yes, that's definitely an improvement ;) > In essence to me this all looks like a bugfix (a big one though) I'll look at it, but it probably is too big for 2.11. > > > > >> > >> > >> Pierre Morel (7): > >> s390x/pci: factor out endianess conversion > >> s390x/pci: rework PCI STORE > >> s390x/pci: rework PCI LOAD > >> s390x/pci: rework PCI STORE BLOCK > >> s390x/pci: move the memory region read from pcilg > >> s390x/pci: move the memory region write from pcistg > >> s390x/pci: search for subregion inside the BARs > >> > >> hw/s390x/s390-pci-bus.h | 1 + > >> hw/s390x/s390-pci-inst.c | 250 ++++++++++++++++++++++++++++------------------- > >> hw/s390x/s390-pci-inst.h | 2 +- > >> 3 files changed, 153 insertions(+), 100 deletions(-) > >> > > >
On Tue, 7 Nov 2017 18:24:32 +0100 Pierre Morel <pmorel@linux.vnet.ibm.com> wrote: > Right now the PCI support is very limited (e.g. pass through of a > host vfio device) > To enable features like virtio-pci several modifications needs to be > done. > > Virtio-PCI uses subregions, which may eventually be discontinuous > inside bars instead of a single flat region. > The address offset being formerly calculated from the BAR base address > must be adapted to the subregions instead of to the single region. > > This patch provides the new calculation for the three kind of BAR > access, zPCI STORE, zPCI LOAD and zPCI STORE BLOCK. > > We use the opportunity to > - enhance the fault detection for zPCI STORE and LOAD, > - enhance the fault detection and to provide the maximum STORE BLOCK > block size, maxstbl, for zPCI STORE BLOCK > - factor out part of the code used to calculate the offset and > access the BARs, > - factor out the code for endianess conversion. > > > Pierre Morel (7): > s390x/pci: factor out endianess conversion > s390x/pci: rework PCI STORE > s390x/pci: rework PCI LOAD > s390x/pci: rework PCI STORE BLOCK > s390x/pci: move the memory region read from pcilg > s390x/pci: move the memory region write from pcistg > s390x/pci: search for subregion inside the BARs > > hw/s390x/s390-pci-bus.h | 1 + > hw/s390x/s390-pci-inst.c | 250 ++++++++++++++++++++++++++++------------------- > hw/s390x/s390-pci-inst.h | 2 +- > 3 files changed, 153 insertions(+), 100 deletions(-) > I assume you'll send a v2? I'll see if I can find some time to wire up pci in tcg (as this would get us additional test coverage, especially regarding endianness), but I won't complain should someone beat me to it.
On 13/11/2017 18:13, Cornelia Huck wrote: > On Tue, 7 Nov 2017 18:24:32 +0100 > Pierre Morel <pmorel@linux.vnet.ibm.com> wrote: > >> Right now the PCI support is very limited (e.g. pass through of a >> host vfio device) >> To enable features like virtio-pci several modifications needs to be >> done. >> >> Virtio-PCI uses subregions, which may eventually be discontinuous >> inside bars instead of a single flat region. >> The address offset being formerly calculated from the BAR base address >> must be adapted to the subregions instead of to the single region. >> >> This patch provides the new calculation for the three kind of BAR >> access, zPCI STORE, zPCI LOAD and zPCI STORE BLOCK. >> >> We use the opportunity to >> - enhance the fault detection for zPCI STORE and LOAD, >> - enhance the fault detection and to provide the maximum STORE BLOCK >> block size, maxstbl, for zPCI STORE BLOCK >> - factor out part of the code used to calculate the offset and >> access the BARs, >> - factor out the code for endianess conversion. >> >> >> Pierre Morel (7): >> s390x/pci: factor out endianess conversion >> s390x/pci: rework PCI STORE >> s390x/pci: rework PCI LOAD >> s390x/pci: rework PCI STORE BLOCK >> s390x/pci: move the memory region read from pcilg >> s390x/pci: move the memory region write from pcistg >> s390x/pci: search for subregion inside the BARs >> >> hw/s390x/s390-pci-bus.h | 1 + >> hw/s390x/s390-pci-inst.c | 250 ++++++++++++++++++++++++++++------------------- >> hw/s390x/s390-pci-inst.h | 2 +- >> 3 files changed, 153 insertions(+), 100 deletions(-) >> > > I assume you'll send a v2? Yes, I have a lot of mater to do this now. Thanks for reviewing, Pierre > > I'll see if I can find some time to wire up pci in tcg (as this would > get us additional test coverage, especially regarding endianness), but > I won't complain should someone beat me to it. > Yes, would be fine to have it to increase test coverage. -- Pierre Morel Linux/KVM/QEMU in Böblingen - Germany
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