From nobody Mon Feb 9 11:51:29 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1509993443232785.72001925044; Mon, 6 Nov 2017 10:37:23 -0800 (PST) Received: from localhost ([::1]:49667 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eBmGt-0005Fj-G3 for importer@patchew.org; Mon, 06 Nov 2017 13:37:19 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:35941) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eBmCm-0002Ad-H2 for qemu-devel@nongnu.org; Mon, 06 Nov 2017 13:33:05 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eBmCl-0000p5-Es for qemu-devel@nongnu.org; Mon, 06 Nov 2017 13:33:04 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:38186) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eBmCl-0000ky-8L for qemu-devel@nongnu.org; Mon, 06 Nov 2017 13:33:03 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1eBmCc-00038l-TL; Mon, 06 Nov 2017 18:32:54 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Mon, 6 Nov 2017 18:33:25 +0000 Message-Id: <1509993206-26637-4-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1509993206-26637-1-git-send-email-peter.maydell@linaro.org> References: <1509993206-26637-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH 3/4] linux-user/sparc: Put address for data faults where linux-user expects it X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Riku Voipio , Laurent Vivier , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" In the user-mode-only version of sparc_cpu_handle_mmu_fault(), we must save the fault address for a data fault into the CPU state's mmu registers, because the code in linux-user/main.c expects to find it there in order to populate the si_addr field of the guest siginfo. Signed-off-by: Peter Maydell Reviewed-by: Laurent Vivier Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson --- target/sparc/mmu_helper.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c index 126ea5e..d5b6c1e 100644 --- a/target/sparc/mmu_helper.c +++ b/target/sparc/mmu_helper.c @@ -30,10 +30,18 @@ int sparc_cpu_handle_mmu_fault(CPUState *cs, vaddr address, int rw, int mmu_idx) { + SPARCCPU *cpu =3D SPARC_CPU(cs); + CPUSPARCState *env =3D &cpu->env; + if (rw & 2) { cs->exception_index =3D TT_TFAULT; } else { cs->exception_index =3D TT_DFAULT; +#ifdef TARGET_SPARC64 + env->dmmu.mmuregs[4] =3D address; +#else + env->mmuregs[4] =3D address; +#endif } return 1; } --=20 2.7.4