From nobody Sat Nov 1 07:50:17 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1509640581615193.4701981217845; Thu, 2 Nov 2017 09:36:21 -0700 (PDT) Received: from localhost ([::1]:33106 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eAITN-0003JJ-Nn for importer@patchew.org; Thu, 02 Nov 2017 12:36:05 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44249) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eAISW-0002wZ-3h for qemu-devel@nongnu.org; Thu, 02 Nov 2017 12:35:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eAISV-0008Pn-6F for qemu-devel@nongnu.org; Thu, 02 Nov 2017 12:35:12 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:38130) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eAISU-0008Ks-Uw for qemu-devel@nongnu.org; Thu, 02 Nov 2017 12:35:11 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1eAISR-00034I-CF; Thu, 02 Nov 2017 16:35:07 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Thu, 2 Nov 2017 16:35:36 +0000 Message-Id: <1509640536-32160-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH v2] cpu-exec: Exit exclusive region on longjmp from step_atomic X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Emilio G . Cota" , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Commit ac03ee5331612e44be narrowed the scope of the exclusive region so it only covers when we're executing the TB, not when we're generating it. However it missed that there is more than one execution path out of cpu_tb_exec -- if the atomic insn causes an exception then the code will longjmp out, skipping the code to end the exclusive region. This causes QEMU to hang the next time the CPU calls start_exclusive(), waiting for itself to exit the region. Move the "end the region" code out to the end of the function so that it is run for both normal exit and also for exit-via-longjmp. We have to use a volatile bool flag to decide whether we need to end the region, because we can longjump out of the codegen as well as the execution. (For some reason this only reproduces for me with a clang optimized build, not a gcc debug build.) Fixes: ac03ee5331612e44beb393df2b578c951d27dc0d Signed-off-by: Peter Maydell Reviewed-by: Alex Benn=C3=A9e Reviewed-by: Emilio G. Cota Reviewed-by: Richard Henderson --- Changes v1->v2: use a flag so we get the "longjump out of the codegen" case right. accel/tcg/cpu-exec.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 4318441..61297f8 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -233,6 +233,8 @@ void cpu_exec_step_atomic(CPUState *cpu) uint32_t flags; uint32_t cflags =3D 1; uint32_t cf_mask =3D cflags & CF_HASH_MASK; + /* volatile because we modify it between setjmp and longjmp */ + volatile bool in_exclusive_region =3D false; =20 if (sigsetjmp(cpu->jmp_env, 0) =3D=3D 0) { tb =3D tb_lookup__cpu_state(cpu, &pc, &cs_base, &flags, cf_mask); @@ -251,14 +253,12 @@ void cpu_exec_step_atomic(CPUState *cpu) =20 /* Since we got here, we know that parallel_cpus must be true. */ parallel_cpus =3D false; + in_exclusive_region =3D true; cc->cpu_exec_enter(cpu); /* execute the generated code */ trace_exec_tb(tb, pc); cpu_tb_exec(cpu, tb); cc->cpu_exec_exit(cpu); - parallel_cpus =3D true; - - end_exclusive(); } else { /* We may have exited due to another problem here, so we need * to reset any tb_locks we may have taken but didn't release. @@ -270,6 +270,15 @@ void cpu_exec_step_atomic(CPUState *cpu) #endif tb_lock_reset(); } + + if (in_exclusive_region) { + /* We might longjump out of either the codegen or the + * execution, so must make sure we only end the exclusive + * region if we started it. + */ + parallel_cpus =3D true; + end_exclusive(); + } } =20 struct tb_desc { --=20 2.7.4