From nobody Sat Nov 1 22:24:07 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1509253267921755.1424017219405; Sat, 28 Oct 2017 22:01:07 -0700 (PDT) Received: from localhost ([::1]:34825 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e8fiK-0000Zb-3A for importer@patchew.org; Sun, 29 Oct 2017 01:00:48 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42974) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e8fhI-00008c-Uq for qemu-devel@nongnu.org; Sun, 29 Oct 2017 00:59:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e8fhF-0006VR-TX for qemu-devel@nongnu.org; Sun, 29 Oct 2017 00:59:45 -0400 Received: from mail-pg0-x241.google.com ([2607:f8b0:400e:c05::241]:53425) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1e8fhF-0006Ts-Nj; Sun, 29 Oct 2017 00:59:41 -0400 Received: by mail-pg0-x241.google.com with SMTP id s2so8440131pge.10; Sat, 28 Oct 2017 21:59:40 -0700 (PDT) Received: from localhost.localdomain ([183.82.194.3]) by smtp.gmail.com with ESMTPSA id d12sm24454508pfl.140.2017.10.28.21.59.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 28 Oct 2017 21:59:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=Rw/J51EpNgbnjj8ILG+OSVqh4GzL55aurVoCB+ygXOg=; b=WmcrvIUETM//5bWJ3xw1NhTfJYQB+8rZFM8R0YZuj2LjBk0QxfB2YXDplHw0wL/Ei5 j0S4arSmZ8TKCH3ExYwQTNp7ssm9OhLExfXIrrGvFMSvInHDcCUyGLKHo/qKx+U7tPdv vRrpOSgZRdQV2JDV3YgMtFgQvytGJTOPxNrdChklocrcTr7EEc3BTAbxEv4G32eRQnbz Ij/59ZYthEjkqky8DGZJyDYNI2dwqNRX4tdxihaLujlIl4/9Yv2osssU4n1YwVzb7y1p sk3AInU+eeKHjCEyBbJG2VsBf4oi0LiVnoEFg+bvX7G1qtuVtn8yyoGf7KhZrDoxD+bD 2VIA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Rw/J51EpNgbnjj8ILG+OSVqh4GzL55aurVoCB+ygXOg=; b=pqURnYgmtjoTo/BjBcmGOi4BgXw9TCh+Mut233BNP4tJKXY54LoAmpWc5VUr0YK8aD zaUyIHEeeatsWFxbxz6YTkYryl22yxEzCXKFjA3r1NLwtp5wzYPekpHN7OsNSX9aO5G0 gT1HcuRPzR+XsNbPYsNFb9JC6yBGu6q6kdYrYyL7WiS2h9DA3AyvV9DpVJoY0fK6j+0H XLtplvQ90y9uhcVNx5lBGWg7b9FyIqzBc5OU2Eii+y/B4GpnFBFRwKA7gZgxF2SQkoY3 mUB1T4s8i5ttlewsxXqBx5gh62/7+qETrhX9roxQ7F/qpAHynXkYO8VU7P9iWYwwt2FG m4VQ== X-Gm-Message-State: AMCzsaUwTLoWvDIkdzM2ngfAqH/kO2KIm9nA5ICavXm3spnYUd93Vqqo XleLzOwfYxH8hM3GlcrTNUe/mg== X-Google-Smtp-Source: ABhQp+S7T+bLbi8HFXoI8yu7p0kYBo/p1JOAR7HQKaVpt6Cb1TzE7jkY6qq7T5W1F7s3rM77fJhJNQ== X-Received: by 10.98.75.77 with SMTP id y74mr5038216pfa.78.1509253178956; Sat, 28 Oct 2017 21:59:38 -0700 (PDT) From: Subbaraya Sundeep To: qemu-devel@nongnu.org, qemu-arm@nongnu.org Date: Sun, 29 Oct 2017 10:29:25 +0530 Message-Id: <1509253165-7434-1-git-send-email-sundeep.lkml@gmail.com> X-Mailer: git-send-email 2.5.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::241 Subject: [Qemu-devel] [Qemu devel PATCH] msf2: Wire up SYSRESETREQ in SoC for system reset X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, Subbaraya Sundeep , f4bug@amsat.org, alistair23@gmail.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Implemented system reset by creating SYSRESETREQ gpio out from nvic. Signed-off-by: Subbaraya Sundeep --- hw/arm/msf2-soc.c | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/hw/arm/msf2-soc.c b/hw/arm/msf2-soc.c index 6f97fa9..a8ec2cd 100644 --- a/hw/arm/msf2-soc.c +++ b/hw/arm/msf2-soc.c @@ -57,6 +57,13 @@ static const int spi_irq[MSF2_NUM_SPIS] =3D { 2, 3 }; static const int uart_irq[MSF2_NUM_UARTS] =3D { 10, 11 }; static const int timer_irq[MSF2_NUM_TIMERS] =3D { 14, 15 }; =20 +static void do_sys_reset(void *opaque, int n, int level) +{ + if (level) { + qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); + } +} + static void m2sxxx_soc_initfn(Object *obj) { MSF2State *s =3D MSF2_SOC(obj); @@ -125,6 +132,10 @@ static void m2sxxx_soc_realize(DeviceState *dev_soc, E= rror **errp) error_append_hint(errp, "m3clk can not be zero\n"); return; } + + qdev_connect_gpio_out_named(DEVICE(&s->armv7m.nvic), "SYSRESETREQ", 0, + qemu_allocate_irq(&do_sys_reset, NULL, 0)); + system_clock_scale =3D NANOSECONDS_PER_SECOND / s->m3clk; =20 for (i =3D 0; i < MSF2_NUM_UARTS; i++) { --=20 2.5.0