From nobody Sun Nov 2 11:51:20 2025 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1509029118884390.74744193078925; Thu, 26 Oct 2017 07:45:18 -0700 (PDT) Received: from localhost ([::1]:53321 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e7jP4-0003ur-R6 for importer@patchew.org; Thu, 26 Oct 2017 10:45:02 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56005) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e7jIw-0007H7-Mj for qemu-devel@nongnu.org; Thu, 26 Oct 2017 10:38:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e7jIv-0007hO-5U for qemu-devel@nongnu.org; Thu, 26 Oct 2017 10:38:42 -0400 Received: from mail-qt0-x241.google.com ([2607:f8b0:400d:c0d::241]:48600) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1e7jIu-0007gj-Vx; Thu, 26 Oct 2017 10:38:41 -0400 Received: by mail-qt0-x241.google.com with SMTP id f8so4553334qta.5; Thu, 26 Oct 2017 07:38:40 -0700 (PDT) Received: from localhost.localdomain ([208.94.106.99]) by smtp.googlemail.com with ESMTPSA id l126sm3352746qkf.96.2017.10.26.07.38.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 26 Oct 2017 07:38:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=iHZw5ye4lART7xddlG02EZ0nzbNioPMwYRvI4PGB+C8=; b=Hs50EryLzGlqgbdwiO4I/8MGlUzfEBoVROvO96jzdaxmZqI15mJ0+pOWClXedCSK3b fqUgFlg/M/fEGTQ9k9qAvrilzbxUIIbysqZc2yySjkzkcud1E6SYvvYOpKZo5gdzUOlo oUWmx25B88SPzrxUcarHbvDpOB7diDFln26Gmjrc83VKPKw8yoHFpbBx+SnhhPzvAsnL jWtEDHAkN7jGLjCy0H7VQAHmwttNEdWc5eEbSqnMS4godWyPj0uBNCQ0XPUmqi4j/mHa wd5QvrwrHSeINy/BEodCrpNYw/UowrHMYY52+45e4NdQ1NzI5QGEF+fRqkf2p+d7nYR9 REOA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=iHZw5ye4lART7xddlG02EZ0nzbNioPMwYRvI4PGB+C8=; b=m7g52u0xvE0I65arX2GnmkQ8YT6EU1Z4WJJo7vpt4Wr8B9R3aaSkqxKLu+vJkBS1Au /qNw6GV74AUeAa15dVrzul41HTRaTy9pgNZgDFVih281GXVb087fI8/h8oQXlJJCfqM0 1RC0JN9HSqPz4kCvnC8jlndPbhyzBjWn62h011506K+UTVoEizW4uVpsV2n4R7F+SElD MZ4A7qro25zw+C93jEJTkIHGS7ixPWJxv44UtaoJ354SgDFg6aOqUorbG0FToYzs5gaR nHMGgVhNmkzPch6AepFiNkUKHGDSJuxlAduZkx/p5C3raJqS5+TYCsPRu0mKY5VYYWpP azXg== X-Gm-Message-State: AMCzsaWK+jsIvI11qYQ5feFYvdYlhWM10MC7GteNMw/G/ytXm/i3BSuy 0BXB0OTFmBGC6EeINsVP5sKES/zB X-Google-Smtp-Source: ABhQp+RNwEr1tK0SJCVEf07Zs7NXG+O7GE9cJwKzJ73wkFhziltGl0I4el9eahSfEellZjJbKSPL3g== X-Received: by 10.200.46.22 with SMTP id r22mr34272342qta.63.1509028720106; Thu, 26 Oct 2017 07:38:40 -0700 (PDT) From: Gabriel Costa X-Google-Original-From: Gabriel Costa To: qemu-devel@nongnu.org Date: Thu, 26 Oct 2017 06:34:10 -0400 Message-Id: <1509014053-28134-4-git-send-email-costa@advantech.ca> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1509014053-28134-1-git-send-email-costa@advantech.ca> References: <1509014053-28134-1-git-send-email-costa@advantech.ca> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::241 Subject: [Qemu-devel] [PATCH v5 3/5]arm: kinetis_k64_system X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, f4bug@amsat.org, Gabriel Augusto Costa Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_6 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Gabriel Augusto Costa This Patch include kinetis_k64_system.c and .h sim means System Integration Module (SIM) More information about this peripheral can be found at: pag 291, K64P144M120SF5RM.pdf. Signed-off-by: Gabriel Augusto Costa --- hw/misc/kinetis_k64_system.c | 274 +++++++++++++++++++++++++++++++= ++++ include/hw/misc/kinetis_k64_system.h | 52 +++++++ 2 files changed, 326 insertions(+) create mode 100644 hw/misc/kinetis_k64_system.c create mode 100644 include/hw/misc/kinetis_k64_system.h diff --git a/hw/misc/kinetis_k64_system.c b/hw/misc/kinetis_k64_system.c new file mode 100644 index 0000000..6421153 --- /dev/null +++ b/hw/misc/kinetis_k64_system.c @@ -0,0 +1,274 @@ +/* + * Kinetis K64 peripheral microcontroller emulation. + * + * Copyright (c) 2017 Advantech Wireless + * Written by Gabriel Costa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 or + * (at your option) any later version. + */ + +#include "qemu/osdep.h" +#include "hw/sysbus.h" +#include "qemu/log.h" +#include "hw/misc/kinetis_k64_system.h" + +static const VMStateDescription vmstate_kinetis_k64_sim =3D { + .name =3D TYPE_KINETIS_K64_SIM, + .version_id =3D 1, + .minimum_version_id =3D 1, + .fields =3D (VMStateField[]) { + VMSTATE_UINT32(SOPT1, kinetis_k64_sim_state), + VMSTATE_UINT32(SOPT1CFG, kinetis_k64_sim_state), + VMSTATE_UINT32(SOPT2, kinetis_k64_sim_state), + VMSTATE_UINT32(SOPT4, kinetis_k64_sim_state), + VMSTATE_UINT32(SOPT5, kinetis_k64_sim_state), + VMSTATE_UINT32(SOPT7, kinetis_k64_sim_state), + VMSTATE_UINT32(SDID, kinetis_k64_sim_state), + VMSTATE_UINT32(SCGC1, kinetis_k64_sim_state), + VMSTATE_UINT32(SCGC2, kinetis_k64_sim_state), + VMSTATE_UINT32(SCGC3, kinetis_k64_sim_state), + VMSTATE_UINT32(SCGC4, kinetis_k64_sim_state), + VMSTATE_UINT32(SCGC5, kinetis_k64_sim_state), + VMSTATE_UINT32(SCGC6, kinetis_k64_sim_state), + VMSTATE_UINT32(SCGC7, kinetis_k64_sim_state), + VMSTATE_UINT32(CLKDIV1, kinetis_k64_sim_state), + VMSTATE_UINT32(CLKDIV2, kinetis_k64_sim_state), + VMSTATE_UINT32(FCFG1, kinetis_k64_sim_state), + VMSTATE_UINT32(FCFG2, kinetis_k64_sim_state), + VMSTATE_UINT32(UIDH, kinetis_k64_sim_state), + VMSTATE_UINT32(UIDMH, kinetis_k64_sim_state), + VMSTATE_UINT32(UIDML, kinetis_k64_sim_state), + VMSTATE_UINT32(UIDL, kinetis_k64_sim_state), + VMSTATE_END_OF_LIST() + } +}; + +static void kinetis_k64_sim_reset(DeviceState *dev) +{ + kinetis_k64_sim_state *s =3D KINETIS_K64_SIM(dev); + + s->SOPT1 =3D 0x00008000; + s->SOPT1CFG =3D 0x00000000; + s->SOPT2 =3D 0x00001000; + s->SOPT4 =3D 0x00000000; + s->SOPT5 =3D 0x00000000; + s->SOPT7 =3D 0x00000000; + s->SDID =3D 0x00000000; + s->SCGC1 =3D 0x00000000; + s->SCGC2 =3D 0x00000000; + s->SCGC3 =3D 0x00000000; + s->SCGC4 =3D 0xF0100030; + s->SCGC5 =3D 0x00040182; + s->SCGC6 =3D 0x40000001; + s->SCGC7 =3D 0x00000006; + s->CLKDIV1 =3D 0x00000000; + s->CLKDIV2 =3D 0x00000000; + s->FCFG1 =3D 0xFF000000; + s->FCFG2 =3D 0x00000000; + s->UIDH =3D 0x00000000; + s->UIDMH =3D 0x00000000; + s->UIDML =3D 0x00000000; + s->UIDL =3D 0x00000000; +} + +static void kinetis_k64_sim_write(void *opaque, hwaddr offset, uint64_t va= lue, + unsigned size) +{ + kinetis_k64_sim_state *s =3D (kinetis_k64_sim_state *)opaque; + + value &=3D 0xFFFFFFFF; + + switch (offset) { + case 0x0000: + s->SOPT1 =3D value; + break; + case 0x0004: + s->SOPT1CFG =3D value; + break; + case 0x1004: + s->SOPT2 =3D value; + break; + case 0x100C: + s->SOPT4 =3D value; + break; + case 0x1010: + s->SOPT5 =3D value; + break; + case 0x1018: + s->SOPT7 =3D value; + break; + case 0x1024: + s->SDID =3D value; + break; + case 0x1028: + s->SCGC1 =3D value; + break; + case 0x102C: + s->SCGC2 =3D value; + break; + case 0x1030: + s->SCGC3 =3D value; + break; + case 0x1034: + s->SCGC4 =3D value; + break; + case 0x1013: + s->SCGC5 =3D value; + break; + case 0x103C: + s->SCGC6 =3D value; + break; + case 0x1040: + s->SCGC7 =3D value; + break; + case 0x1044: + s->CLKDIV1 =3D value; + break; + case 0x1048: + s->CLKDIV2 =3D value; + break; + case 0x104C: + s->FCFG1 =3D value; + break; + case 0x1050: + s->FCFG2 =3D value; + break; + case 0x1054: + s->UIDH =3D value; + break; + case 0x1058: + s->UIDMH =3D value; + break; + case 0x105C: + s->UIDML =3D value; + break; + case 0x1060: + s->UIDL =3D value; + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, + "kinetis_k64_sim: write at bad offset 0x%x\n", (int)offset= ); + } +} + +static uint64_t kinetis_k64_sim_read(void *opaque, hwaddr offset, unsigned= size) +{ + kinetis_k64_sim_state *s =3D (kinetis_k64_sim_state *)opaque; + uint32_t value; + + switch (offset) { + case 0x0000: + value =3D s->SOPT1; + break; + case 0x0004: + value =3D s->SOPT1CFG; + break; + case 0x1004: + value =3D s->SOPT2; + break; + case 0x100C: + value =3D s->SOPT4; + break; + case 0x1010: + value =3D s->SOPT5; + break; + case 0x1018: + value =3D s->SOPT7; + break; + case 0x1024: + value =3D s->SDID; + break; + case 0x1028: + value =3D s->SCGC1; + break; + case 0x102C: + value =3D s->SCGC2; + break; + case 0x1030: + value =3D s->SCGC3; + break; + case 0x1034: + value =3D s->SCGC4; + break; + case 0x1013: + value =3D s->SCGC5; + break; + case 0x103C: + value =3D s->SCGC6; + break; + case 0x1040: + value =3D s->SCGC7; + break; + case 0x1044: + value =3D s->CLKDIV1; + break; + case 0x1048: + value =3D s->CLKDIV2; + break; + case 0x104C: + value =3D s->FCFG1; + break; + case 0x1050: + value =3D s->FCFG2; + break; + case 0x1054: + value =3D s->UIDH; + break; + case 0x1058: + value =3D s->UIDMH; + break; + case 0x105C: + value =3D s->UIDML; + break; + case 0x1060: + value =3D s->UIDL; + break; + default: + qemu_log_mask(LOG_GUEST_ERROR, + "kinetis_k64_sim: read at bad offset 0x%x\n", (int)offset); + return 0; + } + return value; +} + +static const MemoryRegionOps kinetis_k64_sim_ops =3D { + .read =3D kinetis_k64_sim_read, + .write =3D kinetis_k64_sim_write, + .endianness =3D DEVICE_NATIVE_ENDIAN, +}; + +static void kinetis_k64_sim_init(Object *obj) +{ + kinetis_k64_sim_state *s =3D KINETIS_K64_SIM(obj); + SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj); + + memory_region_init_io(&s->iomem, obj, &kinetis_k64_sim_ops, s, + TYPE_KINETIS_K64_SIM, 0x2000); + sysbus_init_mmio(sbd, &s->iomem); +} + +static void kinetis_k64_sim_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->vmsd =3D &vmstate_kinetis_k64_sim; + dc->reset =3D kinetis_k64_sim_reset; + dc->desc =3D "Kinetis K64 series SIM"; +} + +static const TypeInfo kinetis_k64_sim_info =3D { + .name =3D TYPE_KINETIS_K64_SIM, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(kinetis_k64_sim_state), + .instance_init =3D kinetis_k64_sim_init, + .class_init =3D kinetis_k64_sim_class_init, +}; + +static void kinetis_k64_sim_register_types(void) +{ + type_register_static(&kinetis_k64_sim_info); +} + +type_init(kinetis_k64_sim_register_types) diff --git a/include/hw/misc/kinetis_k64_system.h b/include/hw/misc/kinetis= _k64_system.h new file mode 100644 index 0000000..8774eaa --- /dev/null +++ b/include/hw/misc/kinetis_k64_system.h @@ -0,0 +1,52 @@ +/* + * Kinetis K64 peripheral microcontroller emulation. + * + * Copyright (c) 2017 Advantech Wireless + * Written by Gabriel Costa + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 or + * (at your option) any later version. + */ + +#ifndef KINETIS_SYSTEM_H +#define KINETIS_SYSTEM_H + +#include "hw/sysbus.h" +#include "hw/hw.h" + +#define TYPE_KINETIS_K64_SIM "kinetis_k64_sim" +#define KINETIS_K64_SIM(obj) \ + OBJECT_CHECK(kinetis_k64_sim_state, (obj), TYPE_KINETIS_K64_SIM) + +typedef struct { + SysBusDevice parent_obj; + + MemoryRegion iomem; + + uint32_t SOPT1; + uint32_t SOPT1CFG; + uint32_t SOPT2; + uint32_t SOPT4; + uint32_t SOPT5; + uint32_t SOPT7; + uint32_t SDID; + uint32_t SCGC1; + uint32_t SCGC2; + uint32_t SCGC3; + uint32_t SCGC4; + uint32_t SCGC5; + uint32_t SCGC6; + uint32_t SCGC7; + uint32_t CLKDIV1; + uint32_t CLKDIV2; + uint32_t FCFG1; + uint32_t FCFG2; + uint32_t UIDH; + uint32_t UIDMH; + uint32_t UIDML; + uint32_t UIDL; + +} kinetis_k64_sim_state; + +#endif --=20 2.1.4