From nobody Mon Dec 15 22:04:05 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1508590865818173.55101980533084; Sat, 21 Oct 2017 06:01:05 -0700 (PDT) Received: from localhost ([::1]:57812 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e5tOQ-0000hx-1A for importer@patchew.org; Sat, 21 Oct 2017 09:00:46 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:38866) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e5ngC-0001Wy-Tp for qemu-devel@nongnu.org; Sat, 21 Oct 2017 02:54:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e5ngB-0000VD-Ul for qemu-devel@nongnu.org; Sat, 21 Oct 2017 02:54:44 -0400 Received: from mail-pf0-x242.google.com ([2607:f8b0:400e:c00::242]:50392) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1e5ng7-0000T7-8U; Sat, 21 Oct 2017 02:54:39 -0400 Received: by mail-pf0-x242.google.com with SMTP id b6so13620690pfh.7; Fri, 20 Oct 2017 23:54:37 -0700 (PDT) Received: from localhost.localdomain ([180.64.177.202]) by smtp.gmail.com with ESMTPSA id q70sm4972566pfj.39.2017.10.20.23.54.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 20 Oct 2017 23:54:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=Bm0/2bA/zWAkLvaOFy5lweMVXkhnylih73qeL+BhRzw=; b=AqhR9t4Nl1sHhNQnek3DxAk+VNjG4rZnNDSZoSHNHhTFnkvUrL6S61CpDWLbEUtVRK zBgKGeh+lbq1bHBBPIkoBzM0uL5yx17rosUSvcg48zjdISl4/Futyak7PgLNDIpLigI+ r6aF53Mont3ViCYjf2OxpPzYN5eAo9vJRDKLSjbm1z4xDaoGMyS7CHRTBuO3N9iUXF3F dfGPcR6j48natVxiJJGaiepwS+UvXdR7ZDKJQ63jVh+XnVgHZV3joB1WSvKtNLZwgF91 Xgj5UYTtXGiMJKXdTXgn9tg8eceNSe9wCNsRKYM/R0Y0f83YLpLlBTGL4sv2i0Hv2eHi Ww2w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=Bm0/2bA/zWAkLvaOFy5lweMVXkhnylih73qeL+BhRzw=; b=nfh2oDeiEANlcGHD9xFTcUyit7vDd+skaHdZ4D6WfxvHGiWd8zmNl6SBERQQVZfa6t pgw46b71qKwghfU0r9vi0N+FzsUHb270rcdyeE8egE50i/7qrra/WnPAWZOnFjMmE+oG gmWL4ICltgH3NP0SENDfj1u60Rwu0kWtEBOPU7MUoNmD4TXbxgnhjLQu+Vk/HIYSabnj i4Mtv4DiePpl1rdgme9mQSj0L0KW0MEqis4BmYfZeV/Xw73k4s2xw9hK4BpBoBm+oXPf OD27AWmSNCz9XclD1XkE0BCdnKOLGG5aOGQaQhLHWfrH6ieTiJoKATQQ40NwwISt9TBy wkDg== X-Gm-Message-State: AMCzsaVQQSSkGS1mfkA2R4iHQvgpNNwihAOpde4l2L4mNd77wR0e2vHh 6L2xvwQZm7fgEBHzBKkneQSd3w== X-Google-Smtp-Source: ABhQp+SghNBFqS93UyWo/uTykDgFlj8VOerlFdLHggdgImbZqneqKorZGC7IVQ6CK8UWo8s0lDtgBA== X-Received: by 10.99.63.7 with SMTP id m7mr6250766pga.359.1508568876334; Fri, 20 Oct 2017 23:54:36 -0700 (PDT) From: Minwoo Im To: qemu-block@nongnu.org Date: Sat, 21 Oct 2017 15:54:16 +0900 Message-Id: <1508568856-17545-1-git-send-email-minwoo.im.dev@gmail.com> X-Mailer: git-send-email 2.7.4 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c00::242 X-Mailman-Approved-At: Sat, 21 Oct 2017 08:59:38 -0400 Subject: [Qemu-devel] [Qemu-block][PATCH] qemu-block: add support HMB with feature commands. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Keith Busch , Kevin Wolf , Minwoo Im , qemu-devel@nongnu.org, Max Reitz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add support HMB(Host Memory Block) with feature commands(Get Feature, Set F= eature). nvme-4.14 tree supports HMB features. This patch will make nvme controller to return 32MiB preferred size of HMB = to host via identify command. Set Feature, Get Feature implemented for HMB. Signed-off-by: Minwoo Im --- hw/block/nvme.c | 35 +++++++++++++++++++++++++++++++++++ hw/block/nvme.h | 21 ++++++++++++++++++++- 2 files changed, 55 insertions(+), 1 deletion(-) diff --git a/hw/block/nvme.c b/hw/block/nvme.c index 6071dc1..d351781 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -605,6 +605,23 @@ static uint16_t nvme_identify(NvmeCtrl *n, NvmeCmd *cm= d) } } =20 +static uint32_t nvme_get_feature_hmb(NvmeCtrl *n, NvmeCmd *cmd) +{ + uint32_t result =3D n->hmb_flag.flag; + uint64_t prp1 =3D le64_to_cpu(cmd->prp1); + uint64_t prp2 =3D le64_to_cpu(cmd->prp2); + NvmeHmbAttr attr =3D {0, }; + + attr.hsize =3D cpu_to_le32(n->hmb_attr.hsize); + attr.hmdlal =3D cpu_to_le32(n->hmb_attr.hmdlal); + attr.hmdlau =3D cpu_to_le32(n->hmb_attr.hmdlau); + attr.hmdlec =3D cpu_to_le32(n->hmb_attr.hmdlec); + + nvme_dma_read_prp(n, (uint8_t *)&attr, sizeof(attr), prp1, prp2); + + return result; +} + static uint16_t nvme_get_feature(NvmeCtrl *n, NvmeCmd *cmd, NvmeRequest *r= eq) { uint32_t dw10 =3D le32_to_cpu(cmd->cdw10); @@ -617,6 +634,9 @@ static uint16_t nvme_get_feature(NvmeCtrl *n, NvmeCmd *= cmd, NvmeRequest *req) case NVME_NUMBER_OF_QUEUES: result =3D cpu_to_le32((n->num_queues - 1) | ((n->num_queues - 1) = << 16)); break; + case NVME_HOST_MEMORY_BUFFER: + result =3D nvme_get_feature_hmb(n, cmd); + break; default: return NVME_INVALID_FIELD | NVME_DNR; } @@ -625,6 +645,16 @@ static uint16_t nvme_get_feature(NvmeCtrl *n, NvmeCmd = *cmd, NvmeRequest *req) return NVME_SUCCESS; } =20 +static void nvme_set_feature_hmb(NvmeCtrl *n, NvmeCmd *cmd) +{ + n->hmb_flag.flag =3D le32_to_cpu(cmd->cdw11); + + n->hmb_attr.hsize =3D le32_to_cpu(cmd->cdw12); + n->hmb_attr.hmdlal =3D le32_to_cpu(cmd->cdw13); + n->hmb_attr.hmdlau =3D le32_to_cpu(cmd->cdw14); + n->hmb_attr.hmdlec =3D le32_to_cpu(cmd->cdw15); +} + static uint16_t nvme_set_feature(NvmeCtrl *n, NvmeCmd *cmd, NvmeRequest *r= eq) { uint32_t dw10 =3D le32_to_cpu(cmd->cdw10); @@ -638,6 +668,9 @@ static uint16_t nvme_set_feature(NvmeCtrl *n, NvmeCmd *= cmd, NvmeRequest *req) req->cqe.result =3D cpu_to_le32((n->num_queues - 1) | ((n->num_queues - 1) << 16)); break; + case NVME_HOST_MEMORY_BUFFER: + nvme_set_feature_hmb(n, cmd); + break; default: return NVME_INVALID_FIELD | NVME_DNR; } @@ -985,6 +1018,8 @@ static int nvme_init(PCIDevice *pci_dev) id->oacs =3D cpu_to_le16(0); id->frmw =3D 7 << 1; id->lpa =3D 1 << 0; + id->hmpre =3D 0x2000; + id->hmmin =3D 0x0; id->sqes =3D (0x6 << 4) | 0x6; id->cqes =3D (0x4 << 4) | 0x4; id->nn =3D cpu_to_le32(n->num_namespaces); diff --git a/hw/block/nvme.h b/hw/block/nvme.h index 6aab338..fab748b 100644 --- a/hw/block/nvme.h +++ b/hw/block/nvme.h @@ -552,7 +552,10 @@ typedef struct NvmeIdCtrl { uint8_t lpa; uint8_t elpe; uint8_t npss; - uint8_t rsvd511[248]; + uint8_t rsvd271[8]; + uint32_t hmpre; + uint32_t hmmin; + uint8_t rsvd511[232]; uint8_t sqes; uint8_t cqes; uint16_t rsvd515; @@ -623,9 +626,22 @@ enum NvmeFeatureIds { NVME_INTERRUPT_VECTOR_CONF =3D 0x9, NVME_WRITE_ATOMICITY =3D 0xa, NVME_ASYNCHRONOUS_EVENT_CONF =3D 0xb, + NVME_HOST_MEMORY_BUFFER =3D 0xd, NVME_SOFTWARE_PROGRESS_MARKER =3D 0x80 }; =20 +typedef struct NvmeHmbFlag { + uint32_t flag; +} NvmeHmbFlag; + +typedef struct NvmeHmbAttr { + uint32_t hsize; + uint32_t hmdlal; + uint32_t hmdlau; + uint32_t hmdlec; + uint8_t rsvd4095[4080]; +} NvmeHmbAttr; + typedef struct NvmeRangeType { uint8_t type; uint8_t attributes; @@ -776,6 +792,9 @@ typedef struct NvmeCtrl { uint32_t cmbloc; uint8_t *cmbuf; =20 + NvmeHmbFlag hmb_flag; + NvmeHmbAttr hmb_attr; + char *serial; NvmeNamespace *namespaces; NvmeSQueue **sq; --=20 2.7.4