From nobody Tue Feb 10 21:19:17 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1508038485469596.9928387386277; Sat, 14 Oct 2017 20:34:45 -0700 (PDT) Received: from localhost ([::1]:55996 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e3ZhB-0002yG-R8 for importer@patchew.org; Sat, 14 Oct 2017 23:34:33 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49161) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e3ZWj-0002n8-VS for qemu-devel@nongnu.org; Sat, 14 Oct 2017 23:23:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e3ZWi-0006zI-Nl for qemu-devel@nongnu.org; Sat, 14 Oct 2017 23:23:45 -0400 Received: from mx1.redhat.com ([209.132.183.28]:50372) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1e3ZWd-0006x4-QL; Sat, 14 Oct 2017 23:23:40 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D8F7513A49; Sun, 15 Oct 2017 03:23:38 +0000 (UTC) Received: from redhat.com (ovpn-120-178.rdu2.redhat.com [10.10.120.178]) by smtp.corp.redhat.com (Postfix) with SMTP id E88F7600CD; Sun, 15 Oct 2017 03:23:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com D8F7513A49 Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=mst@redhat.com Date: Sun, 15 Oct 2017 06:23:36 +0300 From: "Michael S. Tsirkin" To: qemu-devel@nongnu.org Message-ID: <1508036858-13479-18-git-send-email-mst@redhat.com> References: <1508036858-13479-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1508036858-13479-1-git-send-email-mst@redhat.com> X-Mutt-Fcc: =sent X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Sun, 15 Oct 2017 03:23:39 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 17/26] pci: Add INTERFACE_PCIE_DEVICE to all PCIe devices X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , Peter Maydell , Hannes Reinecke , Eduardo Habkost , Paul Burton , Jason Wang , Alistair Francis , Max Reitz , Keith Busch , Marcel Apfelbaum , Dmitry Fleytman , Paolo Bonzini , qemu-block@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Eduardo Habkost Change all devices that set is_express=3D1 to implement INTERFACE_PCIE_DEVICE. Cc: Keith Busch Cc: Kevin Wolf Cc: Max Reitz Cc: Dmitry Fleytman Cc: Jason Wang Cc: "Michael S. Tsirkin" Cc: Marcel Apfelbaum Cc: Paul Burton Cc: Paolo Bonzini Cc: Hannes Reinecke Cc: qemu-block@nongnu.org Reviewed-by: Alistair Francis Signed-off-by: Eduardo Habkost Reviewed-by: David Gibson Reviewed-by: Marcel Apfelbaum Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/block/nvme.c | 4 ++++ hw/net/e1000e.c | 4 ++++ hw/pci-bridge/pcie_pci_bridge.c | 1 + hw/pci-bridge/pcie_root_port.c | 4 ++++ hw/pci-bridge/xio3130_downstream.c | 4 ++++ hw/pci-bridge/xio3130_upstream.c | 4 ++++ hw/pci-host/xilinx-pcie.c | 4 ++++ hw/scsi/megasas.c | 6 ++++++ 8 files changed, 31 insertions(+) diff --git a/hw/block/nvme.c b/hw/block/nvme.c index 9aa3269..441e21e 100644 --- a/hw/block/nvme.c +++ b/hw/block/nvme.c @@ -1110,6 +1110,10 @@ static const TypeInfo nvme_info =3D { .instance_size =3D sizeof(NvmeCtrl), .class_init =3D nvme_class_init, .instance_init =3D nvme_instance_init, + .interfaces =3D (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, }; =20 static void nvme_register_types(void) diff --git a/hw/net/e1000e.c b/hw/net/e1000e.c index 744f0f3..f1af279 100644 --- a/hw/net/e1000e.c +++ b/hw/net/e1000e.c @@ -710,6 +710,10 @@ static const TypeInfo e1000e_info =3D { .instance_size =3D sizeof(E1000EState), .class_init =3D e1000e_class_init, .instance_init =3D e1000e_instance_init, + .interfaces =3D (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, }; =20 static void e1000e_register_types(void) diff --git a/hw/pci-bridge/pcie_pci_bridge.c b/hw/pci-bridge/pcie_pci_bridg= e.c index da562fe..a4d827c 100644 --- a/hw/pci-bridge/pcie_pci_bridge.c +++ b/hw/pci-bridge/pcie_pci_bridge.c @@ -192,6 +192,7 @@ static const TypeInfo pcie_pci_bridge_info =3D { .class_init =3D pcie_pci_bridge_class_init, .interfaces =3D (InterfaceInfo[]) { { TYPE_HOTPLUG_HANDLER }, + { INTERFACE_PCIE_DEVICE }, { }, } }; diff --git a/hw/pci-bridge/pcie_root_port.c b/hw/pci-bridge/pcie_root_port.c index 4d588cb..9b6e4ce 100644 --- a/hw/pci-bridge/pcie_root_port.c +++ b/hw/pci-bridge/pcie_root_port.c @@ -161,6 +161,10 @@ static const TypeInfo rp_info =3D { .class_init =3D rp_class_init, .abstract =3D true, .class_size =3D sizeof(PCIERootPortClass), + .interfaces =3D (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, }; =20 static void rp_register_types(void) diff --git a/hw/pci-bridge/xio3130_downstream.c b/hw/pci-bridge/xio3130_dow= nstream.c index 5a882b0..1e09d2a 100644 --- a/hw/pci-bridge/xio3130_downstream.c +++ b/hw/pci-bridge/xio3130_downstream.c @@ -196,6 +196,10 @@ static const TypeInfo xio3130_downstream_info =3D { .name =3D "xio3130-downstream", .parent =3D TYPE_PCIE_SLOT, .class_init =3D xio3130_downstream_class_init, + .interfaces =3D (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, }; =20 static void xio3130_downstream_register_types(void) diff --git a/hw/pci-bridge/xio3130_upstream.c b/hw/pci-bridge/xio3130_upstr= eam.c index a052224..227997c 100644 --- a/hw/pci-bridge/xio3130_upstream.c +++ b/hw/pci-bridge/xio3130_upstream.c @@ -166,6 +166,10 @@ static const TypeInfo xio3130_upstream_info =3D { .name =3D "x3130-upstream", .parent =3D TYPE_PCIE_PORT, .class_init =3D xio3130_upstream_class_init, + .interfaces =3D (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, }; =20 static void xio3130_upstream_register_types(void) diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c index 4613dda..7659253 100644 --- a/hw/pci-host/xilinx-pcie.c +++ b/hw/pci-host/xilinx-pcie.c @@ -317,6 +317,10 @@ static const TypeInfo xilinx_pcie_root_info =3D { .parent =3D TYPE_PCI_BRIDGE, .instance_size =3D sizeof(XilinxPCIERoot), .class_init =3D xilinx_pcie_root_class_init, + .interfaces =3D (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, }; =20 static void xilinx_pcie_register(void) diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c index 0db68aa..535ee26 100644 --- a/hw/scsi/megasas.c +++ b/hw/scsi/megasas.c @@ -2451,6 +2451,7 @@ typedef struct MegasasInfo { int osts; const VMStateDescription *vmsd; Property *props; + InterfaceInfo *interfaces; } MegasasInfo; =20 static struct MegasasInfo megasas_devices[] =3D { @@ -2480,6 +2481,10 @@ static struct MegasasInfo megasas_devices[] =3D { .is_express =3D true, .vmsd =3D &vmstate_megasas_gen2, .props =3D megasas_properties_gen2, + .interfaces =3D (InterfaceInfo[]) { + { INTERFACE_PCIE_DEVICE }, + { } + }, } }; =20 @@ -2531,6 +2536,7 @@ static void megasas_register_types(void) type_info.parent =3D TYPE_MEGASAS_BASE; type_info.class_data =3D (void *)info; type_info.class_init =3D megasas_class_init; + type_info.interfaces =3D info->interfaces; =20 type_register(&type_info); } --=20 MST