From nobody Tue Feb 10 19:48:02 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1508038368090327.483085828356; Sat, 14 Oct 2017 20:32:48 -0700 (PDT) Received: from localhost ([::1]:55989 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e3ZfJ-0001US-Ae for importer@patchew.org; Sat, 14 Oct 2017 23:32:37 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48978) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e3ZWP-0002V2-Gp for qemu-devel@nongnu.org; Sat, 14 Oct 2017 23:23:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e3ZWO-0006cz-FG for qemu-devel@nongnu.org; Sat, 14 Oct 2017 23:23:25 -0400 Received: from mx1.redhat.com ([209.132.183.28]:58328) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1e3ZWO-0006cb-6g for qemu-devel@nongnu.org; Sat, 14 Oct 2017 23:23:24 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 2E4EE81DE3; Sun, 15 Oct 2017 03:23:23 +0000 (UTC) Received: from redhat.com (ovpn-120-178.rdu2.redhat.com [10.10.120.178]) by smtp.corp.redhat.com (Postfix) with SMTP id B53725C6D4; Sun, 15 Oct 2017 03:23:19 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 2E4EE81DE3 Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=mst@redhat.com Date: Sun, 15 Oct 2017 06:23:19 +0300 From: "Michael S. Tsirkin" To: qemu-devel@nongnu.org Message-ID: <1508036858-13479-13-git-send-email-mst@redhat.com> References: <1508036858-13479-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1508036858-13479-1-git-send-email-mst@redhat.com> X-Mutt-Fcc: =sent X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Sun, 15 Oct 2017 03:23:23 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 12/26] hw/pci-bridge/pcie_pci_bridge: properly handle MSI unavailability case X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Peter Maydell , Thomas Huth , Aleksandr Bezzubikov , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Aleksandr Bezzubikov QEMU with the pcie-pci-bridge device crashes if the guest board doesn't sup= port MSI, e.g. 'qemu-system-ppc64 -M prep -device pcie-pci-bridge'. This is caused by wrong pcie-pci-bridge instantiation error handling. This = patch fixes this issue by falling back to legacy INTx if MSI is not available. Also set the bridge's 'msi' property default value to 'auto' in order to tr= igger errors only when user explicitly set msi=3Don. Reported-by: Eduardo Habkost Signed-off-by: Aleksandr Bezzubikov Reviewed-by: Marcel Apfelbaum Tested-by: Thomas Huth Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/pci-bridge/pcie_pci_bridge.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/hw/pci-bridge/pcie_pci_bridge.c b/hw/pci-bridge/pcie_pci_bridg= e.c index 9aa5cc3..da562fe 100644 --- a/hw/pci-bridge/pcie_pci_bridge.c +++ b/hw/pci-bridge/pcie_pci_bridge.c @@ -65,10 +65,18 @@ static void pcie_pci_bridge_realize(PCIDevice *d, Error= **errp) goto aer_error; } =20 + Error *local_err =3D NULL; if (pcie_br->msi !=3D ON_OFF_AUTO_OFF) { - rc =3D msi_init(d, 0, 1, true, true, errp); + rc =3D msi_init(d, 0, 1, true, true, &local_err); if (rc < 0) { - goto msi_error; + assert(rc =3D=3D -ENOTSUP); + if (pcie_br->msi !=3D ON_OFF_AUTO_ON) { + error_free(local_err); + } else { + /* failed to satisfy user's explicit request for MSI */ + error_propagate(errp, local_err); + goto msi_error; + } } } pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY | @@ -81,7 +89,7 @@ aer_error: pm_error: pcie_cap_exit(d); cap_error: - shpc_free(d); + shpc_cleanup(d, &pcie_br->shpc_bar); error: pci_bridge_exitfn(d); } @@ -98,7 +106,9 @@ static void pcie_pci_bridge_reset(DeviceState *qdev) { PCIDevice *d =3D PCI_DEVICE(qdev); pci_bridge_reset(qdev); - msi_reset(d); + if (msi_present(d)) { + msi_reset(d); + } shpc_reset(d); } =20 @@ -106,12 +116,14 @@ static void pcie_pci_bridge_write_config(PCIDevice *d, uint32_t address, uint32_t val, int len) { pci_bridge_write_config(d, address, val, len); - msi_write_config(d, address, val, len); + if (msi_present(d)) { + msi_write_config(d, address, val, len); + } shpc_cap_write_config(d, address, val, len); } =20 static Property pcie_pci_bridge_dev_properties[] =3D { - DEFINE_PROP_ON_OFF_AUTO("msi", PCIEPCIBridge, msi, ON_OFF_AUTO_ON), + DEFINE_PROP_ON_OFF_AUTO("msi", PCIEPCIBridge, msi, ON_OFF_AUTO_AUT= O), DEFINE_PROP_END_OF_LIST(), }; =20 --=20 MST