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Sat, 14 Oct 2017 14:25:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e3R7Y-0002ZP-Lw for qemu-devel@nongnu.org; Sat, 14 Oct 2017 14:25:15 -0400 Received: from chuckie.co.uk ([82.165.15.123]:36882 helo=s16892447.onlinehome-server.info) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1e3R7Y-0002Yi-Fk for qemu-devel@nongnu.org; Sat, 14 Oct 2017 14:25:12 -0400 Received: from host86-191-119-84.range86-191.btcentralplus.com ([86.191.119.84] helo=kentang.home) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1e3R7c-0002LQ-H0; Sat, 14 Oct 2017 19:25:17 +0100 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, atar4qemu@gmail.com Date: Sat, 14 Oct 2017 19:24:57 +0100 Message-Id: <1508005498-29037-3-git-send-email-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1508005498-29037-1-git-send-email-mark.cave-ayland@ilande.co.uk> References: <1508005498-29037-1-git-send-email-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 86.191.119.84 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCH 2/3] sparc32_dma: switch over to using IOMMU memory region and DMA API X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Mark Cave-Ayland --- hw/dma/sparc32_dma.c | 17 +++++++++++------ 1 file changed, 11 insertions(+), 6 deletions(-) diff --git a/hw/dma/sparc32_dma.c b/hw/dma/sparc32_dma.c index fbb072a..5438831 100644 --- a/hw/dma/sparc32_dma.c +++ b/hw/dma/sparc32_dma.c @@ -29,6 +29,7 @@ #include "hw/hw.h" #include "hw/sparc/sparc32_dma.h" #include "hw/sysbus.h" +#include "sysemu/dma.h" #include "qapi/error.h" #include "trace.h" =20 @@ -70,16 +71,17 @@ void ledma_memory_read(void *opaque, hwaddr addr, uint8_t *buf, int len, int do_bswap) { DMADeviceState *s =3D opaque; + IOMMUState *is =3D (IOMMUState *)s->iommu; int i; =20 addr |=3D s->dmaregs[3]; trace_ledma_memory_read(addr, len); if (do_bswap) { - sparc_iommu_memory_read(s->iommu, addr, buf, len); + dma_memory_read(&is->iommu_as, addr, buf, len); } else { addr &=3D ~1; len &=3D ~1; - sparc_iommu_memory_read(s->iommu, addr, buf, len); + dma_memory_read(&is->iommu_as, addr, buf, len); for(i =3D 0; i < len; i +=3D 2) { bswap16s((uint16_t *)(buf + i)); } @@ -90,13 +92,14 @@ void ledma_memory_write(void *opaque, hwaddr addr, uint8_t *buf, int len, int do_bswap) { DMADeviceState *s =3D opaque; + IOMMUState *is =3D (IOMMUState *)s->iommu; int l, i; uint16_t tmp_buf[32]; =20 addr |=3D s->dmaregs[3]; trace_ledma_memory_write(addr, len); if (do_bswap) { - sparc_iommu_memory_write(s->iommu, addr, buf, len); + dma_memory_write(&is->iommu_as, addr, buf, len); } else { addr &=3D ~1; len &=3D ~1; @@ -107,7 +110,7 @@ void ledma_memory_write(void *opaque, hwaddr addr, for(i =3D 0; i < l; i +=3D 2) { tmp_buf[i >> 1] =3D bswap16(*(uint16_t *)(buf + i)); } - sparc_iommu_memory_write(s->iommu, addr, (uint8_t *)tmp_buf, l= ); + dma_memory_write(&is->iommu_as, addr, tmp_buf, l); len -=3D l; buf +=3D l; addr +=3D l; @@ -138,18 +141,20 @@ static void dma_set_irq(void *opaque, int irq, int le= vel) void espdma_memory_read(void *opaque, uint8_t *buf, int len) { DMADeviceState *s =3D opaque; + IOMMUState *is =3D (IOMMUState *)s->iommu; =20 trace_espdma_memory_read(s->dmaregs[1], len); - sparc_iommu_memory_read(s->iommu, s->dmaregs[1], buf, len); + dma_memory_read(&is->iommu_as, s->dmaregs[1], buf, len); s->dmaregs[1] +=3D len; } =20 void espdma_memory_write(void *opaque, uint8_t *buf, int len) { DMADeviceState *s =3D opaque; + IOMMUState *is =3D (IOMMUState *)s->iommu; =20 trace_espdma_memory_write(s->dmaregs[1], len); - sparc_iommu_memory_write(s->iommu, s->dmaregs[1], buf, len); + dma_memory_write(&is->iommu_as, s->dmaregs[1], buf, len); s->dmaregs[1] +=3D len; } =20 --=20 1.7.10.4