From nobody Thu Dec 18 19:33:49 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1507824523292117.84919619157108; Thu, 12 Oct 2017 09:08:43 -0700 (PDT) Received: from localhost ([::1]:46368 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e2g2A-0006tZ-5z for importer@patchew.org; Thu, 12 Oct 2017 12:08:30 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44186) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1e2fxU-0003KH-2L for qemu-devel@nongnu.org; Thu, 12 Oct 2017 12:03:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1e2fxO-0004ZI-Ex for qemu-devel@nongnu.org; Thu, 12 Oct 2017 12:03:40 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:37896) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1e2fxO-0004Xg-8S for qemu-devel@nongnu.org; Thu, 12 Oct 2017 12:03:34 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1e2fxM-0000cW-PZ for qemu-devel@nongnu.org; Thu, 12 Oct 2017 17:03:32 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Thu, 12 Oct 2017 17:03:26 +0100 Message-Id: <1507824216-29058-4-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1507824216-29058-1-git-send-email-peter.maydell@linaro.org> References: <1507824216-29058-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 03/13] target/arm: Add M profile secure MMU index values to get_a32_user_mem_index() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add the M profile secure MMU index values to the switch in get_a32_user_mem_index() so that LDRT/STRT work correctly rather than asserting at translate time. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 1507556919-24992-2-git-send-email-peter.maydell@linaro.org --- target/arm/translate.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/target/arm/translate.c b/target/arm/translate.c index fdc46cc..61fd0ef 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -165,6 +165,10 @@ static inline int get_a32_user_mem_index(DisasContext = *s) case ARMMMUIdx_MPriv: case ARMMMUIdx_MNegPri: return arm_to_core_mmu_idx(ARMMMUIdx_MUser); + case ARMMMUIdx_MSUser: + case ARMMMUIdx_MSPriv: + case ARMMMUIdx_MSNegPri: + return arm_to_core_mmu_idx(ARMMMUIdx_MSUser); case ARMMMUIdx_S2NS: default: g_assert_not_reached(); --=20 2.7.4