From nobody Mon Apr 29 00:16:00 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1505851490810221.73374760366517; Tue, 19 Sep 2017 13:04:50 -0700 (PDT) Received: from localhost ([::1]:45159 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1duOlE-0000yg-Ej for importer@patchew.org; Tue, 19 Sep 2017 16:04:48 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33730) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1duOjf-0000Ac-5t for qemu-devel@nongnu.org; Tue, 19 Sep 2017 16:03:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1duOjc-0001W4-1e for qemu-devel@nongnu.org; Tue, 19 Sep 2017 16:03:11 -0400 Received: from chuckie.co.uk ([82.165.15.123]:51941 helo=s16892447.onlinehome-server.info) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1duOjb-0001Um-S1; Tue, 19 Sep 2017 16:03:07 -0400 Received: from host109-151-159-252.range109-151.btcentralplus.com ([109.151.159.252] helo=kentang.home) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1duOjd-0002Ok-IL; Tue, 19 Sep 2017 21:03:11 +0100 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org, david@gibson.dropbear.id.au Date: Tue, 19 Sep 2017 21:02:54 +0100 Message-Id: <1505851374-6408-1-git-send-email-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 1.7.10.4 X-SA-Exim-Connect-IP: 109.151.159.252 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [PATCHv2] macio: convert pmac_ide_ops from old_mmio X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Mark Cave-Ayland --- hw/ide/macio.c | 181 +++++++++++++++++++++++-----------------------------= ---- 1 file changed, 75 insertions(+), 106 deletions(-) diff --git a/hw/ide/macio.c b/hw/ide/macio.c index db5db39..18ae952 100644 --- a/hw/ide/macio.c +++ b/hw/ide/macio.c @@ -255,131 +255,100 @@ static void pmac_ide_flush(DBDMA_io *io) } =20 /* PowerMac IDE memory IO */ -static void pmac_ide_writeb (void *opaque, - hwaddr addr, uint32_t val) +static uint64_t pmac_ide_read(void *opaque, hwaddr addr, unsigned size) { MACIOIDEState *d =3D opaque; - - addr =3D (addr & 0xFFF) >> 4; - switch (addr) { - case 1 ... 7: - ide_ioport_write(&d->bus, addr, val); - break; - case 8: - case 22: - ide_cmd_write(&d->bus, 0, val); + uint64_t retval =3D 0xffffffff; + int reg =3D addr >> 4; + + switch (reg) { + case 0x0: + if (size =3D=3D 2) { + retval =3D ide_data_readw(&d->bus, 0); + } else if (size =3D=3D 4) { + retval =3D ide_data_readl(&d->bus, 0); + } break; - default: + case 0x1 ... 0x7: + if (size =3D=3D 1) { + retval =3D ide_ioport_read(&d->bus, reg); + } break; - } -} - -static uint32_t pmac_ide_readb (void *opaque,hwaddr addr) -{ - uint8_t retval; - MACIOIDEState *d =3D opaque; - - addr =3D (addr & 0xFFF) >> 4; - switch (addr) { - case 1 ... 7: - retval =3D ide_ioport_read(&d->bus, addr); + case 0x8: + case 0x16: + if (size =3D=3D 1) { + retval =3D ide_status_read(&d->bus, 0); + } break; - case 8: - case 22: - retval =3D ide_status_read(&d->bus, 0); + case 0x20: + if (size =3D=3D 4) { + retval =3D d->timing_reg; + } break; - default: - retval =3D 0xFF; + case 0x30: + /* This is an interrupt state register that only exists + * in the KeyLargo and later variants. Bit 0x8000_0000 + * latches the DMA interrupt and has to be written to + * clear. Bit 0x4000_0000 is an image of the disk + * interrupt. MacOS X relies on this and will hang if + * we don't provide at least the disk interrupt + */ + if (size =3D=3D 4) { + retval =3D d->irq_reg; + } break; } - return retval; -} =20 -static void pmac_ide_writew (void *opaque, - hwaddr addr, uint32_t val) -{ - MACIOIDEState *d =3D opaque; - - addr =3D (addr & 0xFFF) >> 4; - val =3D bswap16(val); - if (addr =3D=3D 0) { - ide_data_writew(&d->bus, 0, val); - } -} - -static uint32_t pmac_ide_readw (void *opaque,hwaddr addr) -{ - uint16_t retval; - MACIOIDEState *d =3D opaque; - - addr =3D (addr & 0xFFF) >> 4; - if (addr =3D=3D 0) { - retval =3D ide_data_readw(&d->bus, 0); - } else { - retval =3D 0xFFFF; - } - retval =3D bswap16(retval); return retval; } =20 -static void pmac_ide_writel (void *opaque, - hwaddr addr, uint32_t val) -{ - MACIOIDEState *d =3D opaque; =20 - addr =3D (addr & 0xFFF) >> 4; - val =3D bswap32(val); - if (addr =3D=3D 0) { - ide_data_writel(&d->bus, 0, val); - } else if (addr =3D=3D 0x20) { - d->timing_reg =3D val; - } else if (addr =3D=3D 0x30) { - if (val & 0x80000000u) { - d->irq_reg &=3D 0x7fffffff; - } - } -} - -static uint32_t pmac_ide_readl (void *opaque,hwaddr addr) +static void pmac_ide_write(void *opaque, hwaddr addr, uint64_t val, + unsigned size) { - uint32_t retval; MACIOIDEState *d =3D opaque; - - addr =3D (addr & 0xFFF) >> 4; - if (addr =3D=3D 0) { - retval =3D ide_data_readl(&d->bus, 0); - } else if (addr =3D=3D 0x20) { - retval =3D d->timing_reg; - } else if (addr =3D=3D 0x30) { - /* This is an interrupt state register that only exists - * in the KeyLargo and later variants. Bit 0x8000_0000 - * latches the DMA interrupt and has to be written to - * clear. Bit 0x4000_0000 is an image of the disk - * interrupt. MacOS X relies on this and will hang if - * we don't provide at least the disk interrupt - */ - retval =3D d->irq_reg; - } else { - retval =3D 0xFFFFFFFF; + int reg =3D addr >> 4; + + switch (reg) { + case 0x0: + if (size =3D=3D 2) { + ide_data_writew(&d->bus, 0, val); + } else if (size =3D=3D 4) { + ide_data_writel(&d->bus, 0, val); + } + break; + case 0x1 ... 0x7: + if (size =3D=3D 1) { + ide_ioport_write(&d->bus, reg, val); + } + break; + case 0x8: + case 0x16: + if (size =3D=3D 1) { + ide_cmd_write(&d->bus, 0, val); + } + break; + case 0x20: + if (size =3D=3D 4) { + d->timing_reg =3D val; + } + break; + case 0x30: + if (size =3D=3D 4) { + if (val & 0x80000000u) { + d->irq_reg &=3D 0x7fffffff; + } + } + break; } - retval =3D bswap32(retval); - return retval; } =20 static const MemoryRegionOps pmac_ide_ops =3D { - .old_mmio =3D { - .write =3D { - pmac_ide_writeb, - pmac_ide_writew, - pmac_ide_writel, - }, - .read =3D { - pmac_ide_readb, - pmac_ide_readw, - pmac_ide_readl, - }, - }, - .endianness =3D DEVICE_NATIVE_ENDIAN, + .read =3D pmac_ide_read, + .write =3D pmac_ide_write, + .valid.min_access_size =3D 1, + .valid.max_access_size =3D 4, + .endianness =3D DEVICE_LITTLE_ENDIAN, }; =20 static const VMStateDescription vmstate_pmac =3D { --=20 1.7.10.4