From nobody Tue Nov 4 11:01:33 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1505807564301386.8425533730392; Tue, 19 Sep 2017 00:52:44 -0700 (PDT) Received: from localhost ([::1]:40612 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1duDKk-0003Bx-5E for importer@patchew.org; Tue, 19 Sep 2017 03:52:42 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47460) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1duDGS-0008Js-Ub for qemu-devel@nongnu.org; Tue, 19 Sep 2017 03:48:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1duDGP-0000s0-B1 for qemu-devel@nongnu.org; Tue, 19 Sep 2017 03:48:16 -0400 Received: from mx1.redhat.com ([209.132.183.28]:51638) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1duDGC-0000lp-S7; Tue, 19 Sep 2017 03:48:01 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 34F42267DB; Tue, 19 Sep 2017 07:47:59 +0000 (UTC) Received: from localhost.localdomain.com (ovpn-116-197.ams2.redhat.com [10.36.116.197]) by smtp.corp.redhat.com (Postfix) with ESMTP id E2D8B61342; Tue, 19 Sep 2017 07:47:52 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 34F42267DB Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=eric.auger@redhat.com From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, peter.maydell@linaro.org, alex.williamson@redhat.com, mst@redhat.com, qemu-arm@nongnu.org, qemu-devel@nongnu.org, jean-philippe.brucker@arm.com Date: Tue, 19 Sep 2017 09:46:37 +0200 Message-Id: <1505807208-9063-6-git-send-email-eric.auger@redhat.com> In-Reply-To: <1505807208-9063-1-git-send-email-eric.auger@redhat.com> References: <1505807208-9063-1-git-send-email-eric.auger@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Tue, 19 Sep 2017 07:47:59 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v4 05/16] virtio-iommu: Add the iommu regions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: wei@redhat.com, kevin.tian@intel.com, marc.zyngier@arm.com, tn@semihalf.com, will.deacon@arm.com, drjones@redhat.com, peterx@redhat.com, linuc.decode@gmail.com, bharat.bhushan@nxp.com, christoffer.dall@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This patch initializes the iommu memory regions so that PCIe end point transactions get translated. The translation function is not yet implemented at that stage. Signed-off-by: Eric Auger --- v3 -> v4: - add trace_virtio_iommu_init_iommu_mr v2 -> v3: - use IOMMUMemoryRegion - iommu mr name built with BDF - rename smmu_get_sid into virtio_iommu_get_sid and use PCI_BUILD_BDF --- hw/virtio/trace-events | 2 + hw/virtio/virtio-iommu.c | 119 +++++++++++++++++++++++++++++++++++= ++++ include/hw/virtio/virtio-iommu.h | 2 + 3 files changed, 123 insertions(+) diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events index a35dc62..bc65356 100644 --- a/hw/virtio/trace-events +++ b/hw/virtio/trace-events @@ -36,3 +36,5 @@ virtio_iommu_attach(uint32_t as, uint32_t dev) "as=3D%d d= ev=3D%d" virtio_iommu_detach(uint32_t dev) "dev=3D%d" virtio_iommu_map(uint32_t as, uint64_t phys_addr, uint64_t virt_addr, uint= 64_t size, uint32_t flags) "as=3D %d phys_addr=3D0x%"PRIx64" virt_addr=3D0x= %"PRIx64" size=3D0x%"PRIx64" flags=3D%d" virtio_iommu_unmap(uint32_t as, uint64_t virt_addr, uint64_t size) "as=3D = %d virt_addr=3D0x%"PRIx64" size=3D0x%"PRIx64 +virtio_iommu_translate(const char *name, uint32_t rid, uint64_t iova, int = flag) "mr=3D%s rid=3D%d addr=3D0x%"PRIx64" flag=3D%d" +virtio_iommu_init_iommu_mr(char *iommu_mr) "init %s" diff --git a/hw/virtio/virtio-iommu.c b/hw/virtio/virtio-iommu.c index 51f9003..f4cb76f 100644 --- a/hw/virtio/virtio-iommu.c +++ b/hw/virtio/virtio-iommu.c @@ -23,6 +23,7 @@ #include "hw/virtio/virtio.h" #include "sysemu/kvm.h" #include "qapi-event.h" +#include "qemu/error-report.h" #include "trace.h" =20 #include "standard-headers/linux/virtio_ids.h" @@ -35,6 +36,66 @@ /* Max size */ #define VIOMMU_DEFAULT_QUEUE_SIZE 256 =20 +static inline uint16_t virtio_iommu_get_sid(IOMMUDevice *dev) +{ + return PCI_BUILD_BDF(pci_bus_num(dev->bus), dev->devfn); +} + +static AddressSpace *virtio_iommu_find_add_as(PCIBus *bus, void *opaque, + int devfn) +{ + VirtIOIOMMU *s =3D opaque; + uintptr_t key =3D (uintptr_t)bus; + IOMMUPciBus *sbus =3D g_hash_table_lookup(s->as_by_busptr, &key); + IOMMUDevice *sdev; + + if (!sbus) { + uintptr_t *new_key =3D g_malloc(sizeof(*new_key)); + + *new_key =3D (uintptr_t)bus; + sbus =3D g_malloc0(sizeof(IOMMUPciBus) + + sizeof(IOMMUDevice *) * IOMMU_PCI_DEVFN_MAX); + sbus->bus =3D bus; + g_hash_table_insert(s->as_by_busptr, new_key, sbus); + } + + sdev =3D sbus->pbdev[devfn]; + if (!sdev) { + char *name =3D g_strdup_printf("%s-%d-%d", + TYPE_VIRTIO_IOMMU_MEMORY_REGION, + pci_bus_num(bus), devfn); + sdev =3D sbus->pbdev[devfn] =3D g_malloc0(sizeof(IOMMUDevice)); + + sdev->viommu =3D s; + sdev->bus =3D bus; + sdev->devfn =3D devfn; + + trace_virtio_iommu_init_iommu_mr(name); + + memory_region_init_iommu(&sdev->iommu_mr, sizeof(sdev->iommu_mr), + TYPE_VIRTIO_IOMMU_MEMORY_REGION, + OBJECT(s), name, + UINT64_MAX); + address_space_init(&sdev->as, + MEMORY_REGION(&sdev->iommu_mr), TYPE_VIRTIO_IOM= MU); + } + + return &sdev->as; + +} + +static void virtio_iommu_init_as(VirtIOIOMMU *s) +{ + PCIBus *pcibus =3D pci_find_primary_bus(); + + if (pcibus) { + pci_setup_iommu(pcibus, virtio_iommu_find_add_as, s); + } else { + error_report("No PCI bus, virtio-iommu is not registered"); + } +} + + static int virtio_iommu_attach(VirtIOIOMMU *s, struct virtio_iommu_req_attach *req) { @@ -215,6 +276,26 @@ static void virtio_iommu_handle_command(VirtIODevice *= vdev, VirtQueue *vq) } } =20 +static IOMMUTLBEntry virtio_iommu_translate(IOMMUMemoryRegion *mr, hwaddr = addr, + IOMMUAccessFlags flag) +{ + IOMMUDevice *sdev =3D container_of(mr, IOMMUDevice, iommu_mr); + uint32_t sid; + + IOMMUTLBEntry entry =3D { + .target_as =3D &address_space_memory, + .iova =3D addr, + .translated_addr =3D addr, + .addr_mask =3D ~(hwaddr)0, + .perm =3D IOMMU_NONE, + }; + + sid =3D virtio_iommu_get_sid(sdev); + + trace_virtio_iommu_translate(mr->parent_obj.name, sid, addr, flag); + return entry; +} + static void virtio_iommu_get_config(VirtIODevice *vdev, uint8_t *config_da= ta) { VirtIOIOMMU *dev =3D VIRTIO_IOMMU(vdev); @@ -265,6 +346,21 @@ static const VMStateDescription vmstate_virtio_iommu_d= evice =3D { }, }; =20 +/***************************** + * Hash Table + *****************************/ + +static inline gboolean as_uint64_equal(gconstpointer v1, gconstpointer v2) +{ + return *((const uint64_t *)v1) =3D=3D *((const uint64_t *)v2); +} + +static inline guint as_uint64_hash(gconstpointer v) +{ + return (guint)*(const uint64_t *)v; +} + + static void virtio_iommu_device_realize(DeviceState *dev, Error **errp) { VirtIODevice *vdev =3D VIRTIO_DEVICE(dev); @@ -278,6 +374,13 @@ static void virtio_iommu_device_realize(DeviceState *d= ev, Error **errp) =20 s->config.page_size_mask =3D TARGET_PAGE_MASK; s->config.input_range.end =3D -1UL; + + memset(s->as_by_bus_num, 0, sizeof(s->as_by_bus_num)); + s->as_by_busptr =3D g_hash_table_new_full(as_uint64_hash, + as_uint64_equal, + g_free, g_free); + + virtio_iommu_init_as(s); } =20 static void virtio_iommu_device_unrealize(DeviceState *dev, Error **errp) @@ -335,6 +438,14 @@ static void virtio_iommu_class_init(ObjectClass *klass= , void *data) vdc->vmsd =3D &vmstate_virtio_iommu_device; } =20 +static void virtio_iommu_memory_region_class_init(ObjectClass *klass, + void *data) +{ + IOMMUMemoryRegionClass *imrc =3D IOMMU_MEMORY_REGION_CLASS(klass); + + imrc->translate =3D virtio_iommu_translate; +} + static const TypeInfo virtio_iommu_info =3D { .name =3D TYPE_VIRTIO_IOMMU, .parent =3D TYPE_VIRTIO_DEVICE, @@ -343,9 +454,17 @@ static const TypeInfo virtio_iommu_info =3D { .class_init =3D virtio_iommu_class_init, }; =20 +static const TypeInfo virtio_iommu_memory_region_info =3D { + .parent =3D TYPE_IOMMU_MEMORY_REGION, + .name =3D TYPE_VIRTIO_IOMMU_MEMORY_REGION, + .class_init =3D virtio_iommu_memory_region_class_init, +}; + + static void virtio_register_types(void) { type_register_static(&virtio_iommu_info); + type_register_static(&virtio_iommu_memory_region_info); } =20 type_init(virtio_register_types) diff --git a/include/hw/virtio/virtio-iommu.h b/include/hw/virtio/virtio-io= mmu.h index 6716cdb..f9c988f 100644 --- a/include/hw/virtio/virtio-iommu.h +++ b/include/hw/virtio/virtio-iommu.h @@ -28,6 +28,8 @@ #define VIRTIO_IOMMU(obj) \ OBJECT_CHECK(VirtIOIOMMU, (obj), TYPE_VIRTIO_IOMMU) =20 +#define TYPE_VIRTIO_IOMMU_MEMORY_REGION "virtio-iommu-memory-region" + #define IOMMU_PCI_BUS_MAX 256 #define IOMMU_PCI_DEVFN_MAX 256 =20 --=20 2.5.5