From nobody Mon Apr 29 12:51:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1505060174123441.5464002064283; Sun, 10 Sep 2017 09:16:14 -0700 (PDT) Received: from localhost ([::1]:53544 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr4u5-0004Cr-9Y for importer@patchew.org; Sun, 10 Sep 2017 12:16:13 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39907) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr4tH-0003oA-Gx for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:15:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dr4tC-0001Mu-ID for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:15:23 -0400 Received: from roura.ac.upc.es ([147.83.33.10]:58499) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr4tC-0001MZ-70 for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:15:18 -0400 Received: from correu-2.ac.upc.es (correu-2.ac.upc.es [147.83.30.92]) by roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id v8AGFGse020250; Sun, 10 Sep 2017 18:15:16 +0200 Received: from localhost (unknown [132.68.137.153]) by correu-2.ac.upc.es (Postfix) with ESMTPSA id EB440133E; Sun, 10 Sep 2017 18:15:10 +0200 (CEST) From: =?utf-8?b?TGx1w61z?= Vilanova To: qemu-devel@nongnu.org Date: Sun, 10 Sep 2017 19:15:09 +0300 Message-Id: <150506010962.19604.7773376130922107594.stgit@frigg.lan> X-Mailer: git-send-email 2.14.1 In-Reply-To: <150505986682.19604.11937392314067517230.stgit@frigg.lan> References: <150505986682.19604.11937392314067517230.stgit@frigg.lan> User-Agent: StGit/0.18 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by roura.ac.upc.es id v8AGFGse020250 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy] X-Received-From: 147.83.33.10 Subject: [Qemu-devel] [PATCH 1/7] trace: Add event "guest_bbl_before" X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Richard Henderson , Stefan Hajnoczi , Peter Crosthwaite Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Signed-off-by: Llu=C3=ADs Vilanova --- accel/tcg/translator.c | 6 ++++++ trace-events | 11 +++++++++++ 2 files changed, 17 insertions(+) diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index afa3af478a..91b3b0da32 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -13,6 +13,7 @@ #include "cpu.h" #include "tcg/tcg.h" #include "tcg/tcg-op.h" +#include "trace-tcg.h" #include "exec/exec-all.h" #include "exec/gen-icount.h" #include "exec/log.h" @@ -91,6 +92,11 @@ void translator_loop(const TranslatorOps *ops, DisasCont= extBase *db, } } =20 + /* Tracing before */ + if (db->num_insns =3D=3D 1) { + trace_guest_bbl_before_tcg(cpu, tcg_ctx.tcg_env, db->pc_first); + } + /* Disassemble one instruction. The translate_insn hook should update db->pc_next and db->is_jmp to indicate what should be done next -- either exiting this loop or locate the start of diff --git a/trace-events b/trace-events index 1f50f56d9d..d242f54254 100644 --- a/trace-events +++ b/trace-events @@ -88,6 +88,17 @@ vcpu guest_cpu_exit(void) # Targets: all vcpu guest_cpu_reset(void) =20 + +## Guest code + +# @vaddr: BBL's starting virtual address +# +# Mark start of BBL execution (before anything gets really executed). +# +# Mode: user, softmmu +# Targets: TCG(all) +vcpu tcg guest_bbl_before(uint64_t vaddr) "vaddr=3D0x%016"PRIx64, "vaddr= =3D0x%016"PRIx64 + # @vaddr: Access' virtual address. # @info : Access' information (see below). # From nobody Mon Apr 29 12:51:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1505060448458981.8001027149176; Sun, 10 Sep 2017 09:20:48 -0700 (PDT) Received: from localhost ([::1]:53554 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr4yU-0005q2-R6 for importer@patchew.org; Sun, 10 Sep 2017 12:20:46 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40565) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr4xA-00059P-28 for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:19:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dr4x6-0002rs-3b for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:19:24 -0400 Received: from roura.ac.upc.es ([147.83.33.10]:55797) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr4x5-0002rR-Oq for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:19:20 -0400 Received: from correu-2.ac.upc.es (correu-2.ac.upc.es [147.83.30.92]) by roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id v8AGJIhY020327; Sun, 10 Sep 2017 18:19:18 +0200 Received: from localhost (unknown [132.68.137.153]) by correu-2.ac.upc.es (Postfix) with ESMTPSA id CC92A1263; Sun, 10 Sep 2017 18:19:12 +0200 (CEST) From: =?utf-8?b?TGx1w61z?= Vilanova To: qemu-devel@nongnu.org Date: Sun, 10 Sep 2017 19:19:11 +0300 Message-Id: <150506035158.19604.740046564057160055.stgit@frigg.lan> X-Mailer: git-send-email 2.14.1 In-Reply-To: <150505986682.19604.11937392314067517230.stgit@frigg.lan> References: <150505986682.19604.11937392314067517230.stgit@frigg.lan> User-Agent: StGit/0.18 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by roura.ac.upc.es id v8AGJIhY020327 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy] X-Received-From: 147.83.33.10 Subject: [Qemu-devel] [PATCH 2/7] trace: Add event "guest_inst_before" X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Richard Henderson , Stefan Hajnoczi , Peter Crosthwaite Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Signed-off-by: Llu=C3=ADs Vilanova --- accel/tcg/translator.c | 3 +++ trace-events | 8 ++++++++ 2 files changed, 11 insertions(+) diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index 91b3b0da32..287d27b4f7 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -69,6 +69,8 @@ void translator_loop(const TranslatorOps *ops, DisasConte= xtBase *db, tcg_debug_assert(db->is_jmp =3D=3D DISAS_NEXT); /* no early exit */ =20 while (true) { + target_ulong pc_insn =3D db->pc_next; + db->num_insns++; ops->insn_start(db, cpu); tcg_debug_assert(db->is_jmp =3D=3D DISAS_NEXT); /* no early exit = */ @@ -96,6 +98,7 @@ void translator_loop(const TranslatorOps *ops, DisasConte= xtBase *db, if (db->num_insns =3D=3D 1) { trace_guest_bbl_before_tcg(cpu, tcg_ctx.tcg_env, db->pc_first); } + trace_guest_inst_before_tcg(cpu, tcg_ctx.tcg_env, pc_insn); =20 /* Disassemble one instruction. The translate_insn hook should update db->pc_next and db->is_jmp to indicate what should be diff --git a/trace-events b/trace-events index d242f54254..46457c6158 100644 --- a/trace-events +++ b/trace-events @@ -99,6 +99,14 @@ vcpu guest_cpu_reset(void) # Targets: TCG(all) vcpu tcg guest_bbl_before(uint64_t vaddr) "vaddr=3D0x%016"PRIx64, "vaddr= =3D0x%016"PRIx64 =20 +# @vaddr: Instruction's virtual address +# +# Mark start of instruction execution (before anything gets really execute= d). +# +# Mode: user, softmmu +# Targets: TCG(all) +vcpu tcg guest_inst_before(uint64_t vaddr) "vaddr=3D0x%016"PRIx64, "vaddr= =3D0x%016"PRIx64 + # @vaddr: Access' virtual address. # @info : Access' information (see below). # From nobody Mon Apr 29 12:51:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1505060658625357.9492383488365; Sun, 10 Sep 2017 09:24:18 -0700 (PDT) Received: from localhost ([::1]:53562 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr51s-0007OF-D5 for importer@patchew.org; Sun, 10 Sep 2017 12:24:16 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41423) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr513-00074o-MM for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:23:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dr50z-0003wf-N7 for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:23:25 -0400 Received: from roura.ac.upc.es ([147.83.33.10]:57795) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr50z-0003wR-C1 for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:23:21 -0400 Received: from correu-2.ac.upc.es (correu-2.ac.upc.es [147.83.30.92]) by roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id v8AGNKNV020412; Sun, 10 Sep 2017 18:23:20 +0200 Received: from localhost (unknown [132.68.137.153]) by correu-2.ac.upc.es (Postfix) with ESMTPSA id D1E531683; Sun, 10 Sep 2017 18:23:14 +0200 (CEST) From: =?utf-8?b?TGx1w61z?= Vilanova To: qemu-devel@nongnu.org Date: Sun, 10 Sep 2017 19:23:13 +0300 Message-Id: <150506059354.19604.5050182852156612042.stgit@frigg.lan> X-Mailer: git-send-email 2.14.1 In-Reply-To: <150505986682.19604.11937392314067517230.stgit@frigg.lan> References: <150505986682.19604.11937392314067517230.stgit@frigg.lan> User-Agent: StGit/0.18 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by roura.ac.upc.es id v8AGNKNV020412 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy] X-Received-From: 147.83.33.10 Subject: [Qemu-devel] [PATCH 3/7] trace: Add event "guest_inst_info_before" X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Richard Henderson , Stefan Hajnoczi , Peter Crosthwaite Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Signed-off-by: Llu=C3=ADs Vilanova --- accel/tcg/translator.c | 18 ++++++++++++++++++ trace-events | 9 +++++++++ 2 files changed, 27 insertions(+) diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index 287d27b4f7..6598931171 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -70,6 +70,8 @@ void translator_loop(const TranslatorOps *ops, DisasConte= xtBase *db, =20 while (true) { target_ulong pc_insn =3D db->pc_next; + TCGv_i32 insn_size_tcg =3D 0; + int insn_size_opcode_idx; =20 db->num_insns++; ops->insn_start(db, cpu); @@ -99,6 +101,16 @@ void translator_loop(const TranslatorOps *ops, DisasCon= textBase *db, trace_guest_bbl_before_tcg(cpu, tcg_ctx.tcg_env, db->pc_first); } trace_guest_inst_before_tcg(cpu, tcg_ctx.tcg_env, pc_insn); + if (TRACE_GUEST_INST_INFO_BEFORE_EXEC_ENABLED) { + insn_size_tcg =3D tcg_temp_new_i32(); + insn_size_opcode_idx =3D tcg_op_buf_count(); + tcg_gen_movi_i32(insn_size_tcg, 0xdeadbeef); + + trace_guest_inst_info_before_tcg( + cpu, tcg_ctx.tcg_env, pc_insn, insn_size_tcg); + + tcg_temp_free_i32(insn_size_tcg); + } =20 /* Disassemble one instruction. The translate_insn hook should update db->pc_next and db->is_jmp to indicate what should be @@ -113,6 +125,12 @@ void translator_loop(const TranslatorOps *ops, DisasCo= ntextBase *db, ops->translate_insn(db, cpu); } =20 + /* Tracing after (patched values) */ + if (TRACE_GUEST_INST_INFO_BEFORE_EXEC_ENABLED) { + unsigned int insn_size =3D db->pc_next - pc_insn; + tcg_set_insn_param(insn_size_opcode_idx, 1, insn_size); + } + /* Stop translation if translate_insn so indicated. */ if (db->is_jmp !=3D DISAS_NEXT) { break; diff --git a/trace-events b/trace-events index 46457c6158..4e61697297 100644 --- a/trace-events +++ b/trace-events @@ -107,6 +107,15 @@ vcpu tcg guest_bbl_before(uint64_t vaddr) "vaddr=3D0x%= 016"PRIx64, "vaddr=3D0x%016"PR # Targets: TCG(all) vcpu tcg guest_inst_before(uint64_t vaddr) "vaddr=3D0x%016"PRIx64, "vaddr= =3D0x%016"PRIx64 =20 +# @vaddr: Instruction's virtual address +# @size: Instruction's size in bytes +# +# Same as 'guest_inst_before', with additional information. +# +# Mode: user, softmmu +# Targets: TCG(all) +disable vcpu tcg guest_inst_info_before(uint64_t vaddr, TCGv_i32 size) "va= ddr=3D0x%016"PRIx64, "vaddr=3D0x%016"PRIx64" size=3D%d" + # @vaddr: Access' virtual address. # @info : Access' information (see below). # From nobody Mon Apr 29 12:51:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1505060901379431.59509106766575; Sun, 10 Sep 2017 09:28:21 -0700 (PDT) Received: from localhost ([::1]:53578 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr55o-000059-2Y for importer@patchew.org; Sun, 10 Sep 2017 12:28:20 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42496) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr54y-0008EW-AC for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:27:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dr54u-0005fB-9Z for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:27:28 -0400 Received: from roura.ac.upc.es ([147.83.33.10]:57808) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr54t-0005es-N1 for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:27:24 -0400 Received: from correu-1.ac.upc.es (correu-1.ac.upc.es [147.83.30.91]) by roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id v8AGRMaJ020492; Sun, 10 Sep 2017 18:27:22 +0200 Received: from localhost (unknown [132.68.137.153]) by correu-1.ac.upc.es (Postfix) with ESMTPSA id B3663201; Sun, 10 Sep 2017 18:27:16 +0200 (CEST) From: =?utf-8?b?TGx1w61z?= Vilanova To: qemu-devel@nongnu.org Date: Sun, 10 Sep 2017 19:27:15 +0300 Message-Id: <150506083546.19604.543091497330269756.stgit@frigg.lan> X-Mailer: git-send-email 2.14.1 In-Reply-To: <150505986682.19604.11937392314067517230.stgit@frigg.lan> References: <150505986682.19604.11937392314067517230.stgit@frigg.lan> User-Agent: StGit/0.18 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by roura.ac.upc.es id v8AGRMaJ020492 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy] X-Received-From: 147.83.33.10 Subject: [Qemu-devel] [PATCH 4/7] tcg: Add support for "inlining" regions of code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stefan Hajnoczi , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 TCG BBLs and instructions have multiple exit points from where to raise tracing events, but some of the necessary information in the generic disassembly infrastructure is not available until after generating these exit points. This patch adds support for "inline points" (where the tracing code will be placed), and "inline regions" (which identify the TCG code that must be inlined). The TCG compiler will basically copy each inline region to any inline points that reference it. Signed-off-by: Llu=C3=ADs Vilanova --- include/qemu/log.h | 1=20 include/qemu/typedefs.h | 1=20 tcg/tcg-op.h | 39 +++++++++++ tcg/tcg-opc.h | 3 + tcg/tcg.c | 166 +++++++++++++++++++++++++++++++++++++++++++= ++++ tcg/tcg.h | 18 +++++ util/log.c | 2 + 7 files changed, 230 insertions(+) diff --git a/include/qemu/log.h b/include/qemu/log.h index a50e994c21..23acc63c73 100644 --- a/include/qemu/log.h +++ b/include/qemu/log.h @@ -43,6 +43,7 @@ static inline bool qemu_log_separate(void) #define CPU_LOG_PAGE (1 << 14) #define LOG_TRACE (1 << 15) #define CPU_LOG_TB_OP_IND (1 << 16) +#define CPU_LOG_TB_OP_INLINE (1 << 17) =20 /* Returns true if a bit is set in the current loglevel mask */ diff --git a/include/qemu/typedefs.h b/include/qemu/typedefs.h index 39bc8351a3..2fb5670af3 100644 --- a/include/qemu/typedefs.h +++ b/include/qemu/typedefs.h @@ -96,6 +96,7 @@ typedef struct SerialState SerialState; typedef struct SHPCDevice SHPCDevice; typedef struct SMBusDevice SMBusDevice; typedef struct SSIBus SSIBus; +typedef struct TCGInlineLabel TCGInlineLabel; typedef struct uWireSlave uWireSlave; typedef struct VirtIODevice VirtIODevice; typedef struct Visitor Visitor; diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index 5d3278f243..da3784f8f2 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -326,6 +326,45 @@ void tcg_gen_ext16u_i32(TCGv_i32 ret, TCGv_i32 arg); void tcg_gen_bswap16_i32(TCGv_i32 ret, TCGv_i32 arg); void tcg_gen_bswap32_i32(TCGv_i32 ret, TCGv_i32 arg); =20 +static inline int _get_inline_index(TCGInlineLabel *l) +{ + TCGContext *s =3D &tcg_ctx; + return l - s->inline_labels; +} + +static inline void gen_set_inline_point(TCGInlineLabel *l) +{ + TCGContext *s =3D &tcg_ctx; + TCGInlinePoint *p =3D tcg_malloc(sizeof(TCGInlinePoint)); + p->op_idx =3D s->gen_next_op_idx; + p->next_point =3D l->first_point; + l->first_point =3D p; + tcg_gen_op1i(INDEX_op_set_inline_point, + _get_inline_index(l)); +} + +static inline void gen_set_inline_region_begin(TCGInlineLabel *l) +{ + TCGContext *s =3D &tcg_ctx; + if (l->begin_op_idx !=3D -1) { + tcg_abort(); + } + l->begin_op_idx =3D s->gen_next_op_idx; + tcg_gen_op1i(INDEX_op_set_inline_region_begin, + _get_inline_index(l)); +} + +static inline void gen_set_inline_region_end(TCGInlineLabel *l) +{ + TCGContext *s =3D &tcg_ctx; + if (l->begin_op_idx =3D=3D -1) { + tcg_abort(); + } + l->end_op_idx =3D s->gen_next_op_idx; + tcg_gen_op1i(INDEX_op_set_inline_region_end, + _get_inline_index(l)); +} + static inline void tcg_gen_discard_i32(TCGv_i32 arg) { tcg_gen_op1_i32(INDEX_op_discard, arg); diff --git a/tcg/tcg-opc.h b/tcg/tcg-opc.h index 956fb1e9f3..279ac0dc1f 100644 --- a/tcg/tcg-opc.h +++ b/tcg/tcg-opc.h @@ -29,6 +29,9 @@ /* predefined ops */ DEF(discard, 1, 0, 0, TCG_OPF_NOT_PRESENT) DEF(set_label, 0, 0, 1, TCG_OPF_BB_END | TCG_OPF_NOT_PRESENT) +DEF(set_inline_point, 0, 0, 1, TCG_OPF_NOT_PRESENT) +DEF(set_inline_region_begin, 0, 0, 1, TCG_OPF_NOT_PRESENT) +DEF(set_inline_region_end, 0, 0, 1, TCG_OPF_NOT_PRESENT) =20 /* variable number of parameters */ DEF(call, 0, 0, 3, TCG_OPF_CALL_CLOBBER | TCG_OPF_NOT_PRESENT) diff --git a/tcg/tcg.c b/tcg/tcg.c index fd8a3dfe93..b48196da27 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -251,6 +251,23 @@ TCGLabel *gen_new_label(void) return l; } =20 +TCGInlineLabel *gen_new_inline_label(void) +{ + TCGContext *s =3D &tcg_ctx; + int idx; + TCGInlineLabel *l; + + if (s->nb_inline_labels >=3D TCG_MAX_INLINE_LABELS) { + tcg_abort(); + } + idx =3D s->nb_inline_labels++; + l =3D &s->inline_labels[idx]; + l->first_point =3D NULL; + l->begin_op_idx =3D -1; + l->end_op_idx =3D -1; + return l; +} + #include "tcg-target.inc.c" =20 /* pool based memory allocation */ @@ -462,6 +479,10 @@ void tcg_func_start(TCGContext *s) s->nb_labels =3D 0; s->current_frame_offset =3D s->frame_start; =20 + s->inline_labels =3D tcg_malloc(sizeof(TCGInlineLabel) * + TCG_MAX_INLINE_LABELS); + s->nb_inline_labels =3D 0; + #ifdef CONFIG_DEBUG_TCG s->goto_tb_issue_mask =3D 0; #endif @@ -1423,6 +1444,139 @@ static inline void tcg_la_bb_end(TCGContext *s, uin= t8_t *temp_state) } } =20 +static inline int _get_op_next(TCGContext *s, int idx) +{ + return s->gen_op_buf[idx].next; +} + +static inline void _set_op_next(TCGContext *s, int idx, int next) +{ + s->gen_op_buf[idx].next =3D next; +} + +static inline int _get_op_prev(TCGContext *s, int idx) +{ + return s->gen_op_buf[idx].prev; +} + +static inline void _set_op_prev(TCGContext *s, int idx, int prev) +{ + s->gen_op_buf[idx].prev =3D prev; +} + +static inline void _inline_region_ignore(TCGContext *s, TCGInlineLabel *l) +{ + int l_prev =3D _get_op_prev(s, l->begin_op_idx); + int l_next =3D _get_op_next(s, l->end_op_idx); + _set_op_next(s, l_prev, l_next); + _set_op_prev(s, l_next, l_prev); +} + +static inline void _op_ignore(TCGContext *s, int op_idx) +{ + int p_prev =3D _get_op_prev(s, op_idx); + int p_next =3D _get_op_next(s, op_idx); + _set_op_next(s, p_prev, p_next); + _set_op_prev(s, p_next, p_prev); +} + +static inline void _inline_point_ignore(TCGContext *s, TCGInlinePoint *p) +{ + _op_ignore(s, p->op_idx); +} + +static inline void _inline_weave(TCGContext *s, TCGInlinePoint *p, + int begin, int end) +{ + int begin_prev =3D _get_op_prev(s, begin); + int end_next =3D _get_op_next(s, end); + int p_prev =3D _get_op_prev(s, p->op_idx); + int p_next =3D _get_op_next(s, p->op_idx); + /* point.prev -> begin */ + _set_op_next(s, p_prev, begin); + _set_op_prev(s, begin, p_prev); + /* end -> point.next */ + _set_op_next(s, end, p_next); + _set_op_prev(s, p_next, end); + /* begin.prev -> end.next */ + _set_op_next(s, begin_prev, end_next); + _set_op_prev(s, end_next, begin_prev); +} + +/* + * Handles inline_set_label/inline_region_begin/inline_region_end opcodes = (which + * will disappear after this optimization). + */ +static void tcg_inline(TCGContext *s) +{ + int i; + for (i =3D 0; i < s->nb_inline_labels; i++) { + TCGInlineLabel *l =3D &s->inline_labels[i]; + size_t region_op_count =3D l->end_op_idx - l->begin_op_idx - 1; + + /* open region is an error */ + if (l->begin_op_idx !=3D -1 && l->end_op_idx =3D=3D -1) { + tcg_abort(); + } + + if (l->first_point =3D=3D NULL) { /* region without points */ + _inline_region_ignore(s, l); + } else if (l->begin_op_idx =3D=3D -1) { /* points without region */ + TCGInlinePoint *p; + for (p =3D l->first_point; p !=3D NULL; p =3D p->next_point) { + _inline_point_ignore(s, p); + } + } else if (region_op_count =3D=3D 0) { /* empty region */ + TCGInlinePoint *p; + for (p =3D l->first_point; p !=3D NULL; p =3D p->next_point) { + _inline_point_ignore(s, p); + } + _inline_region_ignore(s, l); + } else { /* actual inlining */ + bool first_point =3D true; + int l_begin =3D _get_op_next(s, l->begin_op_idx); + int l_end =3D _get_op_prev(s, l->end_op_idx); + TCGInlinePoint *p; + for (p =3D l->first_point; p !=3D NULL; p =3D p->next_point) { + if (first_point) { + /* redirect point to existing region (skip markers) */ + _inline_weave(s, p, l_begin, l_end); + _op_ignore(s, l->begin_op_idx); + _op_ignore(s, l->end_op_idx); + } else { + /* create a copy of the region */ + int l_end_next =3D _get_op_next(s, l_end); + int op; + int pos =3D p->op_idx; + for (op =3D l_begin; op !=3D l_end_next; + op =3D _get_op_next(s, op)) { + /* insert opcode copies */ + int insert_idx =3D s->gen_next_op_idx; + int opc =3D s->gen_op_buf[op].opc; + int args =3D s->gen_op_buf[op].args; + int nargs =3D tcg_op_defs[opc].nb_args; + if (opc =3D=3D INDEX_op_call) { + nargs +=3D s->gen_op_buf[op].calli; + nargs +=3D s->gen_op_buf[op].callo; + } + tcg_op_insert_after(s, &s->gen_op_buf[pos], opc, n= args); + pos =3D insert_idx; + s->gen_op_buf[pos].calli =3D s->gen_op_buf[op].cal= li; + s->gen_op_buf[pos].callo =3D s->gen_op_buf[op].cal= lo; + /* insert argument copies */ + memcpy(&s->gen_opparam_buf[s->gen_op_buf[pos].args= ], + &s->gen_opparam_buf[args], + nargs * sizeof(s->gen_opparam_buf[0])); + } + _op_ignore(s, p->op_idx); + } + first_point =3D false; + } + } + } +} + + /* Liveness analysis : update the opc_arg_life array to tell if a given input arguments is dead. Instructions updating dead temporaries are removed. */ @@ -2560,6 +2714,18 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb) } #endif =20 + /* inline code regions before any optimization pass */ + tcg_inline(s); + +#ifdef DEBUG_DISAS + if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_INLINE) + && qemu_log_in_addr_range(tb->pc))) { + qemu_log("OP after inline:\n"); + tcg_dump_ops(s); + qemu_log("\n"); + } +#endif + #ifdef CONFIG_PROFILER s->opt_time -=3D profile_getclock(); #endif diff --git a/tcg/tcg.h b/tcg/tcg.h index ac94133870..c6e3c6e68d 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -397,6 +397,20 @@ static inline unsigned get_alignment_bits(TCGMemOp mem= op) =20 typedef tcg_target_ulong TCGArg; =20 +#define TCG_MAX_INLINE_REGIONS 1 +#define TCG_MAX_INLINE_LABELS TCG_MAX_INLINE_REGIONS + +typedef struct TCGInlinePoint { + int op_idx; + struct TCGInlinePoint *next_point; +} TCGInlinePoint; + +typedef struct TCGInlineLabel { + TCGInlinePoint *first_point; + int begin_op_idx, end_op_idx; +} TCGInlineLabel; + + /* Define type and accessor macros for TCG variables. =20 TCG variables are the inputs and outputs of TCG ops, as described @@ -649,6 +663,9 @@ struct TCGContext { int nb_temps; int nb_indirects; =20 + TCGInlineLabel *inline_labels; + int nb_inline_labels; + /* goto_tb support */ tcg_insn_unit *code_buf; uint16_t *tb_jmp_reset_offset; /* tb->jmp_reset_offset */ @@ -950,6 +967,7 @@ TCGv_i32 tcg_const_local_i32(int32_t val); TCGv_i64 tcg_const_local_i64(int64_t val); =20 TCGLabel *gen_new_label(void); +TCGInlineLabel *gen_new_inline_label(void); =20 /** * label_arg diff --git a/util/log.c b/util/log.c index 96f30dd21a..947a982c74 100644 --- a/util/log.c +++ b/util/log.c @@ -246,6 +246,8 @@ const QEMULogItem qemu_log_items[] =3D { "show target assembly code for each compiled TB" }, { CPU_LOG_TB_OP, "op", "show micro ops for each compiled TB" }, + { CPU_LOG_TB_OP_INLINE, "op_inline", + "show micro ops after inlining" }, { CPU_LOG_TB_OP_OPT, "op_opt", "show micro ops after optimization" }, { CPU_LOG_TB_OP_IND, "op_ind", From nobody Mon Apr 29 12:51:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 150506115165474.42485349801973; Sun, 10 Sep 2017 09:32:31 -0700 (PDT) Received: from localhost ([::1]:53590 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr59q-0001nA-K8 for importer@patchew.org; Sun, 10 Sep 2017 12:32:30 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43219) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr58r-0001ES-Pm for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:31:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dr58n-00078e-Qq for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:31:29 -0400 Received: from roura.ac.upc.es ([147.83.33.10]:35341) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr58n-00078C-CI for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:31:25 -0400 Received: from correu-1.ac.upc.es (correu-1.ac.upc.es [147.83.30.91]) by roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id v8AGVOxX020554; Sun, 10 Sep 2017 18:31:24 +0200 Received: from localhost (unknown [132.68.137.153]) by correu-1.ac.upc.es (Postfix) with ESMTPSA id B940F1B8; Sun, 10 Sep 2017 18:31:18 +0200 (CEST) From: =?utf-8?b?TGx1w61z?= Vilanova To: qemu-devel@nongnu.org Date: Sun, 10 Sep 2017 19:31:17 +0300 Message-Id: <150506107741.19604.8328467942268087647.stgit@frigg.lan> X-Mailer: git-send-email 2.14.1 In-Reply-To: <150505986682.19604.11937392314067517230.stgit@frigg.lan> References: <150505986682.19604.11937392314067517230.stgit@frigg.lan> User-Agent: StGit/0.18 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by roura.ac.upc.es id v8AGVOxX020554 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy] X-Received-From: 147.83.33.10 Subject: [Qemu-devel] [PATCH 5/7] trace: Add event "guest_bbl_after" X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Richard Henderson , Stefan Hajnoczi , Peter Crosthwaite Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Need to use "TCG inlining" to avoid showing a trace entry for each exit point (up to two per BBL). Signed-off-by: Llu=C3=ADs Vilanova --- accel/tcg/translator.c | 54 +++++++++++++++++++++++++++++++++++++++++= ++++ include/exec/translator.h | 22 ++++++++++++++++++ tcg/tcg-op.c | 2 ++ tcg/tcg-op.h | 1 + tcg/tcg.h | 5 ++++ trace-events | 11 +++++++++ 6 files changed, 94 insertions(+), 1 deletion(-) diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index 6598931171..d66d601c89 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -35,6 +35,7 @@ void translator_loop_temp_check(DisasContextBase *db) void translator_loop(const TranslatorOps *ops, DisasContextBase *db, CPUState *cpu, TranslationBlock *tb) { + target_ulong pc_bbl; int max_insns; =20 /* Initialize DisasContext */ @@ -63,6 +64,11 @@ void translator_loop(const TranslatorOps *ops, DisasCont= extBase *db, /* Reset the temp count so that we can identify leaks */ tcg_clear_temp_count(); =20 + /* Tracking gen_goto_tb / gen_exit_tb */ + pc_bbl =3D db->pc_first; + tcg_ctx.disas.seen_goto_tb =3D false; + tcg_ctx.disas.in_guest_code =3D false; + /* Start translating. */ gen_tb_start(db->tb); ops->tb_start(db, cpu); @@ -74,6 +80,11 @@ void translator_loop(const TranslatorOps *ops, DisasCont= extBase *db, int insn_size_opcode_idx; =20 db->num_insns++; + if (db->num_insns =3D=3D 1) { + tcg_ctx.disas.in_guest_code =3D true; + tcg_ctx.disas.inline_label =3D NULL; + } + ops->insn_start(db, cpu); tcg_debug_assert(db->is_jmp =3D=3D DISAS_NEXT); /* no early exit = */ =20 @@ -144,6 +155,22 @@ void translator_loop(const TranslatorOps *ops, DisasCo= ntextBase *db, } } =20 + /* Tracing after */ + if (TRACE_GUEST_BBL_AFTER_ENABLED) { + tcg_ctx.disas.in_guest_code =3D false; + if (tcg_ctx.disas.inline_label =3D=3D NULL) { + tcg_ctx.disas.inline_label =3D gen_new_inline_label(); + } + + gen_set_inline_region_begin(tcg_ctx.disas.inline_label); + + if (TRACE_GUEST_BBL_AFTER_ENABLED) { + trace_guest_bbl_after_tcg(cpu, tcg_ctx.tcg_env, pc_bbl); + } + + gen_set_inline_region_end(tcg_ctx.disas.inline_label); + } + /* Emit code to exit the TB, as indicated by db->is_jmp. */ ops->tb_stop(db, cpu); gen_tb_end(db->tb, db->num_insns); @@ -163,3 +190,30 @@ void translator_loop(const TranslatorOps *ops, DisasCo= ntextBase *db, } #endif } + + +void translator__gen_goto_tb(TCGContext *ctx) +{ + if (ctx->disas.in_guest_code && + (TRACE_GUEST_BBL_AFTER_ENABLED)) { + if (ctx->disas.inline_label =3D=3D NULL) { + ctx->disas.inline_label =3D gen_new_inline_label(); + } + gen_set_inline_point(ctx->disas.inline_label); + /* disable next exit_tb */ + ctx->disas.seen_goto_tb =3D true; + } +} + +void translator__gen_exit_tb(TCGContext *ctx) +{ + if (ctx->disas.in_guest_code && !ctx->disas.seen_goto_tb && + (TRACE_GUEST_BBL_AFTER_ENABLED)) { + if (ctx->disas.inline_label =3D=3D NULL) { + ctx->disas.inline_label =3D gen_new_inline_label(); + } + gen_set_inline_point(ctx->disas.inline_label); + /* enable next exit_tb */ + ctx->disas.seen_goto_tb =3D false; + } +} diff --git a/include/exec/translator.h b/include/exec/translator.h index e2dc2a04ae..83aeea59a1 100644 --- a/include/exec/translator.h +++ b/include/exec/translator.h @@ -20,7 +20,6 @@ =20 =20 #include "exec/exec-all.h" -#include "tcg/tcg.h" =20 =20 /** @@ -71,6 +70,21 @@ typedef struct DisasContextBase { bool singlestep_enabled; } DisasContextBase; =20 +/** + * TCGContextDisas: + * @seen_goto_tb: Whether we've seen a call to tcg_gen_goto_tb(). + * @in_guest_code: Whether we're generating guest code (or supporting + * boilerplate otherwise). + * @inline_label: Inline label. + * + * Extensions to #TCGContext specific to the generic translation framework. + */ +typedef struct TCGContextDisas { + bool seen_goto_tb; + bool in_guest_code; + TCGInlineLabel *inline_label; +} TCGContextDisas; + /** * TranslatorOps: * @init_disas_context: @@ -117,6 +131,8 @@ typedef struct TranslatorOps { void (*disas_log)(const DisasContextBase *db, CPUState *cpu); } TranslatorOps; =20 +#include "tcg/tcg.h" + /** * translator_loop: * @ops: Target-specific operations. @@ -141,4 +157,8 @@ void translator_loop(const TranslatorOps *ops, DisasCon= textBase *db, =20 void translator_loop_temp_check(DisasContextBase *db); =20 +/* Internal functions to hook tracing into */ +void translator__gen_goto_tb(TCGContext *ctx); +void translator__gen_exit_tb(TCGContext *ctx); + #endif /* EXEC__TRANSLATOR_H */ diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 688d91755b..575b4faf84 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -2578,6 +2578,8 @@ void tcg_gen_extr32_i64(TCGv_i64 lo, TCGv_i64 hi, TCG= v_i64 arg) =20 void tcg_gen_goto_tb(unsigned idx) { + translator__gen_goto_tb(&tcg_ctx); + /* We only support two chained exits. */ tcg_debug_assert(idx <=3D 1); #ifdef CONFIG_DEBUG_TCG diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h index da3784f8f2..9ab1497bc1 100644 --- a/tcg/tcg-op.h +++ b/tcg/tcg-op.h @@ -817,6 +817,7 @@ static inline void tcg_gen_insn_start(target_ulong pc, = target_ulong a1, =20 static inline void tcg_gen_exit_tb(uintptr_t val) { + translator__gen_exit_tb(&tcg_ctx); tcg_gen_op1i(INDEX_op_exit_tb, val); } =20 diff --git a/tcg/tcg.h b/tcg/tcg.h index c6e3c6e68d..6483ed75d6 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -655,6 +655,8 @@ QEMU_BUILD_BUG_ON(OPPARAM_BUF_SIZE > (1 << 14)); /* Make sure that we don't overflow 64 bits without noticing. */ QEMU_BUILD_BUG_ON(sizeof(TCGOp) > 8); =20 +#include "exec/translator.h" + struct TCGContext { uint8_t *pool_cur, *pool_end; TCGPool *pool_first, *pool_current, *pool_first_large; @@ -730,6 +732,9 @@ struct TCGContext { CPUState *cpu; /* *_trans */ TCGv_env tcg_env; /* *_exec */ =20 + /* Used by generic gen_intermediate_code */ + TCGContextDisas disas; + /* These structures are private to tcg-target.inc.c. */ #ifdef TCG_TARGET_NEED_LDST_LABELS struct TCGLabelQemuLdst *ldst_labels; diff --git a/trace-events b/trace-events index 4e61697297..ce54bb4993 100644 --- a/trace-events +++ b/trace-events @@ -99,6 +99,17 @@ vcpu guest_cpu_reset(void) # Targets: TCG(all) vcpu tcg guest_bbl_before(uint64_t vaddr) "vaddr=3D0x%016"PRIx64, "vaddr= =3D0x%016"PRIx64 =20 +# @vaddr: BBL's starting virtual address +# +# Mark end of BBL execution (after the BBL-exiting instruction). +# +# NOTE: This event might not be raised if the BBL ends unexpectedly (e.g., +# triggers an exception). +# +# Mode: user, softmmu +# Targets: TCG(all) +vcpu tcg guest_bbl_after(uint64_t vaddr) "vaddr=3D0x%016"PRIx64, "vaddr=3D= 0x%016"PRIx64 + # @vaddr: Instruction's virtual address # # Mark start of instruction execution (before anything gets really execute= d). From nobody Mon Apr 29 12:51:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1505061389843786.2467080036612; Sun, 10 Sep 2017 09:36:29 -0700 (PDT) Received: from localhost ([::1]:53600 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr5Dg-0002l4-IJ for importer@patchew.org; Sun, 10 Sep 2017 12:36:28 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44028) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr5Cl-0002R1-BJ for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:35:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dr5Ci-00089U-6R for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:35:31 -0400 Received: from roura.ac.upc.es ([147.83.33.10]:56924) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr5Ch-00089K-Ry for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:35:28 -0400 Received: from correu-1.ac.upc.es (correu-1.ac.upc.es [147.83.30.91]) by roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id v8AGZQxi020634; Sun, 10 Sep 2017 18:35:26 +0200 Received: from localhost (unknown [132.68.137.153]) by correu-1.ac.upc.es (Postfix) with ESMTPSA id BF0AD1B8; Sun, 10 Sep 2017 18:35:20 +0200 (CEST) From: =?utf-8?b?TGx1w61z?= Vilanova To: qemu-devel@nongnu.org Date: Sun, 10 Sep 2017 19:35:19 +0300 Message-Id: <150506131942.19604.1306593039321280342.stgit@frigg.lan> X-Mailer: git-send-email 2.14.1 In-Reply-To: <150505986682.19604.11937392314067517230.stgit@frigg.lan> References: <150505986682.19604.11937392314067517230.stgit@frigg.lan> User-Agent: StGit/0.18 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by roura.ac.upc.es id v8AGZQxi020634 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy] X-Received-From: 147.83.33.10 Subject: [Qemu-devel] [PATCH 6/7] trace: Add event "guest_inst_after" X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Richard Henderson , Stefan Hajnoczi , Peter Crosthwaite Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Signed-off-by: Llu=C3=ADs Vilanova --- accel/tcg/translator.c | 23 ++++++++++++++++++----- trace-events | 8 ++++++++ 2 files changed, 26 insertions(+), 5 deletions(-) diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index d66d601c89..c010aeee45 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -35,7 +35,8 @@ void translator_loop_temp_check(DisasContextBase *db) void translator_loop(const TranslatorOps *ops, DisasContextBase *db, CPUState *cpu, TranslationBlock *tb) { - target_ulong pc_bbl; + target_ulong pc_bbl, pc_insn =3D 0; + bool translated_insn =3D false; int max_insns; =20 /* Initialize DisasContext */ @@ -75,10 +76,15 @@ void translator_loop(const TranslatorOps *ops, DisasCon= textBase *db, tcg_debug_assert(db->is_jmp =3D=3D DISAS_NEXT); /* no early exit */ =20 while (true) { - target_ulong pc_insn =3D db->pc_next; TCGv_i32 insn_size_tcg =3D 0; int insn_size_opcode_idx; =20 + /* Tracing after (previous instruction) */ + if (db->num_insns > 0) { + trace_guest_inst_after_tcg(cpu, tcg_ctx.tcg_env, pc_insn); + } + pc_insn =3D db->pc_next; + db->num_insns++; if (db->num_insns =3D=3D 1) { tcg_ctx.disas.in_guest_code =3D true; @@ -136,6 +142,7 @@ void translator_loop(const TranslatorOps *ops, DisasCon= textBase *db, ops->translate_insn(db, cpu); } =20 + translated_insn =3D true; /* Tracing after (patched values) */ if (TRACE_GUEST_INST_INFO_BEFORE_EXEC_ENABLED) { unsigned int insn_size =3D db->pc_next - pc_insn; @@ -156,7 +163,8 @@ void translator_loop(const TranslatorOps *ops, DisasCon= textBase *db, } =20 /* Tracing after */ - if (TRACE_GUEST_BBL_AFTER_ENABLED) { + if (TRACE_GUEST_BBL_AFTER_ENABLED || + TRACE_GUEST_INST_AFTER_ENABLED) { tcg_ctx.disas.in_guest_code =3D false; if (tcg_ctx.disas.inline_label =3D=3D NULL) { tcg_ctx.disas.inline_label =3D gen_new_inline_label(); @@ -164,6 +172,9 @@ void translator_loop(const TranslatorOps *ops, DisasCon= textBase *db, =20 gen_set_inline_region_begin(tcg_ctx.disas.inline_label); =20 + if (TRACE_GUEST_INST_AFTER_ENABLED && translated_insn) { + trace_guest_inst_after_tcg(cpu, tcg_ctx.tcg_env, pc_insn); + } if (TRACE_GUEST_BBL_AFTER_ENABLED) { trace_guest_bbl_after_tcg(cpu, tcg_ctx.tcg_env, pc_bbl); } @@ -195,7 +206,8 @@ void translator_loop(const TranslatorOps *ops, DisasCon= textBase *db, void translator__gen_goto_tb(TCGContext *ctx) { if (ctx->disas.in_guest_code && - (TRACE_GUEST_BBL_AFTER_ENABLED)) { + (TRACE_GUEST_BBL_AFTER_ENABLED || + TRACE_GUEST_INST_AFTER_ENABLED)) { if (ctx->disas.inline_label =3D=3D NULL) { ctx->disas.inline_label =3D gen_new_inline_label(); } @@ -208,7 +220,8 @@ void translator__gen_goto_tb(TCGContext *ctx) void translator__gen_exit_tb(TCGContext *ctx) { if (ctx->disas.in_guest_code && !ctx->disas.seen_goto_tb && - (TRACE_GUEST_BBL_AFTER_ENABLED)) { + (TRACE_GUEST_BBL_AFTER_ENABLED || + TRACE_GUEST_INST_AFTER_ENABLED)) { if (ctx->disas.inline_label =3D=3D NULL) { ctx->disas.inline_label =3D gen_new_inline_label(); } diff --git a/trace-events b/trace-events index ce54bb4993..c477302d8d 100644 --- a/trace-events +++ b/trace-events @@ -118,6 +118,14 @@ vcpu tcg guest_bbl_after(uint64_t vaddr) "vaddr=3D0x%0= 16"PRIx64, "vaddr=3D0x%016"PRI # Targets: TCG(all) vcpu tcg guest_inst_before(uint64_t vaddr) "vaddr=3D0x%016"PRIx64, "vaddr= =3D0x%016"PRIx64 =20 +# @vaddr: Instruction's virtual address +# +# Mark end of instruction execution (after its operations have taken effec= t). +# +# Mode: user, softmmu +# Targets: TCG(all) +vcpu tcg guest_inst_after(uint64_t vaddr) "vaddr=3D0x%016"PRIx64, "vaddr= =3D0x%016"PRIx64 + # @vaddr: Instruction's virtual address # @size: Instruction's size in bytes # From nobody Mon Apr 29 12:51:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1505061624321842.6630327230062; Sun, 10 Sep 2017 09:40:24 -0700 (PDT) Received: from localhost ([::1]:53608 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr5HT-0003mQ-3u for importer@patchew.org; Sun, 10 Sep 2017 12:40:23 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44825) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr5Ge-0003Hd-Ma for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:39:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dr5Gb-0000gP-K9 for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:39:32 -0400 Received: from roura.ac.upc.es ([147.83.33.10]:55976) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dr5Gb-0000g9-9G for qemu-devel@nongnu.org; Sun, 10 Sep 2017 12:39:29 -0400 Received: from correu-2.ac.upc.es (correu-2.ac.upc.es [147.83.30.92]) by roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id v8AGdSvJ020703; Sun, 10 Sep 2017 18:39:28 +0200 Received: from localhost (unknown [132.68.137.153]) by correu-2.ac.upc.es (Postfix) with ESMTPSA id ACAEB1683; Sun, 10 Sep 2017 18:39:22 +0200 (CEST) From: =?utf-8?b?TGx1w61z?= Vilanova To: qemu-devel@nongnu.org Date: Sun, 10 Sep 2017 19:39:21 +0300 Message-Id: <150506156146.19604.7064966029596517363.stgit@frigg.lan> X-Mailer: git-send-email 2.14.1 In-Reply-To: <150505986682.19604.11937392314067517230.stgit@frigg.lan> References: <150505986682.19604.11937392314067517230.stgit@frigg.lan> User-Agent: StGit/0.18 MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by roura.ac.upc.es id v8AGdSvJ020703 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy] X-Received-From: 147.83.33.10 Subject: [Qemu-devel] [PATCH 7/7] trace: Add event "guest_inst_info_after" X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Richard Henderson , Stefan Hajnoczi , Peter Crosthwaite Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Signed-off-by: Llu=C3=ADs Vilanova --- accel/tcg/translator.c | 18 ++++++++++++++---- trace-events | 8 ++++++++ 2 files changed, 22 insertions(+), 4 deletions(-) diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index c010aeee45..d3039e7fd2 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -36,6 +36,7 @@ void translator_loop(const TranslatorOps *ops, DisasConte= xtBase *db, CPUState *cpu, TranslationBlock *tb) { target_ulong pc_bbl, pc_insn =3D 0; + unsigned int insn_size =3D 0; bool translated_insn =3D false; int max_insns; =20 @@ -82,6 +83,8 @@ void translator_loop(const TranslatorOps *ops, DisasConte= xtBase *db, /* Tracing after (previous instruction) */ if (db->num_insns > 0) { trace_guest_inst_after_tcg(cpu, tcg_ctx.tcg_env, pc_insn); + trace_guest_inst_info_after_tcg( + cpu, tcg_ctx.tcg_env, pc_insn, insn_size); } pc_insn =3D db->pc_next; =20 @@ -145,7 +148,7 @@ void translator_loop(const TranslatorOps *ops, DisasCon= textBase *db, translated_insn =3D true; /* Tracing after (patched values) */ if (TRACE_GUEST_INST_INFO_BEFORE_EXEC_ENABLED) { - unsigned int insn_size =3D db->pc_next - pc_insn; + insn_size =3D db->pc_next - pc_insn; tcg_set_insn_param(insn_size_opcode_idx, 1, insn_size); } =20 @@ -164,7 +167,8 @@ void translator_loop(const TranslatorOps *ops, DisasCon= textBase *db, =20 /* Tracing after */ if (TRACE_GUEST_BBL_AFTER_ENABLED || - TRACE_GUEST_INST_AFTER_ENABLED) { + TRACE_GUEST_INST_AFTER_ENABLED || + TRACE_GUEST_INST_INFO_AFTER_ENABLED) { tcg_ctx.disas.in_guest_code =3D false; if (tcg_ctx.disas.inline_label =3D=3D NULL) { tcg_ctx.disas.inline_label =3D gen_new_inline_label(); @@ -175,6 +179,10 @@ void translator_loop(const TranslatorOps *ops, DisasCo= ntextBase *db, if (TRACE_GUEST_INST_AFTER_ENABLED && translated_insn) { trace_guest_inst_after_tcg(cpu, tcg_ctx.tcg_env, pc_insn); } + if (TRACE_GUEST_INST_INFO_AFTER_ENABLED && translated_insn) { + trace_guest_inst_info_after_tcg( + cpu, tcg_ctx.tcg_env, pc_insn, insn_size); + } if (TRACE_GUEST_BBL_AFTER_ENABLED) { trace_guest_bbl_after_tcg(cpu, tcg_ctx.tcg_env, pc_bbl); } @@ -207,7 +215,8 @@ void translator__gen_goto_tb(TCGContext *ctx) { if (ctx->disas.in_guest_code && (TRACE_GUEST_BBL_AFTER_ENABLED || - TRACE_GUEST_INST_AFTER_ENABLED)) { + TRACE_GUEST_INST_AFTER_ENABLED || + TRACE_GUEST_INST_INFO_AFTER_ENABLED)) { if (ctx->disas.inline_label =3D=3D NULL) { ctx->disas.inline_label =3D gen_new_inline_label(); } @@ -221,7 +230,8 @@ void translator__gen_exit_tb(TCGContext *ctx) { if (ctx->disas.in_guest_code && !ctx->disas.seen_goto_tb && (TRACE_GUEST_BBL_AFTER_ENABLED || - TRACE_GUEST_INST_AFTER_ENABLED)) { + TRACE_GUEST_INST_AFTER_ENABLED || + TRACE_GUEST_INST_INFO_AFTER_ENABLED)) { if (ctx->disas.inline_label =3D=3D NULL) { ctx->disas.inline_label =3D gen_new_inline_label(); } diff --git a/trace-events b/trace-events index c477302d8d..73d797cb48 100644 --- a/trace-events +++ b/trace-events @@ -135,6 +135,14 @@ vcpu tcg guest_inst_after(uint64_t vaddr) "vaddr=3D0x%= 016"PRIx64, "vaddr=3D0x%016"PR # Targets: TCG(all) disable vcpu tcg guest_inst_info_before(uint64_t vaddr, TCGv_i32 size) "va= ddr=3D0x%016"PRIx64, "vaddr=3D0x%016"PRIx64" size=3D%d" =20 +# @vaddr: Instruction's virtual address +# @size: Instruction's size in bytes +# +# Same as 'guest_inst_after', with additional information. +# +# Targets: TCG(all) +disable vcpu tcg guest_inst_info_after(uint64_t vaddr, uint32_t size) "vad= dr=3D0x%016"PRIx64" size=3D%d", "vaddr=3D0x%016"PRIx64" size=3D%d" + # @vaddr: Access' virtual address. # @info : Access' information (see below). #