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X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 03/36] target/arm: Consolidate PMSA handling in get_phys_addr() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+famz=redhat.com@nongnu.org Sender: "Qemu-devel" X-Greylist: Sender passed SPF test, Sender IP whitelisted by DNSRBL, ACL 205 matched, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Mon, 04 Sep 2017 12:29:39 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Mon, 04 Sep 2017 12:29:39 +0000 (UTC) for IP:'208.118.235.17' DOMAIN:'lists.gnu.org' HELO:'lists.gnu.org' FROM:'redhat.com@nongnu.org' RCPT:'' X-RedHat-Spam-Score: -5.02 (HEADER_FROM_DIFFERENT_DOMAINS,RCVD_IN_DNSWL_HI,RCVD_IN_MSPIKE_H3,RCVD_IN_MSPIKE_WL,SPF_PASS) 208.118.235.17 lists.gnu.org 208.118.235.17 lists.gnu.org X-Scanned-By: MIMEDefang 2.78 on 10.5.110.27 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 Content-Length: 3677 Currently get_phys_addr() has PMSAv7 handling before the "is translation disabled?" check, and then PMSAv5 after it. Tidy this up by making the PMSAv5 code handle the "MPU disabled" case itself, so that we have all the PMSA code in one place. This will make adding the PMSAv8 code slightly cleaner, and also means that pre-v7 PMSA cores benefit from the MPU lookup logging that the PMSAv7 codepath had. Signed-off-by: Peter Maydell Reviewed-by: Edgar E. Iglesias Reviewed-by: Philippe Mathieu-Daud=C3=A9 Reviewed-by: Richard Henderson Message-id: 1501692241-23310-4-git-send-email-peter.maydell@linaro.org --- target/arm/helper.c | 38 ++++++++++++++++++++++---------------- 1 file changed, 22 insertions(+), 16 deletions(-) diff --git a/target/arm/helper.c b/target/arm/helper.c index 8e148be..8190682 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -8418,6 +8418,13 @@ static bool get_phys_addr_pmsav5(CPUARMState *env, u= int32_t address, uint32_t base; bool is_user =3D regime_is_user(env, mmu_idx); =20 + if (regime_translation_disabled(env, mmu_idx)) { + /* MPU disabled. */ + *phys_ptr =3D address; + *prot =3D PAGE_READ | PAGE_WRITE | PAGE_EXEC; + return false; + } + *phys_ptr =3D address; for (n =3D 7; n >=3D 0; n--) { base =3D env->cp15.c6_region[n]; @@ -8567,16 +8574,20 @@ static bool get_phys_addr(CPUARMState *env, target_= ulong address, } } =20 - /* pmsav7 has special handling for when MPU is disabled so call it bef= ore - * the common MMU/MPU disabled check below. - */ - if (arm_feature(env, ARM_FEATURE_PMSA) && - arm_feature(env, ARM_FEATURE_V7)) { + if (arm_feature(env, ARM_FEATURE_PMSA)) { bool ret; *page_size =3D TARGET_PAGE_SIZE; - ret =3D get_phys_addr_pmsav7(env, address, access_type, mmu_idx, - phys_ptr, prot, fsr); - qemu_log_mask(CPU_LOG_MMU, "PMSAv7 MPU lookup for %s at 0x%08" PRI= x32 + + if (arm_feature(env, ARM_FEATURE_V7)) { + /* PMSAv7 */ + ret =3D get_phys_addr_pmsav7(env, address, access_type, mmu_id= x, + phys_ptr, prot, fsr); + } else { + /* Pre-v7 MPU */ + ret =3D get_phys_addr_pmsav5(env, address, access_type, mmu_id= x, + phys_ptr, prot, fsr); + } + qemu_log_mask(CPU_LOG_MMU, "PMSA MPU lookup for %s at 0x%08" PRIx32 " mmu_idx %u -> %s (prot %c%c%c)\n", access_type =3D=3D MMU_DATA_LOAD ? "reading" : (access_type =3D=3D MMU_DATA_STORE ? "writing" : "ex= ecute"), @@ -8589,21 +8600,16 @@ static bool get_phys_addr(CPUARMState *env, target_= ulong address, return ret; } =20 + /* Definitely a real MMU, not an MPU */ + if (regime_translation_disabled(env, mmu_idx)) { - /* MMU/MPU disabled. */ + /* MMU disabled. */ *phys_ptr =3D address; *prot =3D PAGE_READ | PAGE_WRITE | PAGE_EXEC; *page_size =3D TARGET_PAGE_SIZE; return 0; } =20 - if (arm_feature(env, ARM_FEATURE_PMSA)) { - /* Pre-v7 MPU */ - *page_size =3D TARGET_PAGE_SIZE; - return get_phys_addr_pmsav5(env, address, access_type, mmu_idx, - phys_ptr, prot, fsr); - } - if (regime_using_lpae_format(env, mmu_idx)) { return get_phys_addr_lpae(env, address, access_type, mmu_idx, phys= _ptr, attrs, prot, page_size, fsr, fi); --=20 2.7.4