[Qemu-devel] [PULL 0/8] target-mips queue

Yongbok Kim posted 8 patches 6 years, 7 months ago
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hw/mips/addr.c            | 12 ++++++++
hw/mips/mips_malta.c      | 24 +++++++--------
include/hw/mips/cpudevs.h |  5 ++--
target/mips/helper.c      | 27 +++++++++--------
target/mips/op_helper.c   |  5 ++--
target/mips/translate.c   | 74 ++++++++++++++++++++++++++++++-----------------
6 files changed, 90 insertions(+), 57 deletions(-)
[Qemu-devel] [PULL 0/8] target-mips queue
Posted by Yongbok Kim 6 years, 7 months ago
The following changes since commit aaaec6acad7cf97372d48c1b09126a09697519c8:

  Update version for v2.10.0-rc1 release (2017-08-02 16:36:32 +0100)

are available in the git repository at:

  git://github.com/yongbok/upstream-qemu.git tags/mips-20170803

for you to fetch changes up to d673a68db6963e86536b125af464bb6ed03eba33:

  target/mips: Fix RDHWR CC with icount (2017-08-02 22:18:13 +0100)

----------------------------------------------------------------
MIPS patches 2017-08-03

Changes:
KVM T&E segment support for TCG
malta: leave space for the bootmap after the initrd
Apply CP0.PageMask before writing into TLB entry
Fix fallout from indirect branch optimisation

----------------------------------------------------------------

Aurelien Jarno (1):
  mips/malta: leave space for the bootmap after the initrd

James Hogan (6):
  target-mips: Don't stop on [d]mtc0 DESAVE/KScratch
  mips: Improve segment defs for KVM T&E guests
  mips: Add KVM T&E segment support for TCG
  target/mips: Use BS_EXCP where interrupts are expected
  target/mips: Drop redundant gen_io_start/stop()
  target/mips: Fix RDHWR CC with icount

Leon Alrae (1):
  target-mips: apply CP0.PageMask before writing into TLB entry

 hw/mips/addr.c            | 12 ++++++++
 hw/mips/mips_malta.c      | 24 +++++++--------
 include/hw/mips/cpudevs.h |  5 ++--
 target/mips/helper.c      | 27 +++++++++--------
 target/mips/op_helper.c   |  5 ++--
 target/mips/translate.c   | 74 ++++++++++++++++++++++++++++++-----------------
 6 files changed, 90 insertions(+), 57 deletions(-)

-- 
2.7.4


Re: [Qemu-devel] [PULL 0/8] target-mips queue
Posted by Peter Maydell 6 years, 7 months ago
On 3 August 2017 at 15:45, Yongbok Kim <yongbok.kim@imgtec.com> wrote:
> The following changes since commit aaaec6acad7cf97372d48c1b09126a09697519c8:
>
>   Update version for v2.10.0-rc1 release (2017-08-02 16:36:32 +0100)
>
> are available in the git repository at:
>
>   git://github.com/yongbok/upstream-qemu.git tags/mips-20170803
>
> for you to fetch changes up to d673a68db6963e86536b125af464bb6ed03eba33:
>
>   target/mips: Fix RDHWR CC with icount (2017-08-02 22:18:13 +0100)
>
> ----------------------------------------------------------------
> MIPS patches 2017-08-03
>
> Changes:
> KVM T&E segment support for TCG
> malta: leave space for the bootmap after the initrd
> Apply CP0.PageMask before writing into TLB entry
> Fix fallout from indirect branch optimisation
>

Applied, thanks.

-- PMM