From nobody Mon Feb 9 22:38:35 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500022916860253.79628776814457; Fri, 14 Jul 2017 02:01:56 -0700 (PDT) Received: from localhost ([::1]:36348 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dVwTx-0002aV-OK for importer@patchew.org; Fri, 14 Jul 2017 05:01:53 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48079) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dVwAk-00028V-SO for qemu-devel@nongnu.org; Fri, 14 Jul 2017 04:42:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dVwAh-0003hO-OZ for qemu-devel@nongnu.org; Fri, 14 Jul 2017 04:42:02 -0400 Received: from roura.ac.upc.edu ([147.83.33.10]:43904 helo=roura.ac.upc.es) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dVwAh-0003h2-Ca for qemu-devel@nongnu.org; Fri, 14 Jul 2017 04:41:59 -0400 Received: from correu-1.ac.upc.es (correu-1.ac.upc.es [147.83.30.91]) by roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id v6E8ftiB008268; Fri, 14 Jul 2017 10:41:55 +0200 Received: from localhost (unknown [31.210.188.120]) by correu-1.ac.upc.es (Postfix) with ESMTPSA id 0A46A5C8; Fri, 14 Jul 2017 10:41:49 +0200 (CEST) From: =?utf-8?b?TGx1w61z?= Vilanova To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 11:41:48 +0300 Message-Id: <150002170871.22386.2172835658104140576.stgit@frigg.lan> X-Mailer: git-send-email 2.13.2 In-Reply-To: <150002001195.22386.4679134058536830996.stgit@frigg.lan> References: <150002001195.22386.4679134058536830996.stgit@frigg.lan> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by roura.ac.upc.es id v6E8ftiB008268 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy] X-Received-From: 147.83.33.10 Subject: [Qemu-devel] [PATCH v13 07/26] target/i386: [tcg] Port to breakpoint_check X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Peter Crosthwaite , "Emilio G. Cota" , Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Incrementally paves the way towards using the generic instruction translati= on loop. Signed-off-by: Llu=C3=ADs Vilanova Reviewed-by: Richard Henderson Reviewed-by: Emilio G. Cota --- target/i386/translate.c | 45 +++++++++++++++++++++++++++++++++----------= -- 1 file changed, 33 insertions(+), 12 deletions(-) diff --git a/target/i386/translate.c b/target/i386/translate.c index a4b9e5628f..d3df91041f 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -8455,6 +8455,25 @@ static void i386_tr_insn_start(DisasContextBase *dcb= ase, CPUState *cpu) tcg_gen_insn_start(dc->base.pc_next, dc->cc_op); } =20 +static bool i386_tr_breakpoint_check(DisasContextBase *dcbase, CPUState *c= pu, + const CPUBreakpoint *bp) +{ + DisasContext *dc =3D container_of(dcbase, DisasContext, base); + /* If RF is set, suppress an internally generated breakpoint. */ + int flags =3D dc->base.tb->flags & HF_RF_MASK ? BP_GDB : BP_ANY; + if (bp->flags & flags) { + gen_debug(dc, dc->base.pc_next - dc->cs_base); + /* The address covered by the breakpoint must be included in + [tb->pc, tb->pc + tb->size) in order to for it to be + properly cleared -- thus we increment the PC here so that + the logic setting tb->size below does the right thing. */ + dc->base.pc_next +=3D 1; + return true; + } else { + return false; + } +} + /* generate intermediate code for basic block 'tb'. */ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) { @@ -8485,18 +8504,21 @@ void gen_intermediate_code(CPUState *cs, Translatio= nBlock *tb) i386_tr_insn_start(&dc->base, cs); num_insns++; =20 - /* If RF is set, suppress an internally generated breakpoint. */ - if (unlikely(cpu_breakpoint_test(cs, dc->base.pc_next, - tb->flags & HF_RF_MASK - ? BP_GDB : BP_ANY))) { - gen_debug(dc, dc->base.pc_next - dc->cs_base); - /* The address covered by the breakpoint must be included in - [tb->pc, tb->pc + tb->size) in order to for it to be - properly cleared -- thus we increment the PC here so that - the logic setting tb->size below does the right thing. */ - dc->base.pc_next +=3D 1; - goto done_generating; + if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) { + CPUBreakpoint *bp; + QTAILQ_FOREACH(bp, &cs->breakpoints, entry) { + if (bp->pc =3D=3D dc->base.pc_next) { + if (i386_tr_breakpoint_check(&dc->base, cs, bp)) { + break; + } + } + } + + if (dc->base.is_jmp =3D=3D DISAS_NORETURN) { + break; + } } + if (num_insns =3D=3D max_insns && (tb->cflags & CF_LAST_IO)) { gen_io_start(); } @@ -8547,7 +8569,6 @@ void gen_intermediate_code(CPUState *cs, TranslationB= lock *tb) } if (tb->cflags & CF_LAST_IO) gen_io_end(); -done_generating: gen_tb_end(tb, num_insns); =20 #ifdef DEBUG_DISAS