From nobody Wed Nov 5 09:21:56 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1499633656295838.6923525855119; Sun, 9 Jul 2017 13:54:16 -0700 (PDT) Received: from localhost ([::1]:37431 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dUJDa-00033f-8e for importer@patchew.org; Sun, 09 Jul 2017 16:54:14 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58706) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dUJBq-0001pm-Q6 for qemu-devel@nongnu.org; Sun, 09 Jul 2017 16:52:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dUJBp-0005pR-LY for qemu-devel@nongnu.org; Sun, 09 Jul 2017 16:52:26 -0400 Received: from mx1.redhat.com ([209.132.183.28]:58136) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dUJBk-0005nt-LW; Sun, 09 Jul 2017 16:52:20 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 58BD83DD47; Sun, 9 Jul 2017 20:52:19 +0000 (UTC) Received: from localhost.localdomain.com (ovpn-116-31.ams2.redhat.com [10.36.116.31]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8D55B17DC6; Sun, 9 Jul 2017 20:52:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 58BD83DD47 Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=eric.auger@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 58BD83DD47 From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, peter.maydell@linaro.org, qemu-arm@nongnu.org, qemu-devel@nongnu.org, alex.williamson@redhat.com, prem.mallappa@gmail.com Date: Sun, 9 Jul 2017 22:51:28 +0200 Message-Id: <1499633493-19865-4-git-send-email-eric.auger@redhat.com> In-Reply-To: <1499633493-19865-1-git-send-email-eric.auger@redhat.com> References: <1499633493-19865-1-git-send-email-eric.auger@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Sun, 09 Jul 2017 20:52:19 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC v5 3/8] hw/arm/virt: Add SMMUv3 to the virt board X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mohun106@gmail.com, drjones@redhat.com, tcain@qti.qualcomm.com, Radha.Chintakuntla@cavium.com, Sunil.Goutham@cavium.com, mst@redhat.com, jean-philippe.brucker@arm.com, tn@semihalf.com, will.deacon@arm.com, robin.murphy@arm.com, peterx@redhat.com, edgar.iglesias@gmail.com, bharat.bhushan@nxp.com, christoffer.dall@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Prem Mallappa Add code to instantiate an smmu-v3 in mach-virt. A new boolean flag is introduced in VirtMachineState to allow this instantiation. It is currently false. Signed-off-by: Prem Mallappa Signed-off-by: Eric Auger --- v4 -> v5: - add dma-coherent property v2 -> v3: - vbi was removed. Use vms instead - migrate to new smmu binding format (iommu-map) - don't use appendprop anymore - add vms->smmu and guard instantiation with this latter - interrupts type changed to edge --- hw/arm/virt.c | 59 +++++++++++++++++++++++++++++++++++++++++++++++= ++++ include/hw/arm/virt.h | 4 ++++ 2 files changed, 63 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 010f724..d3848ae 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -56,6 +56,7 @@ #include "hw/smbios/smbios.h" #include "qapi/visitor.h" #include "standard-headers/linux/input.h" +#include "hw/arm/smmuv3.h" =20 #define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \ static void virt_##major##_##minor##_class_init(ObjectClass *oc, \ @@ -139,6 +140,7 @@ static const MemMapEntry a15memmap[] =3D { [VIRT_FW_CFG] =3D { 0x09020000, 0x00000018 }, [VIRT_GPIO] =3D { 0x09030000, 0x00001000 }, [VIRT_SECURE_UART] =3D { 0x09040000, 0x00001000 }, + [VIRT_SMMU] =3D { 0x09050000, 0x00020000 }, /* 128K, nee= ded */ [VIRT_MMIO] =3D { 0x0a000000, 0x00000200 }, /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that siz= e */ [VIRT_PLATFORM_BUS] =3D { 0x0c000000, 0x02000000 }, @@ -159,6 +161,7 @@ static const int a15irqmap[] =3D { [VIRT_SECURE_UART] =3D 8, [VIRT_MMIO] =3D 16, /* ...to 16 + NUM_VIRTIO_TRANSPORTS - 1 */ [VIRT_GIC_V2M] =3D 48, /* ...to 48 + NUM_GICV2M_SPIS - 1 */ + [VIRT_SMMU] =3D 74, /* ...to 74 + NUM_SMMU_IRQS - 1 */ [VIRT_PLATFORM_BUS] =3D 112, /* ...to 112 + PLATFORM_BUS_NUM_IRQS -1 */ }; =20 @@ -991,6 +994,53 @@ static void create_pcie_irq_map(const VirtMachineState= *vms, 0x7 /* PCI irq */); } =20 +static void alloc_smmu_phandle(VirtMachineState *vms) +{ + if (vms->smmu && !vms->smmu_phandle) { + vms->smmu_phandle =3D qemu_fdt_alloc_phandle(vms->fdt); + } +} + +static void create_smmu(const VirtMachineState *vms, qemu_irq *pic) +{ + char *smmu; + const char compat[] =3D "arm,smmu-v3"; + int irq =3D vms->irqmap[VIRT_SMMU]; + hwaddr base =3D vms->memmap[VIRT_SMMU].base; + hwaddr size =3D vms->memmap[VIRT_SMMU].size; + const char irq_names[] =3D "eventq\0priq\0cmdq-sync\0gerror"; + + if (!vms->smmu) { + return; + } + + sysbus_create_varargs("smmuv3", base, pic[irq], pic[irq + 1], + pic[irq + 2], pic[irq + 3], NULL); + + smmu =3D g_strdup_printf("/smmuv3@%" PRIx64, base); + qemu_fdt_add_subnode(vms->fdt, smmu); + qemu_fdt_setprop(vms->fdt, smmu, "compatible", compat, sizeof(compat)); + qemu_fdt_setprop_sized_cells(vms->fdt, smmu, "reg", 2, base, 2, size); + + qemu_fdt_setprop_cells(vms->fdt, smmu, "interrupts", + GIC_FDT_IRQ_TYPE_SPI, irq , GIC_FDT_IRQ_FLAGS_EDGE_LO_HI, + GIC_FDT_IRQ_TYPE_SPI, irq + 1, GIC_FDT_IRQ_FLAGS_EDGE_LO_HI, + GIC_FDT_IRQ_TYPE_SPI, irq + 2, GIC_FDT_IRQ_FLAGS_EDGE_LO_HI, + GIC_FDT_IRQ_TYPE_SPI, irq + 3, GIC_FDT_IRQ_FLAGS_EDGE_LO_HI); + + qemu_fdt_setprop(vms->fdt, smmu, "interrupt-names", irq_names, + sizeof(irq_names)); + + qemu_fdt_setprop_cell(vms->fdt, smmu, "clocks", vms->clock_phandle); + qemu_fdt_setprop_string(vms->fdt, smmu, "clock-names", "apb_pclk"); + qemu_fdt_setprop(vms->fdt, smmu, "dma-coherent", NULL, 0); + + qemu_fdt_setprop_cell(vms->fdt, smmu, "#iommu-cells", 1); + + qemu_fdt_setprop_cell(vms->fdt, smmu, "phandle", vms->smmu_phandle); + g_free(smmu); +} + static void create_pcie(const VirtMachineState *vms, qemu_irq *pic) { hwaddr base_mmio =3D vms->memmap[VIRT_PCIE_MMIO].base; @@ -1103,6 +1153,11 @@ static void create_pcie(const VirtMachineState *vms,= qemu_irq *pic) qemu_fdt_setprop_cell(vms->fdt, nodename, "#interrupt-cells", 1); create_pcie_irq_map(vms, vms->gic_phandle, irq, nodename); =20 + if (vms->smmu) { + qemu_fdt_setprop_cells(vms->fdt, nodename, "iommu-map", + 0x0, vms->smmu_phandle, 0x0, 0x10000); + } + g_free(nodename); } =20 @@ -1448,8 +1503,12 @@ static void machvirt_init(MachineState *machine) =20 create_rtc(vms, pic); =20 + alloc_smmu_phandle(vms); + create_pcie(vms, pic); =20 + create_smmu(vms, pic); + create_gpio(vms, pic); =20 /* Create mmio transports, so the user can create virtio backends diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h index 33b0ff3..164a531 100644 --- a/include/hw/arm/virt.h +++ b/include/hw/arm/virt.h @@ -38,6 +38,7 @@ =20 #define NUM_GICV2M_SPIS 64 #define NUM_VIRTIO_TRANSPORTS 32 +#define NUM_SMMU_IRQS 4 =20 #define ARCH_GICV3_MAINT_IRQ 9 =20 @@ -59,6 +60,7 @@ enum { VIRT_GIC_V2M, VIRT_GIC_ITS, VIRT_GIC_REDIST, + VIRT_SMMU, VIRT_UART, VIRT_MMIO, VIRT_RTC, @@ -95,6 +97,7 @@ typedef struct { bool highmem; bool its; bool virt; + bool smmu; int32_t gic_version; struct arm_boot_info bootinfo; const MemMapEntry *memmap; @@ -105,6 +108,7 @@ typedef struct { uint32_t clock_phandle; uint32_t gic_phandle; uint32_t msi_phandle; + uint32_t smmu_phandle; int psci_conduit; } VirtMachineState; =20 --=20 2.5.5