From nobody Wed Nov 5 09:28:04 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1499429657771472.8931180027481; Fri, 7 Jul 2017 05:14:17 -0700 (PDT) Received: from localhost ([::1]:56140 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dTS9G-0004py-5I for importer@patchew.org; Fri, 07 Jul 2017 08:14:14 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34863) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dTS8T-0004SM-S5 for qemu-devel@nongnu.org; Fri, 07 Jul 2017 08:13:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dTS8O-0002GZ-T0 for qemu-devel@nongnu.org; Fri, 07 Jul 2017 08:13:25 -0400 Received: from roura.ac.upc.edu ([147.83.33.10]:38156 helo=roura.ac.upc.es) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dTS8O-0002GR-Gz for qemu-devel@nongnu.org; Fri, 07 Jul 2017 08:13:20 -0400 Received: from correu-1.ac.upc.es (correu-1.ac.upc.es [147.83.30.91]) by roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id v67CDFCI020887; Fri, 7 Jul 2017 14:13:15 +0200 Received: from localhost (63.red-83-51-187.dynamicip.rima-tde.net [83.51.187.63]) by correu-1.ac.upc.es (Postfix) with ESMTPSA id 48193456; Fri, 7 Jul 2017 14:13:10 +0200 (CEST) From: =?utf-8?b?TGx1w61z?= Vilanova To: qemu-devel@nongnu.org Date: Fri, 7 Jul 2017 14:13:04 +0200 Message-Id: <149942958392.8972.9303636324674187059.stgit@frigg.lan> X-Mailer: git-send-email 2.13.2 In-Reply-To: <149942760788.8972.474351671751194003.stgit@frigg.lan> References: <149942760788.8972.474351671751194003.stgit@frigg.lan> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by roura.ac.upc.es id v67CDFCI020887 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy] X-Received-From: 147.83.33.10 Subject: [Qemu-devel] [PATCH v12 08/27] target/i386: [tcg] Port to breakpoint_check X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Peter Crosthwaite , "Emilio G. Cota" , Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Incrementally paves the way towards using the generic instruction translati= on loop. Signed-off-by: Llu=C3=ADs Vilanova Reviewed-by: Richard Henderson Reviewed-by: Emilio G. Cota --- target/i386/translate.c | 58 ++++++++++++++++++++++++++++++++++++++-----= ---- 1 file changed, 47 insertions(+), 11 deletions(-) diff --git a/target/i386/translate.c b/target/i386/translate.c index a4b9e5628f..d39e65e5b0 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -8455,6 +8455,25 @@ static void i386_tr_insn_start(DisasContextBase *dcb= ase, CPUState *cpu) tcg_gen_insn_start(dc->base.pc_next, dc->cc_op); } =20 +static BreakpointCheckType i386_tr_breakpoint_check( + DisasContextBase *dcbase, CPUState *cpu, const CPUBreakpoint *bp) +{ + DisasContext *dc =3D container_of(dcbase, DisasContext, base); + /* If RF is set, suppress an internally generated breakpoint. */ + int flags =3D dc->base.tb->flags & HF_RF_MASK ? BP_GDB : BP_ANY; + if (bp->flags & flags) { + gen_debug(dc, dc->base.pc_next - dc->cs_base); + /* The address covered by the breakpoint must be included in + [tb->pc, tb->pc + tb->size) in order to for it to be + properly cleared -- thus we increment the PC here so that + the logic setting tb->size below does the right thing. */ + dc->base.pc_next +=3D 1; + return BC_HIT_TB; + } else { + return BC_MISS; + } +} + /* generate intermediate code for basic block 'tb'. */ void gen_intermediate_code(CPUState *cs, TranslationBlock *tb) { @@ -8485,18 +8504,35 @@ void gen_intermediate_code(CPUState *cs, Translatio= nBlock *tb) i386_tr_insn_start(&dc->base, cs); num_insns++; =20 - /* If RF is set, suppress an internally generated breakpoint. */ - if (unlikely(cpu_breakpoint_test(cs, dc->base.pc_next, - tb->flags & HF_RF_MASK - ? BP_GDB : BP_ANY))) { - gen_debug(dc, dc->base.pc_next - dc->cs_base); - /* The address covered by the breakpoint must be included in - [tb->pc, tb->pc + tb->size) in order to for it to be - properly cleared -- thus we increment the PC here so that - the logic setting tb->size below does the right thing. */ - dc->base.pc_next +=3D 1; - goto done_generating; + if (unlikely(!QTAILQ_EMPTY(&cs->breakpoints))) { + CPUBreakpoint *bp; + QTAILQ_FOREACH(bp, &cs->breakpoints, entry) { + if (bp->pc =3D=3D dc->base.pc_next) { + BreakpointCheckType bp_check =3D + i386_tr_breakpoint_check(&dc->base, cs, bp); + switch (bp_check) { + case BC_MISS: + /* Target ignored this breakpoint, go to next */ + break; + case BC_HIT_INSN: + /* Hit, keep translating */ + /* + * TODO: if we're never going to have more than one + * BP in a single address, we can simply use= a + * bool here. + */ + goto done_breakpoints; + case BC_HIT_TB: + /* Hit, end TB */ + goto done_generating; + default: + g_assert_not_reached(); + } + } + } } + done_breakpoints: + if (num_insns =3D=3D max_insns && (tb->cflags & CF_LAST_IO)) { gen_io_start(); }