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[94.39.191.51]) by smtp.gmail.com with ESMTPSA id y5sm13613870wrd.52.2017.07.04.04.12.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 04 Jul 2017 04:12:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=8s6VzJEQM7UmeRSsAjHmfmz1/ccaSacn9TPCXiYy+B4=; b=mxZlMbiPusEWhhLsUVDSSBNf+gclHT8hQsSmSsrkuMi1c49NN/zvaoJvKXa54++sdn hv3PgBVoVJF0lh5hmAVmdYRO8sWoSD8+pSoM7G3WQmGgqB9QmiLdER+OCxS/c+kJdmN7 IhES+Yv3rPA+HgNgwWm2A3Ltq4dCRO1KHqKTk8eVcRUHbxFWaQFYdWpETCUE0mQrzj5d 7gyPQO3ppKhAOCXxWtA6TQd0YfpdS4nqn4aeCDWC8Xp6vRi+xyW1oF9dh+DBfWC23v8e UAHkn18LatbpIEsQiMphPBSEhbmt5ck827guD0ZTr9poy4S+OaCDxHDCTzlZyOdCTZmB KQ/Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=8s6VzJEQM7UmeRSsAjHmfmz1/ccaSacn9TPCXiYy+B4=; b=kqV3HmnCZNwswE19Q3YL9LePlr7o2RhJNUNGdp4SupY2g+T6OL+UriN7AXcE+xPeon ITKV7yP0Ekdtr/MNmOFRUApZPl2yXvDSVcBWyJsXOnrVY/h9zSwlSAdMQdAH6YEL0bh7 X94meQNm8sntHL+28NF311GnMwCL5R15tnjCd5fT3nQNXFXwUz+qZ4ZEurdxeEn0etmT oi1izHPYMqLO8W5M8BblQdOMaJSb2740pWef41pkvnseet3MxCGRxif8PEAXHmVu1uOl BIVHMKNoZfj1+hE8IxQTCo9ix0UV8uw4kSlXqdQt53DXi1F2vio/07L2izC84RfxXdyX Oxbw== X-Gm-Message-State: AKS2vOzPbzvtGjIX4WROp13HbILPa8QMEGPgHWfHWRFl072DrwnnLbj0 NKgluJj20qpXJ062T3s= X-Received: by 10.28.134.11 with SMTP id i11mr27416445wmd.77.1499166774295; Tue, 04 Jul 2017 04:12:54 -0700 (PDT) From: Paolo Bonzini To: qemu-devel@nongnu.org Date: Tue, 4 Jul 2017 13:12:11 +0200 Message-Id: <1499166735-39360-19-git-send-email-pbonzini@redhat.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1499166735-39360-1-git-send-email-pbonzini@redhat.com> References: <1499166735-39360-1-git-send-email-pbonzini@redhat.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c09::241 Subject: [Qemu-devel] [PATCH 18/22] target/i386: split cpu_set_mxcsr() and make cpu_set_fpuc() inline X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, thuth@redhat.com, a.rigo@virtualopensystems.com, anthony.xu@intel.com, rth@twiddle.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Yang Zhong Split the cpu_set_mxcsr() and make cpu_set_fpuc() inline with specific tcg code. Signed-off-by: Yang Zhong Signed-off-by: Paolo Bonzini Reviewed-by: Richard Henderson --- v2: renamed tcg_update_mxcsr [Richard], added missing call to cpu_post_load target/i386/cpu.h | 21 ++++++++++++++++++--- target/i386/fpu_helper.c | 11 ++--------- target/i386/machine.c | 5 ++++- 3 files changed, 24 insertions(+), 13 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 8b3b535..66a363f 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1594,7 +1594,6 @@ void QEMU_NORETURN raise_interrupt(CPUX86State *nenv,= int intno, int is_int, /* cc_helper.c */ extern const uint8_t parity_table[256]; uint32_t cpu_cc_compute_all(CPUX86State *env1, int op); -void update_fp_status(CPUX86State *env); =20 static inline uint32_t cpu_compute_eflags(CPUX86State *env) { @@ -1643,8 +1642,24 @@ static inline int32_t x86_get_a20_mask(CPUX86State *= env) } =20 /* fpu_helper.c */ -void cpu_set_mxcsr(CPUX86State *env, uint32_t val); -void cpu_set_fpuc(CPUX86State *env, uint16_t val); +void update_fp_status(CPUX86State *env); +void update_mxcsr_status(CPUX86State *env); + +static inline void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr) +{ + env->mxcsr =3D mxcsr; + if (tcg_enabled()) { + update_mxcsr_status(env); + } +} + +static inline void cpu_set_fpuc(CPUX86State *env, uint16_t fpuc) +{ + env->fpuc =3D fpuc; + if (tcg_enabled()) { + update_fp_status(env); + } +} =20 /* mem_helper.c */ void helper_lock_init(void); diff --git a/target/i386/fpu_helper.c b/target/i386/fpu_helper.c index 34fb5fc..9014b6f 100644 --- a/target/i386/fpu_helper.c +++ b/target/i386/fpu_helper.c @@ -1550,12 +1550,11 @@ void helper_xsetbv(CPUX86State *env, uint32_t ecx, = uint64_t mask) #define SSE_RC_CHOP 0x6000 #define SSE_FZ 0x8000 =20 -void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr) +void update_mxcsr_status(CPUX86State *env) { + uint32_t mxcsr =3D env->mxcsr; int rnd_type; =20 - env->mxcsr =3D mxcsr; - /* set rounding mode */ switch (mxcsr & SSE_RC_MASK) { default: @@ -1581,12 +1580,6 @@ void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr) set_flush_to_zero((mxcsr & SSE_FZ) ? 1 : 0, &env->fp_status); } =20 -void cpu_set_fpuc(CPUX86State *env, uint16_t val) -{ - env->fpuc =3D val; - update_fp_status(env); -} - void helper_ldmxcsr(CPUX86State *env, uint32_t val) { cpu_set_mxcsr(env, val); diff --git a/target/i386/machine.c b/target/i386/machine.c index 53587ae..e0417fe 100644 --- a/target/i386/machine.c +++ b/target/i386/machine.c @@ -280,7 +280,10 @@ static int cpu_post_load(void *opaque, int version_id) for(i =3D 0; i < 8; i++) { env->fptags[i] =3D (env->fptag_vmstate >> i) & 1; } - update_fp_status(env); + if (tcg_enabled()) { + update_fp_status(env); + update_mxcsr_status(env); + } =20 cpu_breakpoint_remove_all(cs, BP_CPU); cpu_watchpoint_remove_all(cs, BP_CPU); --=20 1.8.3.1