From nobody Mon Feb 9 06:49:14 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1499111966815609.2042098524159; Mon, 3 Jul 2017 12:59:26 -0700 (PDT) Received: from localhost ([::1]:37041 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dS7VF-00047H-GQ for importer@patchew.org; Mon, 03 Jul 2017 15:59:25 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47107) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dS7I0-0008Ke-U7 for qemu-devel@nongnu.org; Mon, 03 Jul 2017 15:45:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dS7Hw-0003HX-3j for qemu-devel@nongnu.org; Mon, 03 Jul 2017 15:45:44 -0400 Received: from mx1.redhat.com ([209.132.183.28]:34542) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dS7Hv-0003GT-PQ for qemu-devel@nongnu.org; Mon, 03 Jul 2017 15:45:40 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id AA9E67CE02; Mon, 3 Jul 2017 19:45:38 +0000 (UTC) Received: from redhat.com (ovpn-120-211.rdu2.redhat.com [10.10.120.211]) by smtp.corp.redhat.com (Postfix) with SMTP id 2D8F0692A5; Mon, 3 Jul 2017 19:45:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com AA9E67CE02 Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=mst@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com AA9E67CE02 Date: Mon, 3 Jul 2017 22:45:35 +0300 From: "Michael S. Tsirkin" To: qemu-devel@nongnu.org Message-ID: <1499111049-13721-14-git-send-email-mst@redhat.com> References: <1499111049-13721-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1499111049-13721-1-git-send-email-mst@redhat.com> X-Mutt-Fcc: =sent X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Mon, 03 Jul 2017 19:45:38 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 13/21] fw_cfg: don't map the fw_cfg IO ports in fw_cfg_io_realize() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Gabriel Somlo , Mark Cave-Ayland , Marcel Apfelbaum , Laszlo Ersek Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Mark Cave-Ayland As indicated by Laszlo it is a QOM bug for the realize() method to actually map the device. Set up the IO regions within fw_cfg_io_realize() and defer the mapping with sysbus_add_io() to the caller, as already done in fw_cfg_init_mem_wide(). This makes the iobase and dma_iobase properties now obsolete so they can be removed. Signed-off-by: Mark Cave-Ayland Reviewed-by: Laszlo Ersek Reviewed-by: Eduardo Habkost Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Tested-by: Gabriel Somlo --- hw/nvram/fw_cfg.c | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/nvram/fw_cfg.c b/hw/nvram/fw_cfg.c index 316fca9..4e4f71a 100644 --- a/hw/nvram/fw_cfg.c +++ b/hw/nvram/fw_cfg.c @@ -96,7 +96,6 @@ struct FWCfgIoState { /*< public >*/ =20 MemoryRegion comb_iomem; - uint32_t iobase, dma_iobase; }; =20 struct FWCfgMemState { @@ -936,24 +935,30 @@ FWCfgState *fw_cfg_init_io_dma(uint32_t iobase, uint3= 2_t dma_iobase, AddressSpace *dma_as) { DeviceState *dev; + SysBusDevice *sbd; + FWCfgIoState *ios; FWCfgState *s; uint32_t version =3D FW_CFG_VERSION; bool dma_requested =3D dma_iobase && dma_as; =20 dev =3D qdev_create(NULL, TYPE_FW_CFG_IO); - qdev_prop_set_uint32(dev, "iobase", iobase); - qdev_prop_set_uint32(dev, "dma_iobase", dma_iobase); if (!dma_requested) { qdev_prop_set_bit(dev, "dma_enabled", false); } =20 fw_cfg_init1(dev); + + sbd =3D SYS_BUS_DEVICE(dev); + ios =3D FW_CFG_IO(dev); + sysbus_add_io(sbd, iobase, &ios->comb_iomem); + s =3D FW_CFG(dev); =20 if (s->dma_enabled) { /* 64 bits for the address field */ s->dma_as =3D dma_as; s->dma_addr =3D 0; + sysbus_add_io(sbd, dma_iobase, &s->dma_iomem); =20 version |=3D FW_CFG_VERSION_DMA; } @@ -1059,8 +1064,6 @@ static void fw_cfg_file_slots_allocate(FWCfgState *s,= Error **errp) } =20 static Property fw_cfg_io_properties[] =3D { - DEFINE_PROP_UINT32("iobase", FWCfgIoState, iobase, -1), - DEFINE_PROP_UINT32("dma_iobase", FWCfgIoState, dma_iobase, -1), DEFINE_PROP_BOOL("dma_enabled", FWCfgIoState, parent_obj.dma_enabled, true), DEFINE_PROP_UINT16("x-file-slots", FWCfgIoState, parent_obj.file_slots, @@ -1071,7 +1074,6 @@ static Property fw_cfg_io_properties[] =3D { static void fw_cfg_io_realize(DeviceState *dev, Error **errp) { FWCfgIoState *s =3D FW_CFG_IO(dev); - SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev); Error *local_err =3D NULL; =20 fw_cfg_file_slots_allocate(FW_CFG(s), &local_err); @@ -1085,13 +1087,11 @@ static void fw_cfg_io_realize(DeviceState *dev, Err= or **errp) * of the i/o region used is FW_CFG_CTL_SIZE */ memory_region_init_io(&s->comb_iomem, OBJECT(s), &fw_cfg_comb_mem_ops, FW_CFG(s), "fwcfg", FW_CFG_CTL_SIZE); - sysbus_add_io(sbd, s->iobase, &s->comb_iomem); =20 if (FW_CFG(s)->dma_enabled) { memory_region_init_io(&FW_CFG(s)->dma_iomem, OBJECT(s), &fw_cfg_dma_mem_ops, FW_CFG(s), "fwcfg.dma", sizeof(dma_addr_t)); - sysbus_add_io(sbd, s->dma_iobase, &FW_CFG(s)->dma_iomem); } } =20 --=20 MST