From nobody Mon Feb 9 01:22:38 2026 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1499077278235821.8872654140647; Mon, 3 Jul 2017 03:21:18 -0700 (PDT) Received: from localhost ([::1]:33822 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dRyTk-0007Xn-Th for importer@patchew.org; Mon, 03 Jul 2017 06:21:16 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57923) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dRyM5-0000Hp-JH for qemu-devel@nongnu.org; Mon, 03 Jul 2017 06:13:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dRyM4-0001kG-Ko for qemu-devel@nongnu.org; Mon, 03 Jul 2017 06:13:21 -0400 Received: from mga01.intel.com ([192.55.52.88]:14583) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dRyM4-0001cL-BW for qemu-devel@nongnu.org; Mon, 03 Jul 2017 06:13:20 -0400 Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 03 Jul 2017 03:13:20 -0700 Received: from yangzhon-virtual.bj.intel.com ([10.238.145.52]) by fmsmga005.fm.intel.com with ESMTP; 03 Jul 2017 03:13:18 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.40,302,1496127600"; d="scan'208";a="121724184" From: Yang Zhong To: pbonzini@redhat.com, rth@twiddle.net, thuth@redhat.com Date: Mon, 3 Jul 2017 18:12:19 +0800 Message-Id: <1499076743-15477-12-git-send-email-yang.zhong@intel.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1499076743-15477-1-git-send-email-yang.zhong@intel.com> References: <1499076743-15477-1-git-send-email-yang.zhong@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.88 Subject: [Qemu-devel] [PATCH v2 11/15] tcg: split cpu_set_mxcsr() and make cpu_set_fpuc() inline X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: yang.zhong@intel.com, anthony.xu@intel.com, qemu-devel@nongnu.org, a.rigo@virtualopensystems.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_6 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Split the cpu_set_mxcsr() and make cpu_set_fpuc() inline with specific tcg code. Signed-off-by: Yang Zhong --- target/i386/cpu.h | 18 ++++++++++++++++-- target/i386/fpu_helper.c | 11 ++--------- 2 files changed, 18 insertions(+), 11 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 8b3b535..67a6091 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1643,8 +1643,22 @@ static inline int32_t x86_get_a20_mask(CPUX86State *= env) } =20 /* fpu_helper.c */ -void cpu_set_mxcsr(CPUX86State *env, uint32_t val); -void cpu_set_fpuc(CPUX86State *env, uint16_t val); +void tcg_update_mxcsr(CPUX86State *env); +static inline void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr) +{ + env->mxcsr =3D mxcsr; + if (tcg_enabled()) { + tcg_update_mxcsr(env); + } +} + +static inline void cpu_set_fpuc(CPUX86State *env, uint16_t fpuc) +{ + env->fpuc =3D fpuc; + if (tcg_enabled()) { + update_fp_status(env); + } +} =20 /* mem_helper.c */ void helper_lock_init(void); diff --git a/target/i386/fpu_helper.c b/target/i386/fpu_helper.c index 34fb5fc..f0facb9 100644 --- a/target/i386/fpu_helper.c +++ b/target/i386/fpu_helper.c @@ -1550,12 +1550,11 @@ void helper_xsetbv(CPUX86State *env, uint32_t ecx, = uint64_t mask) #define SSE_RC_CHOP 0x6000 #define SSE_FZ 0x8000 =20 -void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr) +void tcg_update_mxcsr(CPUX86State *env) { + uint32_t mxcsr =3D env->mxcsr; int rnd_type; =20 - env->mxcsr =3D mxcsr; - /* set rounding mode */ switch (mxcsr & SSE_RC_MASK) { default: @@ -1581,12 +1580,6 @@ void cpu_set_mxcsr(CPUX86State *env, uint32_t mxcsr) set_flush_to_zero((mxcsr & SSE_FZ) ? 1 : 0, &env->fp_status); } =20 -void cpu_set_fpuc(CPUX86State *env, uint16_t val) -{ - env->fpuc =3D val; - update_fp_status(env); -} - void helper_ldmxcsr(CPUX86State *env, uint32_t val) { cpu_set_mxcsr(env, val); --=20 1.9.1