From nobody Mon Feb 9 16:19:44 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498768536992968.2586038125571; Thu, 29 Jun 2017 13:35:36 -0700 (PDT) Received: from localhost ([::1]:41171 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dQgA3-0003Jq-QY for importer@patchew.org; Thu, 29 Jun 2017 16:35:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43346) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dQg4q-0007E2-AL for qemu-devel@nongnu.org; Thu, 29 Jun 2017 16:30:13 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dQg4n-0000zr-Cv for qemu-devel@nongnu.org; Thu, 29 Jun 2017 16:30:12 -0400 Received: from out5-smtp.messagingengine.com ([66.111.4.29]:51713) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dQg4n-0000zH-9H for qemu-devel@nongnu.org; Thu, 29 Jun 2017 16:30:09 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id C1F5720C9B; Thu, 29 Jun 2017 16:30:07 -0400 (EDT) Received: from frontend1 ([10.202.2.160]) by compute4.internal (MEProxy); Thu, 29 Jun 2017 16:30:07 -0400 Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id 7FD537E847; Thu, 29 Jun 2017 16:30:07 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc:x-sasl-enc; s=mesmtp; bh=yvj X7ISvjeTB4z/kdarpYZzaVqE1bgJ8MBOTfXQ9IkE=; b=tySYFgI9VpDdMPXc1+e MhsYmVIXyUTxyUfQZZlzrKxDh+4Dk0SfMIMA/pgUL0fbNCziotizJp42tMwsslJ0 t9flp6qxKzFFKUuhw9tk3GHFPfotZyz2JTE20dGeYDgyOWAwoPvEUlXogLwvrx+u /s+3AOnTCK+KBJBO0rSI4SnE= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc :x-sasl-enc; s=fm1; bh=yvjX7ISvjeTB4z/kdarpYZzaVqE1bgJ8MBOTfXQ9I kE=; b=kDAhhXnWCyUwBwtXdWnHelyFELeWIi2yO+BuTdJ5wcCXIkbHcq81Y5BqS eRR5IjjplNHJd2SDb0i0GN1nBgr3TzuxgXCSU5Aao4UTB842CbbkhCovWwM6O3dU sIswqthjIaW1RKs0y38+Diqrc5D+okT7oA6hzY7Id8442xmueLM1bS5LMuWTxKc2 vU7VYL+i9I7ovVGqWotRvsKHMpxNnnXTZuYJ7AZIrWamzPLUOzT+C6sDWn+RkaSl qpnbT3xjEnt93ymm7t8c0NgwEKrTK866ioEs+t82buWrhxflVd4yqCtcdJpPGioi TBMcqSY0/M9QqXBPALjvhgnyEOqQw== X-ME-Sender: X-Sasl-enc: 1DTHHkBijsG0uf8Oy96GMvNGPazbWvzWtahOXTtH8XeZ 1498768207 From: "Emilio G. Cota" To: qemu-devel@nongnu.org Date: Thu, 29 Jun 2017 16:28:29 -0400 Message-Id: <1498768109-4092-8-git-send-email-cota@braap.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1498768109-4092-1-git-send-email-cota@braap.org> References: <1498768109-4092-1-git-send-email-cota@braap.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.111.4.29 Subject: [Qemu-devel] [RFC 7/7] [XXX] translate-all: generate TCG code without holding tb_lock X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Generate new TBs without holding tb_lock, which should increase scalability when running MTTCG for workloads that generate a lot of code (e.g. booting linux). XXX: Doesn't work :-) See the commit log from the previous patch. Signed-off-by: Emilio G. Cota --- accel/tcg/cpu-exec.c | 8 +++++++- accel/tcg/translate-all.c | 18 ++++++++++++++++-- 2 files changed, 23 insertions(+), 3 deletions(-) diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 54ecae2..47f0882 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -351,6 +351,7 @@ static inline TranslationBlock *tb_find(CPUState *cpu, * single threaded the locks are NOPs. */ mmap_lock(); +#ifdef CONFIG_USER_ONLY tb_lock(); have_tb_lock =3D true; =20 @@ -362,7 +363,12 @@ static inline TranslationBlock *tb_find(CPUState *cpu, /* if no translated code available, then translate it now = */ tb =3D tb_gen_code(cpu, pc, cs_base, flags, 0); } - +#else + /* tb_gen_code will acquire tb_lock. + * Just for the diff: note that have_tb_lock is local to tb_fi= nd! */ + have_tb_lock =3D true; + tb =3D tb_gen_code(cpu, pc, cs_base, flags, 0); +#endif mmap_unlock(); } =20 diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c index 125b1a8..da29bcc 100644 --- a/accel/tcg/translate-all.c +++ b/accel/tcg/translate-all.c @@ -878,8 +878,6 @@ static TranslationBlock *tb_alloc(target_ulong pc) { TranslationBlock *tb; =20 - assert_tb_locked(); - tb =3D tcg_tb_alloc(&tcg_ctx); if (unlikely(tb =3D=3D NULL)) { return NULL; @@ -1314,7 +1312,9 @@ TranslationBlock *tb_gen_code(CPUState *cpu, #ifdef CONFIG_PROFILER int64_t ti; #endif +#ifdef CONFIG_USER_ONLY assert_memory_lock(); +#endif =20 phys_pc =3D get_page_addr_code(env, pc); if (use_icount && !(cflags & CF_IGNORE_ICOUNT)) { @@ -1429,6 +1429,20 @@ TranslationBlock *tb_gen_code(CPUState *cpu, if ((pc & TARGET_PAGE_MASK) !=3D virt_page2) { phys_page2 =3D get_page_addr_code(env, virt_page2); } + if (!have_tb_lock) { + TranslationBlock *t; + + tb_lock(); + /* + * There's a chance that our desired tb has been translated while + * we were translating it. + */ + t =3D tb_htable_lookup(cpu, pc, cs_base, flags); + if (unlikely(t)) { + /* this is very unlikely so just waste the TB space we just us= ed */ + return t; + } + } /* As long as consistency of the TB stuff is provided by tb_lock in us= er * mode and is implicit in single-threaded softmmu emulation, no expli= cit * memory barrier is required before tb_link_page() makes the TB visib= le --=20 2.7.4