From nobody Mon Feb 9 18:19:03 2026 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498654007003350.41883489087127; Wed, 28 Jun 2017 05:46:47 -0700 (PDT) Received: from localhost ([::1]:33142 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dQCMn-0000nu-Qc for importer@patchew.org; Wed, 28 Jun 2017 08:46:45 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45755) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dQCLO-0008OK-Kv for qemu-devel@nongnu.org; Wed, 28 Jun 2017 08:45:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dQCLL-0007Sj-JZ for qemu-devel@nongnu.org; Wed, 28 Jun 2017 08:45:18 -0400 Received: from roura.ac.upc.es ([147.83.33.10]:57159) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dQCLL-0007SL-6b for qemu-devel@nongnu.org; Wed, 28 Jun 2017 08:45:15 -0400 Received: from correu-1.ac.upc.es (correu-1.ac.upc.es [147.83.30.91]) by roura.ac.upc.es (8.13.8/8.13.8) with ESMTP id v5SCj1lG026222; Wed, 28 Jun 2017 14:45:06 +0200 Received: from localhost (unknown [132.68.50.243]) by correu-1.ac.upc.es (Postfix) with ESMTPSA id B4586165; Wed, 28 Jun 2017 14:44:55 +0200 (CEST) From: =?utf-8?b?TGx1w61z?= Vilanova To: qemu-devel@nongnu.org Date: Wed, 28 Jun 2017 15:44:54 +0300 Message-Id: <149865389443.17063.5223786571159875501.stgit@frigg.lan> X-Mailer: git-send-email 2.11.0 In-Reply-To: <149865219962.17063.10630533069463266646.stgit@frigg.lan> References: <149865219962.17063.10630533069463266646.stgit@frigg.lan> User-Agent: StGit/0.17.1-dirty MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by roura.ac.upc.es id v5SCj1lG026222 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6.x [fuzzy] X-Received-From: 147.83.33.10 Subject: [Qemu-devel] [PATCH v11 07/29] target/i386: [tcg] Refactor init_globals X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eduardo Habkost , Peter Crosthwaite , "Emilio G. Cota" , Paolo Bonzini , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Incrementally paves the way towards using the generic instruction translati= on loop. Signed-off-by: Llu=C3=ADs Vilanova Reviewed-by: Emilio G. Cota Reviewed-by: Richard Henderson --- target/i386/translate.c | 29 +++++++++++++++++------------ 1 file changed, 17 insertions(+), 12 deletions(-) diff --git a/target/i386/translate.c b/target/i386/translate.c index 04453ce48a..d015ea73fa 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -8435,6 +8435,22 @@ static void i386_trblock_init_disas_context(DisasCon= textBase *dcbase, CPUState * #endif } =20 +static void i386_trblock_init_globals(DisasContextBase *dcbase, CPUState *= cpu) +{ + cpu_T0 =3D tcg_temp_new(); + cpu_T1 =3D tcg_temp_new(); + cpu_A0 =3D tcg_temp_new(); + + cpu_tmp0 =3D tcg_temp_new(); + cpu_tmp1_i64 =3D tcg_temp_new_i64(); + cpu_tmp2_i32 =3D tcg_temp_new_i32(); + cpu_tmp3_i32 =3D tcg_temp_new_i32(); + cpu_tmp4 =3D tcg_temp_new(); + cpu_ptr0 =3D tcg_temp_new_ptr(); + cpu_ptr1 =3D tcg_temp_new_ptr(); + cpu_cc_srcT =3D tcg_temp_local_new(); +} + /* generate intermediate code for basic block 'tb'. */ void gen_intermediate_code(CPUState *cpu, TranslationBlock *tb) { @@ -8451,18 +8467,7 @@ void gen_intermediate_code(CPUState *cpu, Translatio= nBlock *tb) dc->base.pc_next =3D dc->base.pc_first; i386_trblock_init_disas_context(&dc->base, cpu); =20 - cpu_T0 =3D tcg_temp_new(); - cpu_T1 =3D tcg_temp_new(); - cpu_A0 =3D tcg_temp_new(); - - cpu_tmp0 =3D tcg_temp_new(); - cpu_tmp1_i64 =3D tcg_temp_new_i64(); - cpu_tmp2_i32 =3D tcg_temp_new_i32(); - cpu_tmp3_i32 =3D tcg_temp_new_i32(); - cpu_tmp4 =3D tcg_temp_new(); - cpu_ptr0 =3D tcg_temp_new_ptr(); - cpu_ptr1 =3D tcg_temp_new_ptr(); - cpu_cc_srcT =3D tcg_temp_local_new(); + i386_trblock_init_globals(&dc->base, cpu); =20 num_insns =3D 0; max_insns =3D tb->cflags & CF_COUNT_MASK;