From nobody Wed Nov 5 16:38:16 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1496975354768686.1866083514007; Thu, 8 Jun 2017 19:29:14 -0700 (PDT) Received: from localhost ([::1]:52310 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dJ9fl-0003VF-AS for importer@patchew.org; Thu, 08 Jun 2017 22:29:13 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51686) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dJ9cC-0000Y6-5R for qemu-devel@nongnu.org; Thu, 08 Jun 2017 22:25:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dJ9c8-000698-Tp for qemu-devel@nongnu.org; Thu, 08 Jun 2017 22:25:32 -0400 Received: from out1-smtp.messagingengine.com ([66.111.4.25]:41937) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dJ9c8-00068L-DE for qemu-devel@nongnu.org; Thu, 08 Jun 2017 22:25:28 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id 6833620A77; Thu, 8 Jun 2017 22:25:26 -0400 (EDT) Received: from frontend2 ([10.202.2.161]) by compute4.internal (MEProxy); Thu, 08 Jun 2017 22:25:26 -0400 Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id 31CA8241E0; Thu, 8 Jun 2017 22:25:26 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h=cc :date:from:in-reply-to:message-id:references:subject:to :x-me-sender:x-me-sender:x-sasl-enc:x-sasl-enc; s=mesmtp; bh=mYy Kzv0btgMO/qI0NwFIzPfem35Xg1xfHrXvdyIITv8=; b=sRdhekMUorPZXmaABtw Yj0xQZ33CJbhUUwrdTpB0v3RMc+C2u7Mg0ud/iKijesqqjkOlRWDGVqwAetwztaM d9Z2FdyJcX7UeZnPPDZJjmzSqI4TT8dxGiSCTGpgmeLYESlYBaRYdlKIwxZwEqac Y0ABKD3tmvtlIDhJ2E+Fx6ro= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc :x-sasl-enc; s=fm1; bh=mYyKzv0btgMO/qI0NwFIzPfem35Xg1xfHrXvdyIIT v8=; b=GvJvZnFaK84seP0+o2JwA7Et27TzolRYPxA9rH2m+L2Xy37mWiYGB/6n/ JAeuOPaZkx5fvXgZIppWJQVqHsh6fHTEQwXzxd8nlN4IT2ixiCTyRLgzZXBJPc0A ClZkcnX5xuiHF9lSSHXdbY5sH3/PnhyFA0t8h6moRE8iXOsPYkBz01vU5Ph95fZf m7g+xpvZKry8tIuiB/NNSjk3esxCXe1pWgeOUMWd7sV8RWXea3EYQgPxFi4UcF7t uYp3SFjUrN6eiz4gQxnL4MyMHagDEGvo2+385rvwT4jXnJjIyKgMQb82auvj2zD4 FiuQ1XVI1lYMRCi2amN0BSXlqBhKw== X-ME-Sender: X-Sasl-enc: l8Yfhf30dWFY0CvVmR7uNXYzNnMwbrCB/N6QSk7/fYRU 1496975126 From: "Emilio G. Cota" To: qemu-devel@nongnu.org Date: Thu, 8 Jun 2017 22:25:17 -0400 Message-Id: <1496975122-16999-3-git-send-email-cota@braap.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1496975122-16999-1-git-send-email-cota@braap.org> References: <1496975122-16999-1-git-send-email-cota@braap.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.111.4.25 Subject: [Qemu-devel] [PATCH v8 2/7] cpu: allocate cpu->trace_dstate in place X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Llu=C3=ADs=20Vilanova?= , Stefan Hajnoczi , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" There's little point in dynamically allocating the bitmap if we know at compile-time the max number of events we want to support. Thus, make room in the struct for the bitmap, which will make things easier later: this paves the way for upcoming changes, in which we'll use a u32 to fully capture cpu->trace_dstate. This change also increases performance by saving a dereference and improving locality--note that this is important since upcoming work makes reading this bitmap fairly common. Signed-off-by: Emilio G. Cota Reviewed-by: Llu=C3=ADs Vilanova --- include/qom/cpu.h | 9 +++------ qom/cpu.c | 8 -------- trace/control.c | 9 ++++++++- 3 files changed, 11 insertions(+), 15 deletions(-) diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 89ddb68..bc6e20f 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -259,6 +259,7 @@ typedef void (*run_on_cpu_func)(CPUState *cpu, run_on_c= pu_data data); struct qemu_work_item; =20 #define CPU_UNSET_NUMA_NODE_ID -1 +#define CPU_TRACE_DSTATE_MAX_EVENTS 32 =20 /** * CPUState: @@ -373,12 +374,8 @@ struct CPUState { struct KVMState *kvm_state; struct kvm_run *kvm_run; =20 - /* - * Used for events with 'vcpu' and *without* the 'disabled' properties. - * Dynamically allocated based on bitmap requried to hold up to - * trace_get_vcpu_event_count() entries. - */ - unsigned long *trace_dstate; + /* Used for events with 'vcpu' and *without* the 'disabled' properties= */ + DECLARE_BITMAP(trace_dstate, CPU_TRACE_DSTATE_MAX_EVENTS); =20 /* TODO Move common fields from CPUArchState here. */ int cpu_index; /* used by alpha TCG */ diff --git a/qom/cpu.c b/qom/cpu.c index 5069876..69fbb9c 100644 --- a/qom/cpu.c +++ b/qom/cpu.c @@ -382,7 +382,6 @@ static void cpu_common_unrealizefn(DeviceState *dev, Er= ror **errp) =20 static void cpu_common_initfn(Object *obj) { - uint32_t count; CPUState *cpu =3D CPU(obj); CPUClass *cc =3D CPU_GET_CLASS(obj); =20 @@ -397,18 +396,11 @@ static void cpu_common_initfn(Object *obj) QTAILQ_INIT(&cpu->breakpoints); QTAILQ_INIT(&cpu->watchpoints); =20 - count =3D trace_get_vcpu_event_count(); - if (count) { - cpu->trace_dstate =3D bitmap_new(count); - } - cpu_exec_initfn(cpu); } =20 static void cpu_common_finalize(Object *obj) { - CPUState *cpu =3D CPU(obj); - g_free(cpu->trace_dstate); } =20 static int64_t cpu_common_get_arch_id(CPUState *cpu) diff --git a/trace/control.c b/trace/control.c index 9b157b0..83740aa 100644 --- a/trace/control.c +++ b/trace/control.c @@ -65,8 +65,15 @@ void trace_event_register_group(TraceEvent **events) size_t i; for (i =3D 0; events[i] !=3D NULL; i++) { events[i]->id =3D next_id++; - if (events[i]->vcpu_id !=3D TRACE_VCPU_EVENT_NONE) { + if (events[i]->vcpu_id =3D=3D TRACE_VCPU_EVENT_NONE) { + continue; + } + + if (likely(next_vcpu_id < CPU_TRACE_DSTATE_MAX_EVENTS)) { events[i]->vcpu_id =3D next_vcpu_id++; + } else { + error_report("WARNING: too many vcpu trace events; dropping '%= s'", + events[i]->name); } } event_groups =3D g_renew(TraceEventGroup, event_groups, nevent_groups = + 1); --=20 2.7.4