From nobody Wed Nov 5 16:33:12 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1496950709879230.65060444151982; Thu, 8 Jun 2017 12:38:29 -0700 (PDT) Received: from localhost ([::1]:51198 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dJ3GG-00036w-9Y for importer@patchew.org; Thu, 08 Jun 2017 15:38:28 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:59206) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dJ3EX-0001VB-48 for qemu-devel@nongnu.org; Thu, 08 Jun 2017 15:36:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dJ3ET-0007o4-5t for qemu-devel@nongnu.org; Thu, 08 Jun 2017 15:36:41 -0400 Received: from mx1.redhat.com ([209.132.183.28]:39958) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dJ3ES-0007nn-Sy for qemu-devel@nongnu.org; Thu, 08 Jun 2017 15:36:37 -0400 Received: from smtp.corp.redhat.com (int-mx04.intmail.prod.int.phx2.redhat.com [10.5.11.14]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id E2A0426B01; Thu, 8 Jun 2017 19:36:35 +0000 (UTC) Received: from redhat.com (ovpn-120-5.rdu2.redhat.com [10.10.120.5]) by smtp.corp.redhat.com (Postfix) with SMTP id 0EDBE179D3; Thu, 8 Jun 2017 19:36:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com E2A0426B01 Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=mst@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com E2A0426B01 Date: Thu, 8 Jun 2017 22:36:32 +0300 From: "Michael S. Tsirkin" To: qemu-devel@nongnu.org Message-ID: <1496950567-26343-4-git-send-email-mst@redhat.com> References: <1496950567-26343-1-git-send-email-mst@redhat.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <1496950567-26343-1-git-send-email-mst@redhat.com> X-Mutt-Fcc: =sent X-Scanned-By: MIMEDefang 2.79 on 10.5.11.14 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Thu, 08 Jun 2017 19:36:36 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PULL 3/3] hw/pcie: fix the generic pcie root port to support migration X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , Peter Maydell , "Dr . David Alan Gilbert" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" From: Marcel Apfelbaum Add msix state to pcie-root-ports's vmstate in order to support migration. Signed-off-by: Marcel Apfelbaum Reviewed-by: Dr. David Alan Gilbert Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/compat.h | 4 ++++ hw/pci-bridge/gen_pcie_root_port.c | 25 +++++++++++++++++++++++++ 2 files changed, 29 insertions(+) diff --git a/include/hw/compat.h b/include/hw/compat.h index 400c64b..26cd585 100644 --- a/include/hw/compat.h +++ b/include/hw/compat.h @@ -14,6 +14,10 @@ .driver =3D "virtio-net-device",\ .property =3D "x-mtu-bypass-backend",\ .value =3D "off",\ + },{\ + .driver =3D "pcie-root-port",\ + .property =3D "x-migrate-msix",\ + .value =3D "false",\ }, =20 #define HW_COMPAT_2_8 \ diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_ro= ot_port.c index 8ebffa8..cb694d6 100644 --- a/hw/pci-bridge/gen_pcie_root_port.c +++ b/hw/pci-bridge/gen_pcie_root_port.c @@ -20,6 +20,14 @@ #define GEN_PCIE_ROOT_PORT_AER_OFFSET 0x100 #define GEN_PCIE_ROOT_PORT_MSIX_NR_VECTOR 1 =20 +typedef struct GenPCIERootPort { + /*< private >*/ + PCIESlot parent_obj; + /*< public >*/ + + bool migrate_msix; +} GenPCIERootPort; + static uint8_t gen_rp_aer_vector(const PCIDevice *d) { return 0; @@ -45,6 +53,13 @@ static void gen_rp_interrupts_uninit(PCIDevice *d) msix_uninit_exclusive_bar(d); } =20 +static bool gen_rp_test_migrate_msix(void *opaque, int version_id) +{ + GenPCIERootPort *rp =3D opaque; + + return rp->migrate_msix; +} + static const VMStateDescription vmstate_rp_dev =3D { .name =3D "pcie-root-port", .version_id =3D 1, @@ -54,10 +69,18 @@ static const VMStateDescription vmstate_rp_dev =3D { VMSTATE_PCI_DEVICE(parent_obj.parent_obj.parent_obj, PCIESlot), VMSTATE_STRUCT(parent_obj.parent_obj.parent_obj.exp.aer_log, PCIESlot, 0, vmstate_pcie_aer_log, PCIEAERLog), + VMSTATE_MSIX_TEST(parent_obj.parent_obj.parent_obj.parent_obj, + GenPCIERootPort, + gen_rp_test_migrate_msix), VMSTATE_END_OF_LIST() } }; =20 +static Property gen_rp_props[] =3D { + DEFINE_PROP_BOOL("x-migrate-msix", GenPCIERootPort, migrate_msix, true= ), + DEFINE_PROP_END_OF_LIST() +}; + static void gen_rp_dev_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); @@ -68,6 +91,7 @@ static void gen_rp_dev_class_init(ObjectClass *klass, voi= d *data) k->device_id =3D PCI_DEVICE_ID_REDHAT_PCIE_RP; dc->desc =3D "PCI Express Root Port"; dc->vmsd =3D &vmstate_rp_dev; + dc->props =3D gen_rp_props; rpc->aer_vector =3D gen_rp_aer_vector; rpc->interrupts_init =3D gen_rp_interrupts_init; rpc->interrupts_uninit =3D gen_rp_interrupts_uninit; @@ -77,6 +101,7 @@ static void gen_rp_dev_class_init(ObjectClass *klass, vo= id *data) static const TypeInfo gen_rp_dev_info =3D { .name =3D TYPE_GEN_PCIE_ROOT_PORT, .parent =3D TYPE_PCIE_ROOT_PORT, + .instance_size =3D sizeof(GenPCIERootPort), .class_init =3D gen_rp_dev_class_init, }; =20 --=20 MST