From nobody Wed Nov 5 15:57:37 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1496856778734977.4389426910573; Wed, 7 Jun 2017 10:32:58 -0700 (PDT) Received: from localhost ([::1]:45415 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dIepC-0006cy-Sz for importer@patchew.org; Wed, 07 Jun 2017 13:32:54 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44744) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dIeZp-0000Nz-OQ for qemu-devel@nongnu.org; Wed, 07 Jun 2017 13:17:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dIeZl-0000TO-Nx for qemu-devel@nongnu.org; Wed, 07 Jun 2017 13:17:01 -0400 Received: from 4.mo178.mail-out.ovh.net ([46.105.49.171]:53108) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dIeZl-0000RY-HZ for qemu-devel@nongnu.org; Wed, 07 Jun 2017 13:16:57 -0400 Received: from player728.ha.ovh.net (b6.ovh.net [213.186.33.56]) by mo178.mail-out.ovh.net (Postfix) with ESMTP id ABB943D100 for ; Wed, 7 Jun 2017 19:16:55 +0200 (CEST) Received: from bahia.lan (gar31-1-82-66-74-139.fbx.proxad.net [82.66.74.139]) (Authenticated sender: groug@kaod.org) by player728.ha.ovh.net (Postfix) with ESMTPA id 6F008540096; Wed, 7 Jun 2017 19:16:52 +0200 (CEST) From: Greg Kurz To: qemu-devel@nongnu.org Date: Wed, 07 Jun 2017 19:16:52 +0200 Message-ID: <149685581222.12025.5541302490723329093.stgit@bahia.lan> In-Reply-To: <149685579678.12025.9278446121024037161.stgit@bahia.lan> References: <149685579678.12025.9278446121024037161.stgit@bahia.lan> User-Agent: StGit/0.17.1-20-gc0b1b-dirty MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Ovh-Tracer-Id: 3821022809097279974 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeeljedriedugdduuddvucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 46.105.49.171 Subject: [Qemu-devel] [PATCH v3 1/5] pnv_core: drop reference on ICPState object during CPU realization X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, Cedric Le Goater , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Similarly to what was done to spapr with commit 249127d0dfeb, this patch ensures that we don't keep an extra reference on the ICPState object. Also since the object was just created and not reparented yet, the call to object_property_add_child() should never fail: let's pass &error_abort to make this clear. Signed-off-by: Greg Kurz Reviewed-by: C=C3=A9dric Le Goater --- hw/ppc/pnv_core.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index 1b7ec70f033d..e8a9a94d5a24 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -119,7 +119,8 @@ static void pnv_core_realize_child(Object *child, XICSF= abric *xi, Error **errp) Object *obj; =20 obj =3D object_new(TYPE_PNV_ICP); - object_property_add_child(OBJECT(cpu), "icp", obj, NULL); + object_property_add_child(OBJECT(cpu), "icp", obj, &error_abort); + object_unref(obj); object_property_add_const_link(obj, "xics", OBJECT(xi), &error_abort); object_property_set_bool(obj, true, "realized", &local_err); if (local_err) { From nobody Wed Nov 5 15:57:37 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1496856257543855.459628613308; Wed, 7 Jun 2017 10:24:17 -0700 (PDT) Received: from localhost ([::1]:45350 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dIedz-0004nt-Ny for importer@patchew.org; Wed, 07 Jun 2017 13:21:19 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44816) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dIeZx-0000Um-HQ for qemu-devel@nongnu.org; Wed, 07 Jun 2017 13:17:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dIeZt-0000a2-Es for qemu-devel@nongnu.org; Wed, 07 Jun 2017 13:17:09 -0400 Received: from 7.mo178.mail-out.ovh.net ([46.105.58.91]:53045) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dIeZt-0000Ze-7l for qemu-devel@nongnu.org; Wed, 07 Jun 2017 13:17:05 -0400 Received: from player728.ha.ovh.net (b6.ovh.net [213.186.33.56]) by mo178.mail-out.ovh.net (Postfix) with ESMTP id 3684E3E5E7 for ; Wed, 7 Jun 2017 19:17:04 +0200 (CEST) Received: from bahia.lan (gar31-1-82-66-74-139.fbx.proxad.net [82.66.74.139]) (Authenticated sender: groug@kaod.org) by player728.ha.ovh.net (Postfix) with ESMTPA id E83DB540098; Wed, 7 Jun 2017 19:17:00 +0200 (CEST) From: Greg Kurz To: qemu-devel@nongnu.org Date: Wed, 07 Jun 2017 19:17:00 +0200 Message-ID: <149685582071.12025.6876143197982490443.stgit@bahia.lan> In-Reply-To: <149685579678.12025.9278446121024037161.stgit@bahia.lan> References: <149685579678.12025.9278446121024037161.stgit@bahia.lan> User-Agent: StGit/0.17.1-20-gc0b1b-dirty MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Ovh-Tracer-Id: 3823556084192877030 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeeljedriedugdduuddvucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 46.105.58.91 Subject: [Qemu-devel] [PATCH v3 2/5] xics: add reset() handler to ICPStateClass X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, Cedric Le Goater , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Taking into account that qemu_set_irq() returns immediatly if its first argument is NULL, icp_kvm_reset() largely duplicates icp_reset(). This patch introduces a reset() handler, so that the common logic can be implemented in icp_reset() only. While there we can also drop icp_kvm_realize() and icp_kvm_unrealize(). This causes icp-kvm to be realized in icp_realize(), which sets icp->xics, but it has no impact. Signed-off-by: Greg Kurz Reviewed-by: C=C3=A9dric Le Goater --- hw/intc/xics.c | 5 +++++ hw/intc/xics_kvm.c | 27 ++------------------------- include/hw/ppc/xics.h | 1 + 3 files changed, 8 insertions(+), 25 deletions(-) diff --git a/hw/intc/xics.c b/hw/intc/xics.c index ea3516794af7..ec73f02144c9 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -325,6 +325,7 @@ static const VMStateDescription vmstate_icp_server =3D { static void icp_reset(void *dev) { ICPState *icp =3D ICP(dev); + ICPStateClass *icpc =3D ICP_GET_CLASS(icp); =20 icp->xirr =3D 0; icp->pending_priority =3D 0xff; @@ -332,6 +333,10 @@ static void icp_reset(void *dev) =20 /* Make all outputs are deasserted */ qemu_set_irq(icp->output, 0); + + if (icpc->reset) { + icpc->reset(icp); + } } =20 static void icp_realize(DeviceState *dev, Error **errp) diff --git a/hw/intc/xics_kvm.c b/hw/intc/xics_kvm.c index 14b8f6f6e478..45bf110b51e6 100644 --- a/hw/intc/xics_kvm.c +++ b/hw/intc/xics_kvm.c @@ -110,19 +110,8 @@ static int icp_set_kvm_state(ICPState *icp, int versio= n_id) return 0; } =20 -static void icp_kvm_reset(void *dev) +static void icp_kvm_reset(ICPState *icp) { - ICPState *icp =3D ICP(dev); - - icp->xirr =3D 0; - icp->pending_priority =3D 0xff; - icp->mfrr =3D 0xff; - - /* Make all outputs as deasserted only if the CPU thread is in use */ - if (icp->output) { - qemu_set_irq(icp->output, 0); - } - icp_set_kvm_state(icp, 1); } =20 @@ -159,26 +148,14 @@ static void icp_kvm_cpu_setup(ICPState *icp, PowerPCC= PU *cpu) QLIST_INSERT_HEAD(&kvm_enabled_icps, enabled_icp, node); } =20 -static void icp_kvm_realize(DeviceState *dev, Error **errp) -{ - qemu_register_reset(icp_kvm_reset, dev); -} - -static void icp_kvm_unrealize(DeviceState *dev, Error **errp) -{ - qemu_unregister_reset(icp_kvm_reset, dev); -} - static void icp_kvm_class_init(ObjectClass *klass, void *data) { - DeviceClass *dc =3D DEVICE_CLASS(klass); ICPStateClass *icpc =3D ICP_CLASS(klass); =20 - dc->realize =3D icp_kvm_realize; - dc->unrealize =3D icp_kvm_unrealize; icpc->pre_save =3D icp_get_kvm_state; icpc->post_load =3D icp_set_kvm_state; icpc->cpu_setup =3D icp_kvm_cpu_setup; + icpc->reset =3D icp_kvm_reset; } =20 static const TypeInfo icp_kvm_info =3D { diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index a3073f90533a..40a506eacfb4 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -69,6 +69,7 @@ struct ICPStateClass { void (*pre_save)(ICPState *s); int (*post_load)(ICPState *s, int version_id); void (*cpu_setup)(ICPState *icp, PowerPCCPU *cpu); + void (*reset)(ICPState *icp); }; =20 struct ICPState { From nobody Wed Nov 5 15:57:37 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1496856472443390.085344741051; Wed, 7 Jun 2017 10:27:52 -0700 (PDT) Received: from localhost ([::1]:45335 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dIebh-0002M7-II for importer@patchew.org; Wed, 07 Jun 2017 13:18:57 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44956) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dIea6-0000hH-Lj for qemu-devel@nongnu.org; Wed, 07 Jun 2017 13:17:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dIea2-0000fq-Fi for qemu-devel@nongnu.org; Wed, 07 Jun 2017 13:17:18 -0400 Received: from 1.mo178.mail-out.ovh.net ([178.33.251.53]:47262) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dIea2-0000dx-6J for qemu-devel@nongnu.org; Wed, 07 Jun 2017 13:17:14 -0400 Received: from player728.ha.ovh.net (b6.ovh.net [213.186.33.56]) by mo178.mail-out.ovh.net (Postfix) with ESMTP id BB1D23DCC5 for ; Wed, 7 Jun 2017 19:17:12 +0200 (CEST) Received: from bahia.lan (gar31-1-82-66-74-139.fbx.proxad.net [82.66.74.139]) (Authenticated sender: groug@kaod.org) by player728.ha.ovh.net (Postfix) with ESMTPA id 71DDF54007E; Wed, 7 Jun 2017 19:17:09 +0200 (CEST) From: Greg Kurz To: qemu-devel@nongnu.org Date: Wed, 07 Jun 2017 19:17:09 +0200 Message-ID: <149685582923.12025.13700165807436904935.stgit@bahia.lan> In-Reply-To: <149685579678.12025.9278446121024037161.stgit@bahia.lan> References: <149685579678.12025.9278446121024037161.stgit@bahia.lan> User-Agent: StGit/0.17.1-20-gc0b1b-dirty MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Ovh-Tracer-Id: 3825807883811723750 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeeljedriedugdduuddvucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 178.33.251.53 Subject: [Qemu-devel] [PATCH v3 3/5] xics: setup cpu at realize time X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, Cedric Le Goater , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Until recently, spapr used to allocate ICPState objects for the lifetime of the machine. They would only be associated to vCPUs in xics_cpu_setup() when plugging a CPU core. Now that ICPState objects have the same lifecycle as vCPUs, it is possible to associate them during realization. This patch hence open-codes xics_cpu_setup() in icp_realize(). The vCPU is passed as a property. Note that vCPU now needs to be realized first for the IRQs to be allocated. It also needs to resetted before ICPState realization in order to synchronize with KVM. Since ICPState objects are freed when unrealized, xics_cpu_destroy() isn't needed anymore and can be safely dropped. Signed-off-by: Greg Kurz --- hw/intc/xics.c | 76 ++++++++++++++++++++-----------------------= ---- hw/ppc/pnv_core.c | 16 ++++------ hw/ppc/spapr_cpu_core.c | 21 ++++++------- include/hw/ppc/xics.h | 2 - 4 files changed, 48 insertions(+), 67 deletions(-) diff --git a/hw/intc/xics.c b/hw/intc/xics.c index ec73f02144c9..330441ff7fe8 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -38,50 +38,6 @@ #include "monitor/monitor.h" #include "hw/intc/intc.h" =20 -void xics_cpu_destroy(XICSFabric *xi, PowerPCCPU *cpu) -{ - CPUState *cs =3D CPU(cpu); - ICPState *icp =3D ICP(cpu->intc); - - assert(icp); - assert(cs =3D=3D icp->cs); - - icp->output =3D NULL; - icp->cs =3D NULL; -} - -void xics_cpu_setup(XICSFabric *xi, PowerPCCPU *cpu, ICPState *icp) -{ - CPUState *cs =3D CPU(cpu); - CPUPPCState *env =3D &cpu->env; - ICPStateClass *icpc; - - assert(icp); - - cpu->intc =3D OBJECT(icp); - icp->cs =3D cs; - - icpc =3D ICP_GET_CLASS(icp); - if (icpc->cpu_setup) { - icpc->cpu_setup(icp, cpu); - } - - switch (PPC_INPUT(env)) { - case PPC_FLAGS_INPUT_POWER7: - icp->output =3D env->irq_inputs[POWER7_INPUT_INT]; - break; - - case PPC_FLAGS_INPUT_970: - icp->output =3D env->irq_inputs[PPC970_INPUT_INT]; - break; - - default: - error_report("XICS interrupt controller does not support this CPU " - "bus model"); - abort(); - } -} - void icp_pic_print_info(ICPState *icp, Monitor *mon) { int cpu_index =3D icp->cs ? icp->cs->cpu_index : -1; @@ -343,6 +299,8 @@ static void icp_realize(DeviceState *dev, Error **errp) { ICPState *icp =3D ICP(dev); ICPStateClass *icpc =3D ICP_GET_CLASS(dev); + PowerPCCPU *cpu; + CPUPPCState *env; Object *obj; Error *err =3D NULL; =20 @@ -355,6 +313,36 @@ static void icp_realize(DeviceState *dev, Error **errp) =20 icp->xics =3D XICS_FABRIC(obj); =20 + obj =3D object_property_get_link(OBJECT(dev), "cs", &err); + if (!obj) { + error_setg(errp, "%s: required link 'xics' not found: %s", + __func__, error_get_pretty(err)); + return; + } + + cpu =3D POWERPC_CPU(obj); + cpu->intc =3D OBJECT(icp); + icp->cs =3D CPU(obj); + + if (icpc->cpu_setup) { + icpc->cpu_setup(icp, cpu); + } + + env =3D &cpu->env; + switch (PPC_INPUT(env)) { + case PPC_FLAGS_INPUT_POWER7: + icp->output =3D env->irq_inputs[POWER7_INPUT_INT]; + break; + + case PPC_FLAGS_INPUT_970: + icp->output =3D env->irq_inputs[PPC970_INPUT_INT]; + break; + + default: + error_setg(errp, "XICS interrupt controller does not support this = CPU bus model"); + return; + } + if (icpc->realize) { icpc->realize(dev, errp); } diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index e8a9a94d5a24..1393005e76f3 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -118,19 +118,19 @@ static void pnv_core_realize_child(Object *child, XIC= SFabric *xi, Error **errp) PowerPCCPU *cpu =3D POWERPC_CPU(cs); Object *obj; =20 - obj =3D object_new(TYPE_PNV_ICP); - object_property_add_child(OBJECT(cpu), "icp", obj, &error_abort); - object_unref(obj); - object_property_add_const_link(obj, "xics", OBJECT(xi), &error_abort); - object_property_set_bool(obj, true, "realized", &local_err); + object_property_set_bool(child, true, "realized", &local_err); if (local_err) { error_propagate(errp, local_err); return; } =20 - object_property_set_bool(child, true, "realized", &local_err); + obj =3D object_new(TYPE_PNV_ICP); + object_property_add_child(child, "icp", obj, NULL); + object_unref(obj); + object_property_add_const_link(obj, "xics", OBJECT(xi), &error_abort); + object_property_add_const_link(obj, "cs", child, &error_abort); + object_property_set_bool(obj, true, "realized", &local_err); if (local_err) { - object_unparent(obj); error_propagate(errp, local_err); return; } @@ -141,8 +141,6 @@ static void pnv_core_realize_child(Object *child, XICSF= abric *xi, Error **errp) error_propagate(errp, local_err); return; } - - xics_cpu_setup(xi, cpu, ICP(obj)); } =20 static void pnv_core_realize(DeviceState *dev, Error **errp) diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 029a14120edd..9a6259525953 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -53,9 +53,6 @@ static void spapr_cpu_reset(void *opaque) =20 static void spapr_cpu_destroy(PowerPCCPU *cpu) { - sPAPRMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); - - xics_cpu_destroy(XICS_FABRIC(spapr), cpu); qemu_unregister_reset(spapr_cpu_reset, cpu); } =20 @@ -140,28 +137,28 @@ static void spapr_cpu_core_realize_child(Object *chil= d, Error **errp) sPAPRMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); CPUState *cs =3D CPU(child); PowerPCCPU *cpu =3D POWERPC_CPU(cs); - Object *obj; + Object *obj =3D NULL; =20 - obj =3D object_new(spapr->icp_type); - object_property_add_child(OBJECT(cpu), "icp", obj, &error_abort); - object_unref(obj); - object_property_add_const_link(obj, "xics", OBJECT(spapr), &error_abor= t); - object_property_set_bool(obj, true, "realized", &local_err); + object_property_set_bool(child, true, "realized", &local_err); if (local_err) { goto error; } =20 - object_property_set_bool(child, true, "realized", &local_err); + spapr_cpu_init(spapr, cpu, &local_err); if (local_err) { goto error; } =20 - spapr_cpu_init(spapr, cpu, &local_err); + obj =3D object_new(spapr->icp_type); + object_property_add_child(child, "icp", obj, &error_abort); + object_unref(obj); + object_property_add_const_link(obj, "xics", OBJECT(spapr), &error_abor= t); + object_property_add_const_link(obj, "cs", child, &error_abort); + object_property_set_bool(obj, true, "realized", &local_err); if (local_err) { goto error; } =20 - xics_cpu_setup(XICS_FABRIC(spapr), cpu, ICP(obj)); return; =20 error: diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 40a506eacfb4..05767a15be9a 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -183,8 +183,6 @@ void spapr_dt_xics(int nr_servers, void *fdt, uint32_t = phandle); =20 qemu_irq xics_get_qirq(XICSFabric *xi, int irq); ICPState *xics_icp_get(XICSFabric *xi, int server); -void xics_cpu_setup(XICSFabric *xi, PowerPCCPU *cpu, ICPState *icp); -void xics_cpu_destroy(XICSFabric *xi, PowerPCCPU *cpu); =20 /* Internal XICS interfaces */ void icp_set_cppr(ICPState *icp, uint8_t cppr); From nobody Wed Nov 5 15:57:37 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1496856214947563.9701585974102; Wed, 7 Jun 2017 10:23:34 -0700 (PDT) Received: from localhost ([::1]:45361 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dIeg3-0006nh-8e for importer@patchew.org; Wed, 07 Jun 2017 13:23:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45022) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dIeaE-0000lU-US for qemu-devel@nongnu.org; Wed, 07 Jun 2017 13:17:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dIeaA-0000k5-Tp for qemu-devel@nongnu.org; Wed, 07 Jun 2017 13:17:26 -0400 Received: from 6.mo178.mail-out.ovh.net ([46.105.53.132]:36627) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dIeaA-0000j2-Nl for qemu-devel@nongnu.org; Wed, 07 Jun 2017 13:17:22 -0400 Received: from player728.ha.ovh.net (b6.ovh.net [213.186.33.56]) by mo178.mail-out.ovh.net (Postfix) with ESMTP id 4241D3DCC5 for ; Wed, 7 Jun 2017 19:17:21 +0200 (CEST) Received: from bahia.lan (gar31-1-82-66-74-139.fbx.proxad.net [82.66.74.139]) (Authenticated sender: groug@kaod.org) by player728.ha.ovh.net (Postfix) with ESMTPA id 0571754007E; Wed, 7 Jun 2017 19:17:17 +0200 (CEST) From: Greg Kurz To: qemu-devel@nongnu.org Date: Wed, 07 Jun 2017 19:17:17 +0200 Message-ID: <149685583778.12025.272004316108066026.stgit@bahia.lan> In-Reply-To: <149685579678.12025.9278446121024037161.stgit@bahia.lan> References: <149685579678.12025.9278446121024037161.stgit@bahia.lan> User-Agent: StGit/0.17.1-20-gc0b1b-dirty MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Ovh-Tracer-Id: 3828341159950064102 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeeljedriedugdduuddvucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 46.105.53.132 Subject: [Qemu-devel] [PATCH v3 4/5] xics: directly register ICPState objects to vmstate X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, Cedric Le Goater , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 The ICPState objects are currently registered to vmstate as qdev objects. Their instance ids are hence computed automatically in the migration code, and thus depends on the order the CPU cores were plugged. If the destination had its CPU cores plugged in a different order than the source, then ICPState objects will have different instance_ids and load the wrong state. Since CPU objects have a reliable cpu_index which is already used as instance_id in vmstate, let's use it for ICPState as well. Signed-off-by: Greg Kurz Reviewed-by: C=C3=A9dric Le Goater --- hw/intc/xics.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/hw/intc/xics.c b/hw/intc/xics.c index 330441ff7fe8..3d76b43876c5 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -348,10 +348,14 @@ static void icp_realize(DeviceState *dev, Error **err= p) } =20 qemu_register_reset(icp_reset, dev); + vmstate_register(NULL, icp->cs->cpu_index, &vmstate_icp_server, icp); } =20 static void icp_unrealize(DeviceState *dev, Error **errp) { + ICPState *icp =3D ICP(dev); + + vmstate_unregister(NULL, &vmstate_icp_server, icp); qemu_unregister_reset(icp_reset, dev); } =20 @@ -359,7 +363,6 @@ static void icp_class_init(ObjectClass *klass, void *da= ta) { DeviceClass *dc =3D DEVICE_CLASS(klass); =20 - dc->vmsd =3D &vmstate_icp_server; dc->realize =3D icp_realize; dc->unrealize =3D icp_unrealize; } From nobody Wed Nov 5 15:57:37 2025 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 14968568570991001.4380406035048; Wed, 7 Jun 2017 10:34:17 -0700 (PDT) Received: from localhost ([::1]:45419 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dIeqT-0007Kz-L5 for importer@patchew.org; Wed, 07 Jun 2017 13:34:13 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45079) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dIeaO-0000ui-JN for qemu-devel@nongnu.org; Wed, 07 Jun 2017 13:17:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dIeaK-0000oh-Fw for qemu-devel@nongnu.org; Wed, 07 Jun 2017 13:17:36 -0400 Received: from 4.mo178.mail-out.ovh.net ([46.105.49.171]:57484) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dIeaK-0000o2-5i for qemu-devel@nongnu.org; Wed, 07 Jun 2017 13:17:32 -0400 Received: from player728.ha.ovh.net (b6.ovh.net [213.186.33.56]) by mo178.mail-out.ovh.net (Postfix) with ESMTP id C7E123E428 for ; Wed, 7 Jun 2017 19:17:29 +0200 (CEST) Received: from bahia.lan (gar31-1-82-66-74-139.fbx.proxad.net [82.66.74.139]) (Authenticated sender: groug@kaod.org) by player728.ha.ovh.net (Postfix) with ESMTPA id 7FC8D540086; Wed, 7 Jun 2017 19:17:26 +0200 (CEST) From: Greg Kurz To: qemu-devel@nongnu.org Date: Wed, 07 Jun 2017 19:17:26 +0200 Message-ID: <149685584629.12025.14875914798241845062.stgit@bahia.lan> In-Reply-To: <149685579678.12025.9278446121024037161.stgit@bahia.lan> References: <149685579678.12025.9278446121024037161.stgit@bahia.lan> User-Agent: StGit/0.17.1-20-gc0b1b-dirty MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Ovh-Tracer-Id: 3830592961435703782 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeeljedriedugdduuddvucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 46.105.49.171 Subject: [Qemu-devel] [PATCH v3 5/5] spapr: fix migration of ICPState objects from/to older QEMU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, Cedric Le Goater , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Commit 5bc8d26de20c ("spapr: allocate the ICPState object from under sPAPRCPUCore") moved ICPState objects from the machine to CPU cores. This is an improvement since we no longer allocate ICPState objects that will never be used. But it has the side-effect of breaking migration of older machine types from older QEMU versions. This patch allows spapr to register dummy "icp/server" entries to vmstate. These entries use a dedicated VMStateDescription that can swallow and discard state of an incoming migration stream, and that don't send anything on outgoing migration. As for real ICPState objects, the instance_id is the cpu_index of the corresponding vCPU, which happens to be equal to the generated instance_id of older machine types. The machine can unregister/register these entries when CPUs are dynamically plugged/unplugged. This is only available for pseries-2.9 and older machines, thanks to a compat property. Signed-off-by: Greg Kurz --- v3: - new logic entirely implemented in hw/ppc/spapr.c --- hw/ppc/spapr.c | 88 ++++++++++++++++++++++++++++++++++++++++++++= +++- include/hw/ppc/spapr.h | 2 + 2 files changed, 88 insertions(+), 2 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 9b7ae28939a8..c15b604978f0 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -124,9 +124,52 @@ error: return NULL; } =20 +static bool pre_2_10_vmstate_dummy_icp_needed(void *opaque) +{ + return false; +} + +static const VMStateDescription pre_2_10_vmstate_dummy_icp =3D { + .name =3D "icp/server", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D pre_2_10_vmstate_dummy_icp_needed, + .fields =3D (VMStateField[]) { + VMSTATE_UNUSED(4), /* uint32_t xirr */ + VMSTATE_UNUSED(1), /* uint8_t pending_priority */ + VMSTATE_UNUSED(1), /* uint8_t mfrr */ + VMSTATE_END_OF_LIST() + }, +}; + +static void pre_2_10_vmstate_register_dummy_icp(sPAPRMachineState *spapr, = int i) +{ + bool *flag =3D &spapr->pre_2_10_ignore_icp[i]; + + g_assert(!*flag); + vmstate_register(NULL, i, &pre_2_10_vmstate_dummy_icp, flag); + *flag =3D true; +} + +static void pre_2_10_vmstate_unregister_dummy_icp(sPAPRMachineState *spapr, + int i) +{ + bool *flag =3D &spapr->pre_2_10_ignore_icp[i]; + + g_assert(*flag); + vmstate_unregister(NULL, &pre_2_10_vmstate_dummy_icp, flag); + *flag =3D false; +} + +static inline int xics_nr_servers(void) +{ + return DIV_ROUND_UP(max_cpus * kvmppc_smt_threads(), smp_threads); +} + static void xics_system_init(MachineState *machine, int nr_irqs, Error **e= rrp) { sPAPRMachineState *spapr =3D SPAPR_MACHINE(machine); + sPAPRMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(machine); =20 if (kvm_enabled()) { if (machine_kernel_irqchip_allowed(machine) && @@ -148,6 +191,15 @@ static void xics_system_init(MachineState *machine, in= t nr_irqs, Error **errp) return; } } + + if (smc->pre_2_10_has_unused_icps) { + int i; + + spapr->pre_2_10_ignore_icp =3D g_malloc(xics_nr_servers()); + for (i =3D 0; i < xics_nr_servers(); i++) { + pre_2_10_vmstate_register_dummy_icp(spapr, i); + } + } } =20 static int spapr_fixup_cpu_smt_dt(void *fdt, int offset, PowerPCCPU *cpu, @@ -976,7 +1028,6 @@ static void *spapr_build_fdt(sPAPRMachineState *spapr, void *fdt; sPAPRPHBState *phb; char *buf; - int smt =3D kvmppc_smt_threads(); =20 fdt =3D g_malloc0(FDT_MAX_SIZE); _FDT((fdt_create_empty_tree(fdt, FDT_MAX_SIZE))); @@ -1016,7 +1067,7 @@ static void *spapr_build_fdt(sPAPRMachineState *spapr, _FDT(fdt_setprop_cell(fdt, 0, "#size-cells", 2)); =20 /* /interrupt controller */ - spapr_dt_xics(DIV_ROUND_UP(max_cpus * smt, smp_threads), fdt, PHANDLE_= XICP); + spapr_dt_xics(xics_nr_servers(), fdt, PHANDLE_XICP); =20 ret =3D spapr_populate_memory(spapr, fdt); if (ret < 0) { @@ -2800,9 +2851,24 @@ static void spapr_core_unplug(HotplugHandler *hotplu= g_dev, DeviceState *dev, Error **errp) { MachineState *ms =3D MACHINE(qdev_get_machine()); + sPAPRMachineState *spapr =3D SPAPR_MACHINE(ms); CPUCore *cc =3D CPU_CORE(dev); CPUArchId *core_slot =3D spapr_find_cpu_slot(ms, cc->core_id, NULL); =20 + if (spapr->pre_2_10_ignore_icp) { + sPAPRCPUCore *sc =3D SPAPR_CPU_CORE(OBJECT(dev)); + sPAPRCPUCoreClass *scc =3D SPAPR_CPU_CORE_GET_CLASS(OBJECT(cc)); + const char *typename =3D object_class_get_name(scc->cpu_class); + size_t size =3D object_type_get_instance_size(typename); + int i; + + for (i =3D 0; i < cc->nr_threads; i++) { + CPUState *cs =3D CPU(sc->threads + i * size); + + pre_2_10_vmstate_register_dummy_icp(spapr, cs->cpu_index); + } + } + assert(core_slot); core_slot->cpu =3D NULL; object_unparent(OBJECT(dev)); @@ -2912,6 +2978,21 @@ static void spapr_core_plug(HotplugHandler *hotplug_= dev, DeviceState *dev, } } core_slot->cpu =3D OBJECT(dev); + + if (spapr->pre_2_10_ignore_icp) { + sPAPRCPUCoreClass *scc =3D SPAPR_CPU_CORE_GET_CLASS(OBJECT(cc)); + const char *typename =3D object_class_get_name(scc->cpu_class); + size_t size =3D object_type_get_instance_size(typename); + int i; + + for (i =3D 0; i < cc->nr_threads; i++) { + sPAPRCPUCore *sc =3D SPAPR_CPU_CORE(dev); + void *obj =3D sc->threads + i * size; + + cs =3D CPU(obj); + pre_2_10_vmstate_unregister_dummy_icp(spapr, cs->cpu_index); + } + } } =20 static void spapr_core_pre_plug(HotplugHandler *hotplug_dev, DeviceState *= dev, @@ -3361,9 +3442,12 @@ static void spapr_machine_2_9_instance_options(Machi= neState *machine) =20 static void spapr_machine_2_9_class_options(MachineClass *mc) { + sPAPRMachineClass *smc =3D SPAPR_MACHINE_CLASS(mc); + spapr_machine_2_10_class_options(mc); SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_9); mc->numa_auto_assign_ram =3D numa_legacy_auto_assign_ram; + smc->pre_2_10_has_unused_icps =3D true; } =20 DEFINE_SPAPR_MACHINE(2_9, "2.9", false); diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index f973b0284596..64382623199d 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -53,6 +53,7 @@ struct sPAPRMachineClass { bool dr_lmb_enabled; /* enable dynamic-reconfig/hotplug of LMBs = */ bool use_ohci_by_default; /* use USB-OHCI instead of XHCI */ const char *tcg_default_cpu; /* which (TCG) CPU to simulate by default= */ + bool pre_2_10_has_unused_icps; void (*phb_placement)(sPAPRMachineState *spapr, uint32_t index, uint64_t *buid, hwaddr *pio,=20 hwaddr *mmio32, hwaddr *mmio64, @@ -90,6 +91,7 @@ struct sPAPRMachineState { sPAPROptionVector *ov5_cas; /* negotiated (via CAS) option vectors= */ bool cas_reboot; bool cas_legacy_guest_workaround; + bool *pre_2_10_ignore_icp; =20 Notifier epow_notifier; QTAILQ_HEAD(, sPAPREventLogEntry) pending_events;